diff --git a/Kernel/Graphics/Intel/DisplayConnectorGroup.cpp b/Kernel/Graphics/Intel/DisplayConnectorGroup.cpp
index bc8f7b7b16..4d3ba51cb5 100644
--- a/Kernel/Graphics/Intel/DisplayConnectorGroup.cpp
+++ b/Kernel/Graphics/Intel/DisplayConnectorGroup.cpp
@@ -342,7 +342,14 @@ bool IntelDisplayConnectorGroup::set_crt_resolution(DisplayConnector::ModeSettin
 
     VERIFY(!m_transcoders[0]->pipe_enabled({}));
     MUST(m_transcoders[0]->enable_pipe({}));
-    MUST(m_planes[0]->set_plane_settings({}, m_mmio_second_region.pci_bar_paddr, IntelDisplayPlane::PipeSelect::PipeA, mode_setting.horizontal_active));
+
+    MUST(m_planes[0]->set_aperture_base({}, m_mmio_second_region.pci_bar_paddr));
+    MUST(m_planes[0]->set_pipe({}, IntelDisplayPlane::PipeSelect::PipeA));
+    MUST(m_planes[0]->set_horizontal_stride({}, mode_setting.horizontal_active * 4));
+    MUST(m_planes[0]->set_horizontal_active_pixels_count({}, mode_setting.horizontal_active));
+    // Note: This doesn't affect anything on the plane settings for Gen4, but we still
+    // do it for the sake of "completeness".
+    MUST(m_planes[0]->set_vertical_active_pixels_count({}, mode_setting.vertical_active));
     MUST(m_planes[0]->enable({}));
     enable_dac_output();
 
diff --git a/Kernel/Graphics/Intel/Plane/DisplayPlane.cpp b/Kernel/Graphics/Intel/Plane/DisplayPlane.cpp
index 21010ea012..c9681f6472 100644
--- a/Kernel/Graphics/Intel/Plane/DisplayPlane.cpp
+++ b/Kernel/Graphics/Intel/Plane/DisplayPlane.cpp
@@ -20,13 +20,34 @@ IntelDisplayPlane::ShadowRegisters IntelDisplayPlane::shadow_registers() const
     return m_shadow_registers;
 }
 
-ErrorOr<void> IntelDisplayPlane::enable(Badge<IntelDisplayConnectorGroup>)
+ErrorOr<void> IntelDisplayPlane::set_horizontal_active_pixels_count(Badge<IntelDisplayConnectorGroup>, size_t horizontal_active_pixels_count)
 {
     SpinlockLocker locker(m_access_lock);
-    // Note: We use the shadow register so we don't have the already set
-    // settings being lost.
-    m_plane_registers->control = m_shadow_registers.control | (1 << 31);
-    m_shadow_registers.control |= (1 << 31);
+    m_horizontal_active_pixels_count = horizontal_active_pixels_count;
+    return {};
+}
+ErrorOr<void> IntelDisplayPlane::set_vertical_active_pixels_count(Badge<IntelDisplayConnectorGroup>, size_t vertical_active_pixels_count)
+{
+    SpinlockLocker locker(m_access_lock);
+    m_vertical_active_pixels_count = vertical_active_pixels_count;
+    return {};
+}
+ErrorOr<void> IntelDisplayPlane::set_horizontal_stride(Badge<IntelDisplayConnectorGroup>, size_t horizontal_stride)
+{
+    SpinlockLocker locker(m_access_lock);
+    m_horizontal_stride = horizontal_stride;
+    return {};
+}
+ErrorOr<void> IntelDisplayPlane::set_aperture_base(Badge<IntelDisplayConnectorGroup>, PhysicalAddress aperture_start)
+{
+    SpinlockLocker locker(m_access_lock);
+    m_aperture_start.set(aperture_start.get());
+    return {};
+}
+ErrorOr<void> IntelDisplayPlane::set_pipe(Badge<IntelDisplayConnectorGroup>, PipeSelect pipe_select)
+{
+    SpinlockLocker locker(m_access_lock);
+    m_pipe_select = pipe_select;
     return {};
 }
 
diff --git a/Kernel/Graphics/Intel/Plane/DisplayPlane.h b/Kernel/Graphics/Intel/Plane/DisplayPlane.h
index 47f08ab111..8dfecbffbf 100644
--- a/Kernel/Graphics/Intel/Plane/DisplayPlane.h
+++ b/Kernel/Graphics/Intel/Plane/DisplayPlane.h
@@ -38,8 +38,13 @@ public:
 public:
     static ErrorOr<NonnullOwnPtr<IntelDisplayPlane>> create_with_physical_address(PhysicalAddress plane_registers_start_address);
 
-    virtual ErrorOr<void> set_plane_settings(Badge<IntelDisplayConnectorGroup>, PhysicalAddress aperture_start, PipeSelect, size_t horizontal_active_pixels_count) = 0;
-    ErrorOr<void> enable(Badge<IntelDisplayConnectorGroup>);
+    ErrorOr<void> set_horizontal_active_pixels_count(Badge<IntelDisplayConnectorGroup>, size_t horizontal_active_pixels_count);
+    ErrorOr<void> set_vertical_active_pixels_count(Badge<IntelDisplayConnectorGroup>, size_t vertical_active_pixels_count);
+    ErrorOr<void> set_horizontal_stride(Badge<IntelDisplayConnectorGroup>, size_t horizontal_stride);
+    ErrorOr<void> set_aperture_base(Badge<IntelDisplayConnectorGroup>, PhysicalAddress aperture_start);
+    ErrorOr<void> set_pipe(Badge<IntelDisplayConnectorGroup>, PipeSelect);
+
+    virtual ErrorOr<void> enable(Badge<IntelDisplayConnectorGroup>) = 0;
     bool is_enabled(Badge<IntelDisplayConnectorGroup>);
     ErrorOr<void> disable(Badge<IntelDisplayConnectorGroup>);
 
@@ -60,5 +65,13 @@ protected:
     mutable Spinlock<LockRank::None> m_access_lock;
     ShadowRegisters m_shadow_registers {};
     Memory::TypedMapping<PlaneRegisters volatile> m_plane_registers;
+
+    // Note: The PipeSelect value is used only in planes until Skylake graphics.
+    PipeSelect m_pipe_select { PipeSelect::PipeA };
+
+    PhysicalAddress m_aperture_start;
+    size_t m_horizontal_stride { 0 };
+    size_t m_horizontal_active_pixels_count { 0 };
+    size_t m_vertical_active_pixels_count { 0 };
 };
 }
diff --git a/Kernel/Graphics/Intel/Plane/G33DisplayPlane.cpp b/Kernel/Graphics/Intel/Plane/G33DisplayPlane.cpp
index c71635f205..3a45116b28 100644
--- a/Kernel/Graphics/Intel/Plane/G33DisplayPlane.cpp
+++ b/Kernel/Graphics/Intel/Plane/G33DisplayPlane.cpp
@@ -20,15 +20,15 @@ IntelG33DisplayPlane::IntelG33DisplayPlane(Memory::TypedMapping<PlaneRegisters v
 {
 }
 
-ErrorOr<void> IntelG33DisplayPlane::set_plane_settings(Badge<IntelDisplayConnectorGroup>, PhysicalAddress aperture_start, PipeSelect pipe_select, size_t horizontal_active_pixels_count)
+ErrorOr<void> IntelG33DisplayPlane::enable(Badge<IntelDisplayConnectorGroup>)
 {
     SpinlockLocker locker(m_access_lock);
-    VERIFY(((horizontal_active_pixels_count * 4) % 64 == 0));
-    VERIFY(aperture_start < PhysicalAddress(0x1'0000'0000));
+    VERIFY(((m_horizontal_active_pixels_count * 4) % 64 == 0));
+    VERIFY(((m_horizontal_stride) % 64 == 0));
 
     u32 control_value = 0;
 
-    switch (pipe_select) {
+    switch (m_pipe_select) {
     case PipeSelect::PipeA:
         control_value |= (0b00 << 24);
         break;
@@ -44,14 +44,15 @@ ErrorOr<void> IntelG33DisplayPlane::set_plane_settings(Badge<IntelDisplayConnect
     }
 
     // Note: Set the plane to work with 32 bit BGRX (Ignore Alpha channel).
-    control_value |= (0b0110 << 26);
+    // Note: Bit 31 is set to turn on the plane.
+    control_value |= (0b0110 << 26) | (1 << 31);
 
-    m_plane_registers->stride = horizontal_active_pixels_count * 4;
-    m_shadow_registers.stride = horizontal_active_pixels_count * 4;
+    m_plane_registers->stride = m_horizontal_stride;
+    m_shadow_registers.stride = m_horizontal_stride;
     m_plane_registers->linear_offset = 0;
     m_shadow_registers.linear_offset = 0;
-    m_plane_registers->surface_base = aperture_start.get();
-    m_shadow_registers.surface_base = aperture_start.get();
+    m_plane_registers->surface_base = m_aperture_start.get();
+    m_shadow_registers.surface_base = m_aperture_start.get();
     m_plane_registers->control = control_value;
     m_shadow_registers.control = control_value;
     return {};
diff --git a/Kernel/Graphics/Intel/Plane/G33DisplayPlane.h b/Kernel/Graphics/Intel/Plane/G33DisplayPlane.h
index de0d02d4fc..4c1ae3a540 100644
--- a/Kernel/Graphics/Intel/Plane/G33DisplayPlane.h
+++ b/Kernel/Graphics/Intel/Plane/G33DisplayPlane.h
@@ -18,7 +18,7 @@ class IntelG33DisplayPlane final : public IntelDisplayPlane {
 public:
     static ErrorOr<NonnullOwnPtr<IntelG33DisplayPlane>> create_with_physical_address(PhysicalAddress plane_registers_start_address);
 
-    virtual ErrorOr<void> set_plane_settings(Badge<IntelDisplayConnectorGroup>, PhysicalAddress aperture_start, PipeSelect, size_t horizontal_active_pixels_count) override;
+    virtual ErrorOr<void> enable(Badge<IntelDisplayConnectorGroup>) override;
 
 private:
     explicit IntelG33DisplayPlane(Memory::TypedMapping<volatile IntelDisplayPlane::PlaneRegisters> plane_registers_mapping);