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https://github.com/RGBCube/serenity
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Kernel: Let's say that IO::delay(N) delays for N microseconds
Supposedly that's how much delay you get when doing I/O on port 0x80.
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parent
85aafe492d
commit
03eb0e5638
3 changed files with 5 additions and 11 deletions
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@ -100,7 +100,7 @@ void SB16::initialize()
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disable_irq();
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disable_irq();
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IO::out8(0x226, 1);
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IO::out8(0x226, 1);
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IO::delay();
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IO::delay(32);
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IO::out8(0x226, 0);
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IO::out8(0x226, 0);
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auto data = dsp_read();
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auto data = dsp_read();
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@ -215,20 +215,16 @@ void enable(u32 cpu)
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write_register(APIC_REG_TPR, 0);
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write_register(APIC_REG_TPR, 0);
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if (cpu != 0) {
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if (cpu != 0) {
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static volatile u32 foo = 0;
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// INIT
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// INIT
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write_icr(ICRReg(0, ICRReg::INIT, ICRReg::Physical, ICRReg::Assert, ICRReg::TriggerMode::Edge, ICRReg::AllExcludingSelf));
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write_icr(ICRReg(0, ICRReg::INIT, ICRReg::Physical, ICRReg::Assert, ICRReg::TriggerMode::Edge, ICRReg::AllExcludingSelf));
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for (foo = 0; foo < 0x800000; foo++)
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IO::delay(10 * 1000);
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; // TODO: 10 millisecond delay
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for (int i = 0; i < 2; i++) {
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for (int i = 0; i < 2; i++) {
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// SIPI
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// SIPI
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write_icr(ICRReg(0x08, ICRReg::StartUp, ICRReg::Physical, ICRReg::Assert, ICRReg::TriggerMode::Edge, ICRReg::AllExcludingSelf)); // start execution at P8000
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write_icr(ICRReg(0x08, ICRReg::StartUp, ICRReg::Physical, ICRReg::Assert, ICRReg::TriggerMode::Edge, ICRReg::AllExcludingSelf)); // start execution at P8000
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for (foo = 0; foo < 0x80000; foo++)
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IO::delay(200);
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; // TODO: 200 microsecond delay
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}
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}
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}
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}
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}
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}
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@ -94,13 +94,11 @@ inline void repeated_out16(u16 port, const u16* data, int data_size)
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: "d"(port));
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: "d"(port));
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}
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}
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inline void delay()
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inline void delay(size_t microseconds)
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{
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{
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// ~3 microsecs
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for (size_t i = 0; i < microseconds; ++i)
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for (auto i = 0; i < 32; i++) {
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IO::in8(0x80);
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IO::in8(0x80);
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}
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}
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}
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}
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}
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