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Kernel: Hide the implementation detail that MSRs use two registers

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When retrieving and setting x86 MSRs two registers are required. The
existing setter and getter for the MSR class made this implementation
detail visible to the caller. This changes the setter and getter to
use u64 instead.
This commit is contained in:
Gunnar Beutner 2021-07-03 00:25:41 +02:00 • committed by Andreas Kling
parent a09e6171a6
commit 04a912f68f
3 changed files with 10 additions and 9 deletions
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9
Kernel/Interrupts/APIC.cpp
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@ -136,18 +136,15 @@ UNMAP_AFTER_INIT void APIC::initialize()
PhysicalAddress APIC::get_base()
{
u32 lo, hi;
MSR msr(APIC_BASE_MSR);
msr.get(lo, hi);
return PhysicalAddress(lo & 0xfffff000);
auto base = msr.get();
return PhysicalAddress(base & 0xfffff000);
}
void APIC::set_base(const PhysicalAddress& base)
{
u32 hi = 0;
u32 lo = base.get() | 0x800;
MSR msr(APIC_BASE_MSR);
msr.set(lo, hi);
msr.set(base.get() | 0x800);
}
void APIC::write_register(u32 offset, u32 value)