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https://github.com/RGBCube/serenity
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Kernel/PCI: Propagate usage of DeviceIdentifier everywhere
This allows us to remove a bunch of PCI API functions, and instead to leverage the cached data from DeviceIdentifier object in many places.
This commit is contained in:
parent
da327746a2
commit
057f5a12c2
40 changed files with 150 additions and 186 deletions
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@ -15,9 +15,9 @@
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namespace Kernel {
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NonnullRefPtr<AHCIController> AHCIController::initialize(PCI::Address address)
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NonnullRefPtr<AHCIController> AHCIController::initialize(PCI::DeviceIdentifier const& pci_device_identifier)
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{
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return adopt_ref(*new AHCIController(address));
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return adopt_ref(*new AHCIController(pci_device_identifier.address()));
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}
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bool AHCIController::reset()
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@ -25,7 +25,7 @@ class AHCIController final : public StorageController
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friend class AHCIPort;
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AK_MAKE_ETERNAL
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public:
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UNMAP_AFTER_INIT static NonnullRefPtr<AHCIController> initialize(PCI::Address address);
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UNMAP_AFTER_INIT static NonnullRefPtr<AHCIController> initialize(PCI::DeviceIdentifier const& pci_device_identifier);
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virtual ~AHCIController() override;
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virtual RefPtr<StorageDevice> device(u32 index) const override;
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@ -16,9 +16,9 @@
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namespace Kernel {
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UNMAP_AFTER_INIT NonnullRefPtr<IDEController> IDEController::initialize(PCI::Address address, bool force_pio)
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UNMAP_AFTER_INIT NonnullRefPtr<IDEController> IDEController::initialize(PCI::DeviceIdentifier const& device_identifier, bool force_pio)
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{
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return adopt_ref(*new IDEController(address, force_pio));
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return adopt_ref(*new IDEController(device_identifier, force_pio));
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}
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bool IDEController::reset()
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@ -51,12 +51,13 @@ void IDEController::complete_current_request(AsyncDeviceRequest::RequestResult)
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VERIFY_NOT_REACHED();
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}
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UNMAP_AFTER_INIT IDEController::IDEController(PCI::Address address, bool force_pio)
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UNMAP_AFTER_INIT IDEController::IDEController(PCI::DeviceIdentifier const& device_identifier, bool force_pio)
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: StorageController()
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, PCI::Device(address)
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, PCI::Device(device_identifier.address())
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, m_prog_if(device_identifier.prog_if())
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{
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PCI::enable_io_space(address);
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PCI::enable_memory_space(address);
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PCI::enable_io_space(device_identifier.address());
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PCI::enable_memory_space(device_identifier.address());
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initialize(force_pio);
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}
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@ -66,22 +67,22 @@ UNMAP_AFTER_INIT IDEController::~IDEController()
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bool IDEController::is_pci_native_mode_enabled() const
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{
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return (PCI::get_programming_interface(pci_address()) & 0x05) != 0;
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return (m_prog_if.value() & 0x05) != 0;
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}
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bool IDEController::is_pci_native_mode_enabled_on_primary_channel() const
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{
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return (PCI::get_programming_interface(pci_address()) & 0x1) == 0x1;
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return (m_prog_if.value() & 0x1) == 0x1;
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}
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bool IDEController::is_pci_native_mode_enabled_on_secondary_channel() const
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{
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return (PCI::get_programming_interface(pci_address()) & 0x4) == 0x4;
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return (m_prog_if.value() & 0x4) == 0x4;
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}
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bool IDEController::is_bus_master_capable() const
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{
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return PCI::get_programming_interface(pci_address()) & (1 << 7);
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return m_prog_if.value() & (1 << 7);
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}
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static const char* detect_controller_type(u8 programming_value)
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@ -114,7 +115,7 @@ UNMAP_AFTER_INIT void IDEController::initialize(bool force_pio)
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auto bus_master_base = IOAddress(PCI::get_BAR4(pci_address()) & (~1));
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dbgln("IDE controller @ {}: bus master base was set to {}", pci_address(), bus_master_base);
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dbgln("IDE controller @ {}: interrupt line was set to {}", pci_address(), PCI::get_interrupt_line(pci_address()));
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dbgln("IDE controller @ {}: {}", pci_address(), detect_controller_type(PCI::get_programming_interface(pci_address())));
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dbgln("IDE controller @ {}: {}", pci_address(), detect_controller_type(m_prog_if.value()));
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dbgln("IDE controller @ {}: primary channel DMA capable? {}", pci_address(), ((bus_master_base.offset(2).in<u8>() >> 5) & 0b11));
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dbgln("IDE controller @ {}: secondary channel DMA capable? {}", pci_address(), ((bus_master_base.offset(2 + 8).in<u8>() >> 5) & 0b11));
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@ -21,7 +21,7 @@ class IDEController final : public StorageController
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, public PCI::Device {
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AK_MAKE_ETERNAL
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public:
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static NonnullRefPtr<IDEController> initialize(PCI::Address address, bool force_pio);
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static NonnullRefPtr<IDEController> initialize(PCI::DeviceIdentifier const&, bool force_pio);
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virtual ~IDEController() override;
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virtual RefPtr<StorageDevice> device(u32 index) const override;
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@ -37,12 +37,14 @@ public:
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private:
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bool is_pci_native_mode_enabled_on_primary_channel() const;
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bool is_pci_native_mode_enabled_on_secondary_channel() const;
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IDEController(PCI::Address address, bool force_pio);
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IDEController(PCI::DeviceIdentifier const&, bool force_pio);
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RefPtr<StorageDevice> device_by_channel_and_position(u32 index) const;
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void initialize(bool force_pio);
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void detect_disks();
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NonnullRefPtrVector<IDEChannel> m_channels;
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// FIXME: Find a better way to get the ProgrammingInterface
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PCI::ProgrammingInterface m_prog_if;
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};
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}
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@ -44,15 +44,15 @@ UNMAP_AFTER_INIT void StorageManagement::enumerate_controllers(bool force_pio)
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VERIFY(m_controllers.is_empty());
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if (!kernel_command_line().disable_physical_storage()) {
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if (kernel_command_line().is_ide_enabled()) {
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PCI::enumerate([&](const PCI::Address& address, PCI::DeviceIdentifier const& device_identifier) {
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PCI::enumerate([&](const PCI::Address&, PCI::DeviceIdentifier const& device_identifier) {
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if (device_identifier.class_code().value() == PCI_MASS_STORAGE_CLASS_ID && device_identifier.subclass_code().value() == PCI_IDE_CTRL_SUBCLASS_ID) {
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m_controllers.append(IDEController::initialize(address, force_pio));
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m_controllers.append(IDEController::initialize(device_identifier, force_pio));
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}
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});
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}
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PCI::enumerate([&](const PCI::Address& address, PCI::DeviceIdentifier const& device_identifier) {
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PCI::enumerate([&](const PCI::Address&, PCI::DeviceIdentifier const& device_identifier) {
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if (device_identifier.class_code().value() == PCI_MASS_STORAGE_CLASS_ID && device_identifier.subclass_code().value() == PCI_SATA_CTRL_SUBCLASS_ID && device_identifier.prog_if().value() == PCI_AHCI_IF_PROGIF) {
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m_controllers.append(AHCIController::initialize(address));
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m_controllers.append(AHCIController::initialize(device_identifier));
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}
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});
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}
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