1
Fork 0
mirror of https://github.com/RGBCube/serenity synced 2025-06-01 10:08:10 +00:00

Kernel: Introduce the IOWindow class

This class is intended to replace all IOAddress usages in the Kernel
codebase altogether. The idea is to ensure IO can be done in
arch-specific manner that is determined mostly in compile-time, but to
still be able to use most of the Kernel code in non-x86 builds. Specific
devices that rely on x86-specific IO instructions are already placed in
the Arch/x86 directory and are omitted for non-x86 builds.

The reason this works so well is the fact that x86 IO space acts in a
similar fashion to the traditional memory space being available in most
CPU architectures - the x86 IO space is essentially just an array of
bytes like the physical memory address space, but requires x86 IO
instructions to load and store data. Therefore, many devices allow host
software to interact with the hardware registers in both ways, with a
noticeable trend even in the modern x86 hardware to move away from the
old x86 IO space to exclusively using memory-mapped IO.

Therefore, the IOWindow class encapsulates both methods for x86 builds.
The idea is to allow PCI devices to be used in either way in x86 builds,
so when trying to map an IOWindow on a PCI BAR, the Kernel will try to
find the proper method being declared with the PCI BAR flags.
For old PCI hardware on non-x86 builds this might turn into a problem as
we can't use port mapped IO, so the Kernel will gracefully fail with
ENOTSUP error code if that's the case, as there's really nothing we can
do within such case.

For general IO, the read{8,16,32} and write{8,16,32} methods are
available as a convenient API for other places in the Kernel. There are
simply no direct 64-bit IO API methods yet, as it's not needed right now
and is not considered to be Arch-agnostic too - the x86 IO space doesn't
support generating 64 bit cycle on IO bus and instead requires two 2
32-bit accesses. If for whatever reason it appears to be necessary to do
IO in such manner, it could probably be added with some neat tricks to
do so. It is recommended to use Memory::TypedMapping struct if direct 64
bit IO is actually needed.
This commit is contained in:
Liav A 2022-09-23 11:50:04 +03:00 committed by Linus Groh
parent 6bafbd64e2
commit 05ba034000
36 changed files with 919 additions and 469 deletions

View file

@ -66,7 +66,8 @@ static constexpr u16 UHCI_NUMBER_OF_FRAMES = 1024;
ErrorOr<NonnullLockRefPtr<UHCIController>> UHCIController::try_to_initialize(PCI::DeviceIdentifier const& pci_device_identifier)
{
// NOTE: This assumes that address is pointing to a valid UHCI controller.
auto controller = TRY(adopt_nonnull_lock_ref_or_enomem(new (nothrow) UHCIController(pci_device_identifier)));
auto registers_io_window = TRY(IOWindow::create_for_pci_device_bar(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR4));
auto controller = TRY(adopt_nonnull_lock_ref_or_enomem(new (nothrow) UHCIController(pci_device_identifier, move(registers_io_window))));
TRY(controller->initialize());
return controller;
}
@ -74,7 +75,7 @@ ErrorOr<NonnullLockRefPtr<UHCIController>> UHCIController::try_to_initialize(PCI
ErrorOr<void> UHCIController::initialize()
{
dmesgln("UHCI: Controller found {} @ {}", PCI::get_hardware_id(pci_address()), pci_address());
dmesgln("UHCI: I/O base {}", m_io_base);
dmesgln("UHCI: I/O base {}", m_registers_io_window);
dmesgln("UHCI: Interrupt line: {}", interrupt_number());
TRY(spawn_port_process());
@ -83,10 +84,10 @@ ErrorOr<void> UHCIController::initialize()
return start();
}
UNMAP_AFTER_INIT UHCIController::UHCIController(PCI::DeviceIdentifier const& pci_device_identifier)
UNMAP_AFTER_INIT UHCIController::UHCIController(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<IOWindow> registers_io_window)
: PCI::Device(pci_device_identifier.address())
, IRQHandler(pci_device_identifier.interrupt_line().value())
, m_io_base(PCI::get_BAR4(pci_address()) & ~1)
, m_registers_io_window(move(registers_io_window))
, m_schedule_lock(LockRank::None)
{
}

View file

@ -10,12 +10,12 @@
#include <AK/Array.h>
#include <AK/NonnullOwnPtr.h>
#include <AK/Platform.h>
#include <Kernel/Arch/x86/IO.h>
#include <Kernel/Bus/PCI/Device.h>
#include <Kernel/Bus/USB/UHCI/UHCIDescriptorPool.h>
#include <Kernel/Bus/USB/UHCI/UHCIDescriptorTypes.h>
#include <Kernel/Bus/USB/UHCI/UHCIRootHub.h>
#include <Kernel/Bus/USB/USBController.h>
#include <Kernel/IOWindow.h>
#include <Kernel/Interrupts/IRQHandler.h>
#include <Kernel/Locking/Spinlock.h>
#include <Kernel/Memory/AnonymousVMObject.h>
@ -54,25 +54,25 @@ public:
ErrorOr<void> clear_port_feature(Badge<UHCIRootHub>, u8, HubFeatureSelector);
private:
explicit UHCIController(PCI::DeviceIdentifier const& pci_device_identifier);
UHCIController(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<IOWindow> registers_io_window);
u16 read_usbcmd() { return m_io_base.offset(0).in<u16>(); }
u16 read_usbsts() { return m_io_base.offset(0x2).in<u16>(); }
u16 read_usbintr() { return m_io_base.offset(0x4).in<u16>(); }
u16 read_frnum() { return m_io_base.offset(0x6).in<u16>(); }
u32 read_flbaseadd() { return m_io_base.offset(0x8).in<u32>(); }
u8 read_sofmod() { return m_io_base.offset(0xc).in<u8>(); }
u16 read_portsc1() { return m_io_base.offset(0x10).in<u16>(); }
u16 read_portsc2() { return m_io_base.offset(0x12).in<u16>(); }
u16 read_usbcmd() { return m_registers_io_window->read16(0); }
u16 read_usbsts() { return m_registers_io_window->read16(0x2); }
u16 read_usbintr() { return m_registers_io_window->read16(0x4); }
u16 read_frnum() { return m_registers_io_window->read16(0x6); }
u32 read_flbaseadd() { return m_registers_io_window->read32(0x8); }
u8 read_sofmod() { return m_registers_io_window->read8(0xc); }
u16 read_portsc1() { return m_registers_io_window->read16(0x10); }
u16 read_portsc2() { return m_registers_io_window->read16(0x12); }
void write_usbcmd(u16 value) { m_io_base.offset(0).out(value); }
void write_usbsts(u16 value) { m_io_base.offset(0x2).out(value); }
void write_usbintr(u16 value) { m_io_base.offset(0x4).out(value); }
void write_frnum(u16 value) { m_io_base.offset(0x6).out(value); }
void write_flbaseadd(u32 value) { m_io_base.offset(0x8).out(value); }
void write_sofmod(u8 value) { m_io_base.offset(0xc).out(value); }
void write_portsc1(u16 value) { m_io_base.offset(0x10).out(value); }
void write_portsc2(u16 value) { m_io_base.offset(0x12).out(value); }
void write_usbcmd(u16 value) { m_registers_io_window->write16(0, value); }
void write_usbsts(u16 value) { m_registers_io_window->write16(0x2, value); }
void write_usbintr(u16 value) { m_registers_io_window->write16(0x4, value); }
void write_frnum(u16 value) { m_registers_io_window->write16(0x6, value); }
void write_flbaseadd(u32 value) { m_registers_io_window->write32(0x8, value); }
void write_sofmod(u8 value) { m_registers_io_window->write8(0xc, value); }
void write_portsc1(u16 value) { m_registers_io_window->write16(0x10, value); }
void write_portsc2(u16 value) { m_registers_io_window->write16(0x12, value); }
virtual bool handle_irq(RegisterState const&) override;
@ -93,7 +93,7 @@ private:
void reset_port(u8);
IOAddress m_io_base;
NonnullOwnPtr<IOWindow> m_registers_io_window;
Spinlock m_schedule_lock;

View file

@ -10,6 +10,7 @@
#include <Kernel/Bus/USB/USBHub.h>
#include <Kernel/Bus/USB/USBRequest.h>
#include <Kernel/FileSystem/SysFS/Subsystems/Bus/USB/BusDirectory.h>
#include <Kernel/IOWindow.h>
#include <Kernel/StdLib.h>
namespace Kernel::USB {