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https://github.com/RGBCube/serenity
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Kernel: Introduce the IOWindow class
This class is intended to replace all IOAddress usages in the Kernel codebase altogether. The idea is to ensure IO can be done in arch-specific manner that is determined mostly in compile-time, but to still be able to use most of the Kernel code in non-x86 builds. Specific devices that rely on x86-specific IO instructions are already placed in the Arch/x86 directory and are omitted for non-x86 builds. The reason this works so well is the fact that x86 IO space acts in a similar fashion to the traditional memory space being available in most CPU architectures - the x86 IO space is essentially just an array of bytes like the physical memory address space, but requires x86 IO instructions to load and store data. Therefore, many devices allow host software to interact with the hardware registers in both ways, with a noticeable trend even in the modern x86 hardware to move away from the old x86 IO space to exclusively using memory-mapped IO. Therefore, the IOWindow class encapsulates both methods for x86 builds. The idea is to allow PCI devices to be used in either way in x86 builds, so when trying to map an IOWindow on a PCI BAR, the Kernel will try to find the proper method being declared with the PCI BAR flags. For old PCI hardware on non-x86 builds this might turn into a problem as we can't use port mapped IO, so the Kernel will gracefully fail with ENOTSUP error code if that's the case, as there's really nothing we can do within such case. For general IO, the read{8,16,32} and write{8,16,32} methods are available as a convenient API for other places in the Kernel. There are simply no direct 64-bit IO API methods yet, as it's not needed right now and is not considered to be Arch-agnostic too - the x86 IO space doesn't support generating 64 bit cycle on IO bus and instead requires two 2 32-bit accesses. If for whatever reason it appears to be necessary to do IO in such manner, it could probably be added with some neat tricks to do so. It is recommended to use Memory::TypedMapping struct if direct 64 bit IO is actually needed.
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parent
6bafbd64e2
commit
05ba034000
36 changed files with 919 additions and 469 deletions
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@ -23,18 +23,24 @@ static constexpr u16 pcm_sample_rate_maximum = 48000;
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UNMAP_AFTER_INIT ErrorOr<NonnullLockRefPtr<AC97>> AC97::try_create(PCI::DeviceIdentifier const& pci_device_identifier)
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{
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auto ac97 = adopt_nonnull_lock_ref_or_enomem(new (nothrow) AC97(pci_device_identifier));
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auto mixer_io_window = TRY(IOWindow::create_for_pci_device_bar(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR0));
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auto bus_io_window = TRY(IOWindow::create_for_pci_device_bar(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR1));
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auto pcm_out_channel_io_window = TRY(bus_io_window->create_from_io_window_with_offset(NativeAudioBusChannel::PCMOutChannel));
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auto pcm_out_channel = TRY(AC97Channel::create_with_parent_pci_device(pci_device_identifier.address(), "PCMOut"sv, move(pcm_out_channel_io_window)));
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auto ac97 = adopt_nonnull_lock_ref_or_enomem(new (nothrow) AC97(pci_device_identifier, move(pcm_out_channel), move(mixer_io_window), move(bus_io_window)));
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if (!ac97.is_error())
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TRY(ac97.value()->initialize());
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return ac97;
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}
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UNMAP_AFTER_INIT AC97::AC97(PCI::DeviceIdentifier const& pci_device_identifier)
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UNMAP_AFTER_INIT AC97::AC97(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<AC97Channel> pcm_out_channel, NonnullOwnPtr<IOWindow> mixer_io_window, NonnullOwnPtr<IOWindow> bus_io_window)
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: PCI::Device(pci_device_identifier.address())
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, IRQHandler(pci_device_identifier.interrupt_line().value())
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, m_io_mixer_base(PCI::get_BAR0(pci_address()) & ~1)
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, m_io_bus_base(PCI::get_BAR1(pci_address()) & ~1)
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, m_pcm_out_channel(channel("PCMOut"sv, NativeAudioBusChannel::PCMOutChannel))
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, m_mixer_io_window(move(mixer_io_window))
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, m_bus_io_window(move(bus_io_window))
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, m_pcm_out_channel(move(pcm_out_channel))
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{
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}
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@ -42,8 +48,7 @@ UNMAP_AFTER_INIT AC97::~AC97() = default;
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bool AC97::handle_irq(RegisterState const&)
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{
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auto pcm_out_status_register = m_pcm_out_channel.reg(AC97Channel::Register::Status);
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auto pcm_out_status = pcm_out_status_register.in<u16>();
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auto pcm_out_status = m_pcm_out_channel->io_window().read16(AC97Channel::Register::Status);
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dbgln_if(AC97_DEBUG, "AC97 @ {}: interrupt received - status: {:#05b}", pci_address(), pcm_out_status);
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bool is_dma_halted = (pcm_out_status & AudioStatusRegisterFlag::DMAControllerHalted) > 0;
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@ -60,11 +65,11 @@ bool AC97::handle_irq(RegisterState const&)
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pcm_out_status = AudioStatusRegisterFlag::LastValidBufferCompletionInterrupt
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| AudioStatusRegisterFlag::BufferCompletionInterruptStatus
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| AudioStatusRegisterFlag::FIFOError;
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pcm_out_status_register.out(pcm_out_status);
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m_pcm_out_channel->io_window().write16(AC97Channel::Register::Status, pcm_out_status);
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if (is_dma_halted) {
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VERIFY(current_equals_last_valid);
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m_pcm_out_channel.handle_dma_stopped();
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m_pcm_out_channel->handle_dma_stopped();
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}
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if (!m_irq_queue.is_empty())
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@ -75,34 +80,33 @@ bool AC97::handle_irq(RegisterState const&)
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UNMAP_AFTER_INIT ErrorOr<void> AC97::initialize()
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{
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dbgln_if(AC97_DEBUG, "AC97 @ {}: mixer base: {:#04x}", pci_address(), m_io_mixer_base.get());
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dbgln_if(AC97_DEBUG, "AC97 @ {}: bus base: {:#04x}", pci_address(), m_io_bus_base.get());
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dbgln_if(AC97_DEBUG, "AC97 @ {}: mixer base: {:#04x}", pci_address(), m_mixer_io_window);
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dbgln_if(AC97_DEBUG, "AC97 @ {}: bus base: {:#04x}", pci_address(), m_bus_io_window);
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// Read out AC'97 codec revision and vendor
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auto extended_audio_id = m_io_mixer_base.offset(NativeAudioMixerRegister::ExtendedAudioID).in<u16>();
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auto extended_audio_id = m_mixer_io_window->read16(NativeAudioMixerRegister::ExtendedAudioID);
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m_codec_revision = static_cast<AC97Revision>(((extended_audio_id & ExtendedAudioMask::Revision) >> 10) & 0b11);
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dbgln_if(AC97_DEBUG, "AC97 @ {}: codec revision {:#02b}", pci_address(), to_underlying(m_codec_revision));
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if (m_codec_revision == AC97Revision::Reserved)
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return ENOTSUP;
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// Report vendor / device ID
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u32 vendor_id = m_io_mixer_base.offset(NativeAudioMixerRegister::VendorID1).in<u16>() << 16 | m_io_mixer_base.offset(NativeAudioMixerRegister::VendorID2).in<u16>();
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u32 vendor_id = m_mixer_io_window->read16(NativeAudioMixerRegister::VendorID1) << 16 | m_mixer_io_window->read16(NativeAudioMixerRegister::VendorID2);
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dbgln("AC97 @ {}: Vendor ID: {:#8x}", pci_address(), vendor_id);
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// Bus cold reset, enable interrupts
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enable_pin_based_interrupts();
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PCI::enable_bus_mastering(pci_address());
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auto control = m_io_bus_base.offset(NativeAudioBusRegister::GlobalControl).in<u32>();
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auto control = m_bus_io_window->read32(NativeAudioBusRegister::GlobalControl);
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control |= GlobalControlFlag::GPIInterruptEnable;
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control |= GlobalControlFlag::AC97ColdReset;
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m_io_bus_base.offset(NativeAudioBusRegister::GlobalControl).out(control);
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m_bus_io_window->write32(NativeAudioBusRegister::GlobalControl, control);
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// Reset mixer
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m_io_mixer_base.offset(NativeAudioMixerRegister::Reset).out<u16>(1);
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m_mixer_io_window->write16(NativeAudioMixerRegister::Reset, 1);
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// Enable variable and double rate PCM audio if supported
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auto extended_audio_status_control_register = m_io_mixer_base.offset(NativeAudioMixerRegister::ExtendedAudioStatusControl);
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auto extended_audio_status = extended_audio_status_control_register.in<u16>();
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auto extended_audio_status = m_mixer_io_window->read16(NativeAudioMixerRegister::ExtendedAudioStatusControl);
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if ((extended_audio_id & ExtendedAudioMask::VariableRatePCMAudio) > 0) {
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extended_audio_status |= ExtendedAudioStatusControlFlag::VariableRateAudio;
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m_variable_rate_pcm_supported = true;
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@ -113,7 +117,7 @@ UNMAP_AFTER_INIT ErrorOr<void> AC97::initialize()
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extended_audio_status |= ExtendedAudioStatusControlFlag::DoubleRateAudio;
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m_double_rate_pcm_enabled = true;
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}
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extended_audio_status_control_register.out(extended_audio_status);
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m_mixer_io_window->write16(NativeAudioMixerRegister::ExtendedAudioStatusControl, extended_audio_status);
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TRY(set_pcm_output_sample_rate(m_variable_rate_pcm_supported ? pcm_default_sample_rate : pcm_fixed_sample_rate));
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@ -121,7 +125,7 @@ UNMAP_AFTER_INIT ErrorOr<void> AC97::initialize()
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set_master_output_volume(0, 0, Muted::No);
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set_pcm_output_volume(0, 0, Muted::No);
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m_pcm_out_channel.reset();
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m_pcm_out_channel->reset();
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enable_irq();
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return {};
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}
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@ -131,7 +135,7 @@ void AC97::set_master_output_volume(u8 left_channel, u8 right_channel, Muted mut
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u16 volume_value = ((right_channel & 63) << 0)
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| ((left_channel & 63) << 8)
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| ((mute == Muted::Yes ? 1 : 0) << 15);
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m_io_mixer_base.offset(NativeAudioMixerRegister::SetMasterOutputVolume).out(volume_value);
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m_mixer_io_window->write16(NativeAudioMixerRegister::SetMasterOutputVolume, volume_value);
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}
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ErrorOr<void> AC97::set_pcm_output_sample_rate(u32 sample_rate)
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@ -146,15 +150,14 @@ ErrorOr<void> AC97::set_pcm_output_sample_rate(u32 sample_rate)
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if (shifted_sample_rate < pcm_sample_rate_minimum || shifted_sample_rate > pcm_sample_rate_maximum)
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return ENOTSUP;
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auto pcm_front_dac_rate_register = m_io_mixer_base.offset(NativeAudioMixerRegister::PCMFrontDACRate);
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pcm_front_dac_rate_register.out<u16>(shifted_sample_rate);
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m_sample_rate = static_cast<u32>(pcm_front_dac_rate_register.in<u16>()) << double_rate_shift;
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m_mixer_io_window->write16(NativeAudioMixerRegister::PCMFrontDACRate, shifted_sample_rate);
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m_sample_rate = static_cast<u32>(m_mixer_io_window->read16(NativeAudioMixerRegister::PCMFrontDACRate)) << double_rate_shift;
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dbgln("AC97 @ {}: PCM front DAC rate set to {} Hz", pci_address(), m_sample_rate);
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// Setting the sample rate stops a running DMA engine, so restart it
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if (m_pcm_out_channel.dma_running())
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m_pcm_out_channel.start_dma();
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if (m_pcm_out_channel->dma_running())
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m_pcm_out_channel->start_dma();
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return {};
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}
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@ -164,7 +167,7 @@ void AC97::set_pcm_output_volume(u8 left_channel, u8 right_channel, Muted mute)
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u16 volume_value = ((right_channel & 31) << 0)
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| ((left_channel & 31) << 8)
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| ((mute == Muted::Yes ? 1 : 0) << 15);
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m_io_mixer_base.offset(NativeAudioMixerRegister::SetPCMOutputVolume).out(volume_value);
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m_mixer_io_window->write16(NativeAudioMixerRegister::SetPCMOutputVolume, volume_value);
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}
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LockRefPtr<AudioChannel> AC97::audio_channel(u32 index) const
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@ -226,14 +229,14 @@ ErrorOr<void> AC97::write_single_buffer(UserOrKernelBuffer const& data, size_t o
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// Block until we can write into an unused buffer
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cli();
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do {
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auto pcm_out_status = m_pcm_out_channel.reg(AC97Channel::Register::Status).in<u16>();
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auto current_index = m_pcm_out_channel.reg(AC97Channel::Register::CurrentIndexValue).in<u8>();
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int last_valid_index = m_pcm_out_channel.reg(AC97Channel::Register::LastValidIndex).in<u8>();
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auto pcm_out_status = m_pcm_out_channel->io_window().read16(AC97Channel::Register::Status);
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auto current_index = m_pcm_out_channel->io_window().read8(AC97Channel::Register::CurrentIndexValue);
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int last_valid_index = m_pcm_out_channel->io_window().read8(AC97Channel::Register::LastValidIndex);
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auto head_distance = last_valid_index - current_index;
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if (head_distance < 0)
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head_distance += buffer_descriptor_list_max_entries;
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if (m_pcm_out_channel.dma_running())
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if (m_pcm_out_channel->dma_running())
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++head_distance;
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// Current index has _passed_ last valid index - move our list index up
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@ -248,7 +251,7 @@ ErrorOr<void> AC97::write_single_buffer(UserOrKernelBuffer const& data, size_t o
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dbgln_if(AC97_DEBUG, "AC97 @ {}: waiting on interrupt - status: {:#05b} CI: {} LVI: {}", pci_address(), pcm_out_status, current_index, last_valid_index);
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m_irq_queue.wait_forever("AC97"sv);
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} while (m_pcm_out_channel.dma_running());
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} while (m_pcm_out_channel->dma_running());
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sti();
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// Copy data from userspace into one of our buffers
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@ -262,10 +265,10 @@ ErrorOr<void> AC97::write_single_buffer(UserOrKernelBuffer const& data, size_t o
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list_entry->control_and_length = number_of_samples | BufferDescriptorListEntryFlags::InterruptOnCompletion;
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auto buffer_address = static_cast<u32>(m_buffer_descriptor_list->physical_page(0)->paddr().get());
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m_pcm_out_channel.set_last_valid_index(buffer_address, m_buffer_descriptor_list_index);
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m_pcm_out_channel->set_last_valid_index(buffer_address, m_buffer_descriptor_list_index);
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if (!m_pcm_out_channel.dma_running())
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m_pcm_out_channel.start_dma();
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if (!m_pcm_out_channel->dma_running())
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m_pcm_out_channel->start_dma();
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m_output_buffer_page_index = (m_output_buffer_page_index + 1) % m_output_buffer_page_count;
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m_buffer_descriptor_list_index = (m_buffer_descriptor_list_index + 1) % buffer_descriptor_list_max_entries;
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@ -273,25 +276,29 @@ ErrorOr<void> AC97::write_single_buffer(UserOrKernelBuffer const& data, size_t o
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return {};
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}
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ErrorOr<NonnullOwnPtr<AC97::AC97Channel>> AC97::AC97Channel::create_with_parent_pci_device(PCI::Address pci_device_address, StringView name, NonnullOwnPtr<IOWindow> channel_io_base)
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{
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return adopt_nonnull_own_or_enomem(new (nothrow) AC97::AC97Channel(pci_device_address, name, move(channel_io_base)));
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}
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void AC97::AC97Channel::handle_dma_stopped()
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{
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: DMA engine has stopped", m_device.pci_address(), name());
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: DMA engine has stopped", m_device_pci_address, name());
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m_dma_running.with([this](auto& dma_running) {
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// NOTE: QEMU might send spurious interrupts while we're not running, so we don't want to panic here.
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if (!dma_running)
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dbgln("AC97 @ {}: received DMA interrupt while it wasn't running", m_device.pci_address());
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dbgln("AC97 @ {}: received DMA interrupt while it wasn't running", m_device_pci_address);
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dma_running = false;
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});
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}
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void AC97::AC97Channel::reset()
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{
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: resetting", m_device.pci_address(), name());
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: resetting", m_device_pci_address, name());
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auto control_register = reg(Register::Control);
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control_register.out(AudioControlRegisterFlag::ResetRegisters);
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m_channel_io_window->write8(Register::Control, AudioControlRegisterFlag::ResetRegisters);
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while ((control_register.in<u8>() & AudioControlRegisterFlag::ResetRegisters) > 0)
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while ((m_channel_io_window->read8(Register::Control) & AudioControlRegisterFlag::ResetRegisters) > 0)
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microseconds_delay(50);
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m_dma_running.with([](auto& dma_running) {
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@ -301,22 +308,21 @@ void AC97::AC97Channel::reset()
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void AC97::AC97Channel::set_last_valid_index(u32 buffer_address, u8 last_valid_index)
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{
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: setting buffer address: {:#x} LVI: {}", m_device.pci_address(), name(), buffer_address, last_valid_index);
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: setting buffer address: {:#x} LVI: {}", m_device_pci_address, name(), buffer_address, last_valid_index);
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reg(Register::BufferDescriptorListBaseAddress).out(buffer_address);
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reg(Register::LastValidIndex).out(last_valid_index);
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m_channel_io_window->write32(Register::BufferDescriptorListBaseAddress, buffer_address);
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m_channel_io_window->write8(Register::LastValidIndex, last_valid_index);
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}
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void AC97::AC97Channel::start_dma()
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{
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: starting DMA engine", m_device.pci_address(), name());
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dbgln_if(AC97_DEBUG, "AC97 @ {}: channel {}: starting DMA engine", m_device_pci_address, name());
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auto control_register = reg(Register::Control);
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auto control = control_register.in<u8>();
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auto control = m_channel_io_window->read8(Register::Control);
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control |= AudioControlRegisterFlag::RunPauseBusMaster;
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control |= AudioControlRegisterFlag::FIFOErrorInterruptEnable;
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control |= AudioControlRegisterFlag::InterruptOnCompletionEnable;
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control_register.out(control);
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m_channel_io_window->write8(Register::Control, control);
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m_dma_running.with([](auto& dma_running) {
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dma_running = true;
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