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LibX86: Add {Address,Operand}Size::Size64
For now the opcode tables for OperandSize::Size64 are empty
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parent
a7268c3c74
commit
06ece474e9
4 changed files with 98 additions and 11 deletions
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@ -106,8 +106,9 @@ public:
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return m_gpr[X86::RegisterEDX].reference_to<&PartAddressableRegister::low_u8>();
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case X86::RegisterDH:
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return m_gpr[X86::RegisterEDX].reference_to<&PartAddressableRegister::high_u8>();
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default:
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VERIFY_NOT_REACHED();
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}
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VERIFY_NOT_REACHED();
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}
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ValueWithShadow<u8> const_gpr8(X86::RegisterIndex8 reg) const
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@ -129,8 +130,9 @@ public:
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return m_gpr[X86::RegisterEDX].slice<&PartAddressableRegister::low_u8>();
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case X86::RegisterDH:
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return m_gpr[X86::RegisterEDX].slice<&PartAddressableRegister::high_u8>();
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default:
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VERIFY_NOT_REACHED();
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}
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VERIFY_NOT_REACHED();
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}
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ValueWithShadow<u16> const_gpr16(X86::RegisterIndex16 reg) const
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@ -211,8 +213,9 @@ public:
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case X86::AddressSize::Size16:
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set_cx(ValueWithShadow<u16>(cx().value() - 1, cx().shadow()));
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return cx().value() == 0;
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default:
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VERIFY_NOT_REACHED();
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}
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VERIFY_NOT_REACHED();
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}
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ALWAYS_INLINE void step_source_index(X86::AddressSize address_size, u32 step)
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