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Kernel/Storage: Introduce basic abstraction layer for ATA components
This abstraction layer is mainly for ATA ports (AHCI ports, IDE ports). The goal is to create a convenient and flexible framework so it's possible to expand to support other types of controller (e.g. Intel PIIX and ICH IDE controllers) and to abstract operations that are possible on each component. Currently only the ATA IDE code is affected by this, making it much cleaner and readable - the ATA bus mastering code is moved to the ATAPort code so more implementations in the near future can take advantage of such functionality easily. In addition to that, the hierarchy of the ATA IDE code resembles more of the SATA AHCI code now, which means the IDEChannel class is solely responsible for getting interrupts, passing them for further processing in the ATAPort code to take care of the rest of the handling logic.
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@ -4,6 +4,7 @@ set(AHCI_DEBUG ON)
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set(APIC_DEBUG ON)
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set(APIC_SMP_DEBUG ON)
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set(ARP_DEBUG ON)
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set(ATA_DEBUG ON)
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set(AWAVLOADER_DEBUG ON)
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set(AFLACLOADER_DEBUG ON)
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set(BBFS_DEBUG ON)
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