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https://github.com/RGBCube/serenity
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Everywhere: Run clang-format
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parent
0376c127f6
commit
086969277e
1665 changed files with 8479 additions and 8479 deletions
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@ -75,7 +75,7 @@ public:
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handler->register_interrupt_handler();
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}
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virtual bool handle_interrupt(const RegisterState&) override;
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virtual bool handle_interrupt(RegisterState const&) override;
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virtual bool eoi() override;
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@ -106,7 +106,7 @@ public:
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handler->register_interrupt_handler();
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}
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virtual bool handle_interrupt(const RegisterState&) override;
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virtual bool handle_interrupt(RegisterState const&) override;
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virtual bool eoi() override;
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@ -145,7 +145,7 @@ PhysicalAddress APIC::get_base()
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return PhysicalAddress(base & 0xfffff000);
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}
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void APIC::set_base(const PhysicalAddress& base)
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void APIC::set_base(PhysicalAddress const& base)
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{
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MSR msr(APIC_BASE_MSR);
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u64 flags = 1 << 11;
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@ -160,7 +160,7 @@ void APIC::write_register(u32 offset, u32 value)
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MSR msr(APIC_REGS_MSR_BASE + (offset >> 4));
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msr.set(value);
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} else {
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*reinterpret_cast<volatile u32*>(m_apic_base->vaddr().offset(offset).as_ptr()) = value;
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*reinterpret_cast<u32 volatile*>(m_apic_base->vaddr().offset(offset).as_ptr()) = value;
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}
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}
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@ -170,7 +170,7 @@ u32 APIC::read_register(u32 offset)
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MSR msr(APIC_REGS_MSR_BASE + (offset >> 4));
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return (u32)msr.get();
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}
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return *reinterpret_cast<volatile u32*>(m_apic_base->vaddr().offset(offset).as_ptr());
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return *reinterpret_cast<u32 volatile*>(m_apic_base->vaddr().offset(offset).as_ptr());
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}
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void APIC::set_lvt(u32 offset, u8 interrupt)
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@ -190,7 +190,7 @@ void APIC::wait_for_pending_icr()
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}
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}
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void APIC::write_icr(const ICRReg& icr)
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void APIC::write_icr(ICRReg const& icr)
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{
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if (m_is_x2) {
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MSR msr(APIC_REGS_MSR_BASE + (APIC_REG_ICR_LOW >> 4));
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@ -236,7 +236,7 @@ u8 APIC::spurious_interrupt_vector()
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}
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#define APIC_INIT_VAR_PTR(tpe, vaddr, varname) \
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reinterpret_cast<volatile tpe*>(reinterpret_cast<ptrdiff_t>(vaddr) \
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reinterpret_cast<tpe volatile*>(reinterpret_cast<ptrdiff_t>(vaddr) \
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+ reinterpret_cast<ptrdiff_t>(&varname) \
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- reinterpret_cast<ptrdiff_t>(&apic_ap_start))
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@ -349,7 +349,7 @@ UNMAP_AFTER_INIT void APIC::setup_ap_boot_environment()
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VERIFY(apic_startup_region_size < USER_RANGE_BASE);
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auto apic_startup_region = create_identity_mapped_region(PhysicalAddress(apic_startup_region_base), apic_startup_region_size);
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u8* apic_startup_region_ptr = apic_startup_region->vaddr().as_ptr();
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memcpy(apic_startup_region_ptr, reinterpret_cast<const void*>(apic_ap_start), apic_ap_start_size);
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memcpy(apic_startup_region_ptr, reinterpret_cast<void const*>(apic_ap_start), apic_ap_start_size);
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// Allocate enough stacks for all APs
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m_ap_temporary_boot_stacks.ensure_capacity(aps_to_enable);
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@ -387,9 +387,9 @@ UNMAP_AFTER_INIT void APIC::setup_ap_boot_environment()
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*APIC_INIT_VAR_PTR(FlatPtr, apic_startup_region_ptr, ap_cpu_init_cr3) = MM.kernel_page_directory().cr3();
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// Store the BSP's GDT and IDT for the APs to use
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const auto& gdtr = Processor::current().get_gdtr();
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auto const& gdtr = Processor::current().get_gdtr();
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*APIC_INIT_VAR_PTR(FlatPtr, apic_startup_region_ptr, ap_cpu_gdtr) = FlatPtr(&gdtr);
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const auto& idtr = get_idtr();
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auto const& idtr = get_idtr();
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*APIC_INIT_VAR_PTR(FlatPtr, apic_startup_region_ptr, ap_cpu_idtr) = FlatPtr(&idtr);
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#if ARCH(X86_64)
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@ -656,7 +656,7 @@ u32 APIC::get_timer_divisor()
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return 16;
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}
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bool APICIPIInterruptHandler::handle_interrupt(const RegisterState&)
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bool APICIPIInterruptHandler::handle_interrupt(RegisterState const&)
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{
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dbgln_if(APIC_SMP_DEBUG, "APIC IPI on CPU #{}", Processor::current_id());
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return true;
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@ -669,7 +669,7 @@ bool APICIPIInterruptHandler::eoi()
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return true;
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}
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bool APICErrInterruptHandler::handle_interrupt(const RegisterState&)
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bool APICErrInterruptHandler::handle_interrupt(RegisterState const&)
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{
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dbgln("APIC: SMP error on CPU #{}", Processor::current_id());
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return true;
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@ -102,13 +102,13 @@ private:
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bool m_is_x2 { false };
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static PhysicalAddress get_base();
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void set_base(const PhysicalAddress& base);
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void set_base(PhysicalAddress const& base);
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void write_register(u32 offset, u32 value);
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u32 read_register(u32 offset);
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void set_lvt(u32 offset, u8 interrupt);
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void set_siv(u32 offset, u8 interrupt);
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void wait_for_pending_icr();
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void write_icr(const ICRReg& icr);
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void write_icr(ICRReg const& icr);
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void do_boot_aps();
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};
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@ -28,7 +28,7 @@ public:
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}
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// Note: this method returns boolean value, to indicate if the handler handled
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// the interrupt or not. This is useful for shared handlers mostly.
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virtual bool handle_interrupt(const RegisterState& regs) = 0;
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virtual bool handle_interrupt(RegisterState const& regs) = 0;
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void will_be_destroyed();
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bool is_registered() const { return m_registered; }
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@ -102,7 +102,7 @@ bool IOAPIC::is_enabled() const
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return !is_hard_disabled();
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}
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void IOAPIC::spurious_eoi(const GenericInterruptHandler& handler) const
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void IOAPIC::spurious_eoi(GenericInterruptHandler const& handler) const
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{
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InterruptDisabler disabler;
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VERIFY(handler.type() == HandlerType::SpuriousInterruptHandler);
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@ -241,7 +241,7 @@ Optional<int> IOAPIC::find_redirection_entry_by_vector(u8 vector) const
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return {};
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}
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void IOAPIC::disable(const GenericInterruptHandler& handler)
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void IOAPIC::disable(GenericInterruptHandler const& handler)
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{
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InterruptDisabler disabler;
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VERIFY(!is_hard_disabled());
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@ -256,7 +256,7 @@ void IOAPIC::disable(const GenericInterruptHandler& handler)
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mask_redirection_entry(found_index.value());
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}
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void IOAPIC::enable(const GenericInterruptHandler& handler)
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void IOAPIC::enable(GenericInterruptHandler const& handler)
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{
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InterruptDisabler disabler;
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VERIFY(!is_hard_disabled());
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@ -271,7 +271,7 @@ void IOAPIC::enable(const GenericInterruptHandler& handler)
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unmask_redirection_entry(found_index.value());
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}
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void IOAPIC::eoi(const GenericInterruptHandler& handler) const
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void IOAPIC::eoi(GenericInterruptHandler const& handler) const
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{
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InterruptDisabler disabler;
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VERIFY(!is_hard_disabled());
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@ -40,11 +40,11 @@ private:
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class IOAPIC final : public IRQController {
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public:
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IOAPIC(PhysicalAddress, u32 gsi_base);
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virtual void enable(const GenericInterruptHandler&) override;
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virtual void disable(const GenericInterruptHandler&) override;
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virtual void enable(GenericInterruptHandler const&) override;
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virtual void disable(GenericInterruptHandler const&) override;
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virtual void hard_disable() override;
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virtual void eoi(const GenericInterruptHandler&) const override;
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virtual void spurious_eoi(const GenericInterruptHandler&) const override;
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virtual void eoi(GenericInterruptHandler const&) const override;
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virtual void spurious_eoi(GenericInterruptHandler const&) const override;
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virtual bool is_vector_enabled(u8 number) const override;
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virtual bool is_enabled() const override;
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virtual u16 get_isr() const override;
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@ -20,14 +20,14 @@ class IRQController : public RefCounted<IRQController> {
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public:
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virtual ~IRQController() = default;
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virtual void enable(const GenericInterruptHandler&) = 0;
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virtual void disable(const GenericInterruptHandler&) = 0;
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virtual void enable(GenericInterruptHandler const&) = 0;
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virtual void disable(GenericInterruptHandler const&) = 0;
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virtual void hard_disable() { m_hard_disabled = true; }
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virtual bool is_vector_enabled(u8 number) const = 0;
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virtual bool is_enabled() const = 0;
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bool is_hard_disabled() const { return m_hard_disabled; }
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virtual void eoi(const GenericInterruptHandler&) const = 0;
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virtual void spurious_eoi(const GenericInterruptHandler&) const = 0;
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virtual void eoi(GenericInterruptHandler const&) const = 0;
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virtual void spurious_eoi(GenericInterruptHandler const&) const = 0;
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virtual size_t interrupt_vectors_count() const = 0;
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virtual u32 gsi_base() const = 0;
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virtual u16 get_isr() const = 0;
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@ -17,8 +17,8 @@ class IRQHandler : public GenericInterruptHandler {
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public:
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virtual ~IRQHandler();
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virtual bool handle_interrupt(const RegisterState& regs) override { return handle_irq(regs); }
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virtual bool handle_irq(const RegisterState&) = 0;
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virtual bool handle_interrupt(RegisterState const& regs) override { return handle_irq(regs); }
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virtual bool handle_irq(RegisterState const&) = 0;
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void enable_irq();
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void disable_irq();
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@ -56,7 +56,7 @@ public:
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RefPtr<IRQController> get_responsible_irq_controller(u8 interrupt_vector);
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RefPtr<IRQController> get_responsible_irq_controller(IRQControllerType controller_type, u8 interrupt_vector);
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const Vector<ISAInterruptOverrideMetadata>& isa_overrides() const { return m_isa_interrupt_overrides; }
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Vector<ISAInterruptOverrideMetadata> const& isa_overrides() const { return m_isa_interrupt_overrides; }
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u8 get_mapped_interrupt_vector(u8 original_irq);
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u8 get_irq_vector(u8 mapped_interrupt_vector);
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@ -45,7 +45,7 @@ bool PIC::is_enabled() const
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return !is_all_masked(m_cached_irq_mask) && !is_hard_disabled();
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}
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void PIC::disable(const GenericInterruptHandler& handler)
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void PIC::disable(GenericInterruptHandler const& handler)
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{
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InterruptDisabler disabler;
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VERIFY(!is_hard_disabled());
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@ -71,7 +71,7 @@ UNMAP_AFTER_INIT PIC::PIC()
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initialize();
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}
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void PIC::spurious_eoi(const GenericInterruptHandler& handler) const
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void PIC::spurious_eoi(GenericInterruptHandler const& handler) const
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{
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VERIFY(handler.type() == HandlerType::SpuriousInterruptHandler);
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if (handler.interrupt_number() == 7)
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@ -87,7 +87,7 @@ bool PIC::is_vector_enabled(u8 irq) const
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return m_cached_irq_mask & (1 << irq);
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}
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void PIC::enable(const GenericInterruptHandler& handler)
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void PIC::enable(GenericInterruptHandler const& handler)
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{
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InterruptDisabler disabler;
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VERIFY(!is_hard_disabled());
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@ -114,7 +114,7 @@ void PIC::enable_vector(u8 irq)
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m_cached_irq_mask &= ~(1 << irq);
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}
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void PIC::eoi(const GenericInterruptHandler& handler) const
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void PIC::eoi(GenericInterruptHandler const& handler) const
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{
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InterruptDisabler disabler;
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VERIFY(!is_hard_disabled());
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@ -17,13 +17,13 @@ static constexpr size_t pic_disabled_vector_end = 0x2f;
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class PIC final : public IRQController {
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public:
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PIC();
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virtual void enable(const GenericInterruptHandler&) override;
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virtual void disable(const GenericInterruptHandler&) override;
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virtual void enable(GenericInterruptHandler const&) override;
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virtual void disable(GenericInterruptHandler const&) override;
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virtual void hard_disable() override;
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virtual void eoi(const GenericInterruptHandler&) const override;
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virtual void eoi(GenericInterruptHandler const&) const override;
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virtual bool is_vector_enabled(u8 number) const override;
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virtual bool is_enabled() const override;
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virtual void spurious_eoi(const GenericInterruptHandler&) const override;
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virtual void spurious_eoi(GenericInterruptHandler const&) const override;
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virtual u16 get_isr() const override;
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virtual u16 get_irr() const override;
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virtual u32 gsi_base() const override { return 0; }
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@ -62,7 +62,7 @@ SharedIRQHandler::~SharedIRQHandler()
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disable_interrupt_vector();
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}
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bool SharedIRQHandler::handle_interrupt(const RegisterState& regs)
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bool SharedIRQHandler::handle_interrupt(RegisterState const& regs)
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{
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VERIFY_INTERRUPTS_DISABLED();
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@ -18,7 +18,7 @@ class SharedIRQHandler final : public GenericInterruptHandler {
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public:
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static void initialize(u8 interrupt_number);
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virtual ~SharedIRQHandler();
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virtual bool handle_interrupt(const RegisterState& regs) override;
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virtual bool handle_interrupt(RegisterState const& regs) override;
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void register_handler(GenericInterruptHandler&);
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void unregister_handler(GenericInterruptHandler&);
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@ -69,7 +69,7 @@ SpuriousInterruptHandler::SpuriousInterruptHandler(u8 irq)
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SpuriousInterruptHandler::~SpuriousInterruptHandler() = default;
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bool SpuriousInterruptHandler::handle_interrupt(const RegisterState& state)
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bool SpuriousInterruptHandler::handle_interrupt(RegisterState const& state)
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{
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// Actually check if IRQ7 or IRQ15 are spurious, and if not, call the real handler to handle the IRQ.
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if (m_responsible_irq_controller->get_isr() & (1 << interrupt_number())) {
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@ -19,7 +19,7 @@ public:
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static void initialize_for_disabled_master_pic();
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static void initialize_for_disabled_slave_pic();
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virtual ~SpuriousInterruptHandler();
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virtual bool handle_interrupt(const RegisterState& regs) override;
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virtual bool handle_interrupt(RegisterState const& regs) override;
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void register_handler(GenericInterruptHandler&);
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void unregister_handler(GenericInterruptHandler&);
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@ -13,7 +13,7 @@ UnhandledInterruptHandler::UnhandledInterruptHandler(u8 interrupt_vector)
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{
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}
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bool UnhandledInterruptHandler::handle_interrupt(const RegisterState&)
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bool UnhandledInterruptHandler::handle_interrupt(RegisterState const&)
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{
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PANIC("Interrupt: Unhandled vector {} was invoked for handle_interrupt(RegisterState&).", interrupt_number());
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}
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@ -15,7 +15,7 @@ public:
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explicit UnhandledInterruptHandler(u8 interrupt_vector);
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virtual ~UnhandledInterruptHandler();
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virtual bool handle_interrupt(const RegisterState&) override;
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virtual bool handle_interrupt(RegisterState const&) override;
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[[noreturn]] virtual bool eoi() override;
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