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Everywhere: Run clang-format
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0376c127f6
commit
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1665 changed files with 8479 additions and 8479 deletions
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@ -75,7 +75,7 @@ public:
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handler->register_interrupt_handler();
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}
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virtual bool handle_interrupt(const RegisterState&) override;
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virtual bool handle_interrupt(RegisterState const&) override;
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virtual bool eoi() override;
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@ -106,7 +106,7 @@ public:
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handler->register_interrupt_handler();
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}
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virtual bool handle_interrupt(const RegisterState&) override;
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virtual bool handle_interrupt(RegisterState const&) override;
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virtual bool eoi() override;
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@ -145,7 +145,7 @@ PhysicalAddress APIC::get_base()
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return PhysicalAddress(base & 0xfffff000);
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}
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void APIC::set_base(const PhysicalAddress& base)
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void APIC::set_base(PhysicalAddress const& base)
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{
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MSR msr(APIC_BASE_MSR);
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u64 flags = 1 << 11;
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@ -160,7 +160,7 @@ void APIC::write_register(u32 offset, u32 value)
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MSR msr(APIC_REGS_MSR_BASE + (offset >> 4));
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msr.set(value);
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} else {
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*reinterpret_cast<volatile u32*>(m_apic_base->vaddr().offset(offset).as_ptr()) = value;
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*reinterpret_cast<u32 volatile*>(m_apic_base->vaddr().offset(offset).as_ptr()) = value;
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}
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}
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@ -170,7 +170,7 @@ u32 APIC::read_register(u32 offset)
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MSR msr(APIC_REGS_MSR_BASE + (offset >> 4));
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return (u32)msr.get();
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}
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return *reinterpret_cast<volatile u32*>(m_apic_base->vaddr().offset(offset).as_ptr());
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return *reinterpret_cast<u32 volatile*>(m_apic_base->vaddr().offset(offset).as_ptr());
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}
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void APIC::set_lvt(u32 offset, u8 interrupt)
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@ -190,7 +190,7 @@ void APIC::wait_for_pending_icr()
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}
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}
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void APIC::write_icr(const ICRReg& icr)
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void APIC::write_icr(ICRReg const& icr)
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{
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if (m_is_x2) {
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MSR msr(APIC_REGS_MSR_BASE + (APIC_REG_ICR_LOW >> 4));
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@ -236,7 +236,7 @@ u8 APIC::spurious_interrupt_vector()
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}
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#define APIC_INIT_VAR_PTR(tpe, vaddr, varname) \
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reinterpret_cast<volatile tpe*>(reinterpret_cast<ptrdiff_t>(vaddr) \
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reinterpret_cast<tpe volatile*>(reinterpret_cast<ptrdiff_t>(vaddr) \
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+ reinterpret_cast<ptrdiff_t>(&varname) \
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- reinterpret_cast<ptrdiff_t>(&apic_ap_start))
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@ -349,7 +349,7 @@ UNMAP_AFTER_INIT void APIC::setup_ap_boot_environment()
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VERIFY(apic_startup_region_size < USER_RANGE_BASE);
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auto apic_startup_region = create_identity_mapped_region(PhysicalAddress(apic_startup_region_base), apic_startup_region_size);
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u8* apic_startup_region_ptr = apic_startup_region->vaddr().as_ptr();
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memcpy(apic_startup_region_ptr, reinterpret_cast<const void*>(apic_ap_start), apic_ap_start_size);
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memcpy(apic_startup_region_ptr, reinterpret_cast<void const*>(apic_ap_start), apic_ap_start_size);
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// Allocate enough stacks for all APs
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m_ap_temporary_boot_stacks.ensure_capacity(aps_to_enable);
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@ -387,9 +387,9 @@ UNMAP_AFTER_INIT void APIC::setup_ap_boot_environment()
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*APIC_INIT_VAR_PTR(FlatPtr, apic_startup_region_ptr, ap_cpu_init_cr3) = MM.kernel_page_directory().cr3();
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// Store the BSP's GDT and IDT for the APs to use
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const auto& gdtr = Processor::current().get_gdtr();
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auto const& gdtr = Processor::current().get_gdtr();
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*APIC_INIT_VAR_PTR(FlatPtr, apic_startup_region_ptr, ap_cpu_gdtr) = FlatPtr(&gdtr);
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const auto& idtr = get_idtr();
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auto const& idtr = get_idtr();
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*APIC_INIT_VAR_PTR(FlatPtr, apic_startup_region_ptr, ap_cpu_idtr) = FlatPtr(&idtr);
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#if ARCH(X86_64)
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@ -656,7 +656,7 @@ u32 APIC::get_timer_divisor()
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return 16;
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}
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bool APICIPIInterruptHandler::handle_interrupt(const RegisterState&)
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bool APICIPIInterruptHandler::handle_interrupt(RegisterState const&)
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{
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dbgln_if(APIC_SMP_DEBUG, "APIC IPI on CPU #{}", Processor::current_id());
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return true;
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@ -669,7 +669,7 @@ bool APICIPIInterruptHandler::eoi()
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return true;
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}
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bool APICErrInterruptHandler::handle_interrupt(const RegisterState&)
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bool APICErrInterruptHandler::handle_interrupt(RegisterState const&)
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{
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dbgln("APIC: SMP error on CPU #{}", Processor::current_id());
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return true;
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