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Everywhere: Run clang-format

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This commit is contained in:
Idan Horowitz 2022-04-01 20:58:27 +03:00 • committed by Linus Groh
parent 0376c127f6
commit 086969277e
1665 changed files with 8479 additions and 8479 deletions
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44
Kernel/Storage/ATA/AHCI.h
View file

@ -130,13 +130,13 @@ namespace Kernel::AHCI {
class MaskedBitField {
public:
explicit MaskedBitField(volatile u32& bitfield_register)
explicit MaskedBitField(u32 volatile& bitfield_register)
: m_bitfield(bitfield_register)
, m_bit_mask(0xffffffff)
{
}
MaskedBitField(volatile u32& bitfield_register, u32 bit_mask)
MaskedBitField(u32 volatile& bitfield_register, u32 bit_mask)
: m_bitfield(bitfield_register)
, m_bit_mask(bit_mask)
{
@ -180,14 +180,14 @@ public:
u32 bit_mask() const { return m_bit_mask; };
// Disable default implementations that would use surprising integer promotion.
bool operator==(const MaskedBitField&) const = delete;
bool operator<=(const MaskedBitField&) const = delete;
bool operator>=(const MaskedBitField&) const = delete;
bool operator<(const MaskedBitField&) const = delete;
bool operator>(const MaskedBitField&) const = delete;
bool operator==(MaskedBitField const&) const = delete;
bool operator<=(MaskedBitField const&) const = delete;
bool operator>=(MaskedBitField const&) const = delete;
bool operator<(MaskedBitField const&) const = delete;
bool operator>(MaskedBitField const&) const = delete;
private:
volatile u32& m_bitfield;
u32 volatile& m_bitfield;
const u32 m_bit_mask;
};
@ -321,7 +321,7 @@ enum SErr : u32 {
class PortInterruptStatusBitField {
public:
explicit PortInterruptStatusBitField(volatile u32& bitfield_register)
explicit PortInterruptStatusBitField(u32 volatile& bitfield_register)
: m_bitfield(bitfield_register)
{
}
@ -331,20 +331,20 @@ public:
void clear() { m_bitfield = 0xffffffff; }
// Disable default implementations that would use surprising integer promotion.
bool operator==(const MaskedBitField&) const = delete;
bool operator<=(const MaskedBitField&) const = delete;
bool operator>=(const MaskedBitField&) const = delete;
bool operator<(const MaskedBitField&) const = delete;
bool operator>(const MaskedBitField&) const = delete;
bool operator==(MaskedBitField const&) const = delete;
bool operator<=(MaskedBitField const&) const = delete;
bool operator>=(MaskedBitField const&) const = delete;
bool operator<(MaskedBitField const&) const = delete;
bool operator>(MaskedBitField const&) const = delete;
private:
volatile u32& m_bitfield;
u32 volatile& m_bitfield;
};
class PortInterruptEnableBitField {
public:
explicit PortInterruptEnableBitField(volatile u32& bitfield_register)
explicit PortInterruptEnableBitField(u32 volatile& bitfield_register)
: m_bitfield(bitfield_register)
{
}
@ -357,14 +357,14 @@ public:
void set_all() { m_bitfield = 0xffffffff; }
// Disable default implementations that would use surprising integer promotion.
bool operator==(const MaskedBitField&) const = delete;
bool operator<=(const MaskedBitField&) const = delete;
bool operator>=(const MaskedBitField&) const = delete;
bool operator<(const MaskedBitField&) const = delete;
bool operator>(const MaskedBitField&) const = delete;
bool operator==(MaskedBitField const&) const = delete;
bool operator<=(MaskedBitField const&) const = delete;
bool operator>=(MaskedBitField const&) const = delete;
bool operator<(MaskedBitField const&) const = delete;
bool operator>(MaskedBitField const&) const = delete;
private:
volatile u32& m_bitfield;
u32 volatile& m_bitfield;
};
struct [[gnu::packed]] PortRegisters {

6
Kernel/Storage/ATA/AHCIController.cpp
View file

@ -51,7 +51,7 @@ size_t AHCIController::devices_count() const
{
size_t count = 0;
for (auto& port_handler : m_handlers) {
port_handler.enumerate_ports([&](const AHCIPort& port) {
port_handler.enumerate_ports([&](AHCIPort const& port) {
if (port.connected_device())
count++;
});
@ -59,7 +59,7 @@ size_t AHCIController::devices_count() const
return count;
}
void AHCIController::start_request(const ATADevice& device, AsyncBlockDeviceRequest& request)
void AHCIController::start_request(ATADevice const& device, AsyncBlockDeviceRequest& request)
{
// FIXME: For now we have one port handler, check all of them...
VERIFY(m_handlers.size() > 0);
@ -154,7 +154,7 @@ void AHCIController::initialize_hba(PCI::DeviceIdentifier const& pci_device_iden
PCI::enable_bus_mastering(pci_address());
enable_global_interrupts();
m_handlers.append(AHCIPortHandler::create(*this, pci_device_identifier.interrupt_line().value(),
AHCI::MaskedBitField((volatile u32&)(hba().control_regs.pi))));
AHCI::MaskedBitField((u32 volatile&)(hba().control_regs.pi))));
}
void AHCIController::disable_global_interrupts() const

2
Kernel/Storage/ATA/AHCIController.h
View file

@ -32,7 +32,7 @@ public:
virtual bool reset() override;
virtual bool shutdown() override;
virtual size_t devices_count() const override;
virtual void start_request(const ATADevice&, AsyncBlockDeviceRequest&) override;
virtual void start_request(ATADevice const&, AsyncBlockDeviceRequest&) override;
virtual void complete_current_request(AsyncDeviceRequest::RequestResult) override;
const AHCI::HBADefinedCapabilities& hba_capabilities() const { return m_capabilities; };

10
Kernel/Storage/ATA/AHCIPort.cpp
View file

@ -20,17 +20,17 @@
namespace Kernel {
NonnullRefPtr<AHCIPort> AHCIPort::create(const AHCIPortHandler& handler, volatile AHCI::PortRegisters& registers, u32 port_index)
NonnullRefPtr<AHCIPort> AHCIPort::create(AHCIPortHandler const& handler, volatile AHCI::PortRegisters& registers, u32 port_index)
{
return adopt_ref(*new AHCIPort(handler, registers, port_index));
}
AHCIPort::AHCIPort(const AHCIPortHandler& handler, volatile AHCI::PortRegisters& registers, u32 port_index)
AHCIPort::AHCIPort(AHCIPortHandler const& handler, volatile AHCI::PortRegisters& registers, u32 port_index)
: m_port_index(port_index)
, m_port_registers(registers)
, m_parent_handler(handler)
, m_interrupt_status((volatile u32&)m_port_registers.is)
, m_interrupt_enable((volatile u32&)m_port_registers.ie)
, m_interrupt_status((u32 volatile&)m_port_registers.is)
, m_interrupt_enable((u32 volatile&)m_port_registers.ie)
{
if (is_interface_disabled()) {
m_disabled_by_firmware = true;
@ -319,7 +319,7 @@ bool AHCIPort::initialize()
return true;
}
const char* AHCIPort::try_disambiguate_sata_status()
char const* AHCIPort::try_disambiguate_sata_status()
{
switch (m_port_registers.ssts & 0xf) {
case 0:

6
Kernel/Storage/ATA/AHCIPort.h
View file

@ -37,7 +37,7 @@ class AHCIPort
friend class AHCIController;
public:
UNMAP_AFTER_INIT static NonnullRefPtr<AHCIPort> create(const AHCIPortHandler&, volatile AHCI::PortRegisters&, u32 port_index);
UNMAP_AFTER_INIT static NonnullRefPtr<AHCIPort> create(AHCIPortHandler const&, volatile AHCI::PortRegisters&, u32 port_index);
u32 port_index() const { return m_port_index; }
u32 representative_port_index() const { return port_index() + 1; }
@ -54,13 +54,13 @@ private:
bool is_phy_enabled() const { return (m_port_registers.ssts & 0xf) == 3; }
bool initialize();
UNMAP_AFTER_INIT AHCIPort(const AHCIPortHandler&, volatile AHCI::PortRegisters&, u32 port_index);
UNMAP_AFTER_INIT AHCIPort(AHCIPortHandler const&, volatile AHCI::PortRegisters&, u32 port_index);
ALWAYS_INLINE void clear_sata_error_register() const;
void eject();
const char* try_disambiguate_sata_status();
char const* try_disambiguate_sata_status();
void try_disambiguate_sata_error();
bool initiate_sata_reset();

6
Kernel/Storage/ATA/AHCIPortHandler.cpp
View file

@ -46,7 +46,7 @@ AHCIPortHandler::AHCIPortHandler(AHCIController& controller, u8 irq, AHCI::Maske
}
}
void AHCIPortHandler::enumerate_ports(Function<void(const AHCIPort&)> callback) const
void AHCIPortHandler::enumerate_ports(Function<void(AHCIPort const&)> callback) const
{
for (auto& port : m_handled_ports) {
callback(*port.value);
@ -70,7 +70,7 @@ PhysicalAddress AHCIPortHandler::get_identify_metadata_physical_region(u32 port_
AHCI::MaskedBitField AHCIPortHandler::create_pending_ports_interrupts_bitfield() const
{
return AHCI::MaskedBitField((volatile u32&)m_parent_controller->hba().control_regs.is, m_taken_ports.bit_mask());
return AHCI::MaskedBitField((u32 volatile&)m_parent_controller->hba().control_regs.is, m_taken_ports.bit_mask());
}
AHCI::HBADefinedCapabilities AHCIPortHandler::hba_capabilities() const
@ -80,7 +80,7 @@ AHCI::HBADefinedCapabilities AHCIPortHandler::hba_capabilities() const
AHCIPortHandler::~AHCIPortHandler() = default;
bool AHCIPortHandler::handle_irq(const RegisterState&)
bool AHCIPortHandler::handle_irq(RegisterState const&)
{
dbgln_if(AHCI_DEBUG, "AHCI Port Handler: IRQ received");
if (m_pending_ports_interrupts.is_zeroed())

4
Kernel/Storage/ATA/AHCIPortHandler.h
View file

@ -47,7 +47,7 @@ private:
UNMAP_AFTER_INIT AHCIPortHandler(AHCIController&, u8 irq, AHCI::MaskedBitField taken_ports);
//^ IRQHandler
virtual bool handle_irq(const RegisterState&) override;
virtual bool handle_irq(RegisterState const&) override;
enum class Direction : u8 {
Read,
@ -59,7 +59,7 @@ private:
void start_request(AsyncBlockDeviceRequest&, bool, bool, u16);
void complete_current_request(AsyncDeviceRequest::RequestResult);
void enumerate_ports(Function<void(const AHCIPort&)> callback) const;
void enumerate_ports(Function<void(AHCIPort const&)> callback) const;
RefPtr<AHCIPort> port_at_index(u32 port_index) const;
// Data members

2
Kernel/Storage/ATA/ATAController.h
View file

@ -21,7 +21,7 @@ class ATAController
: public StorageController
, public Weakable<ATAController> {
public:
virtual void start_request(const ATADevice&, AsyncBlockDeviceRequest&) = 0;
virtual void start_request(ATADevice const&, AsyncBlockDeviceRequest&) = 0;
protected:
ATAController() = default;

2
Kernel/Storage/ATA/ATADevice.cpp
View file

@ -13,7 +13,7 @@
namespace Kernel {
ATADevice::ATADevice(const ATAController& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
ATADevice::ATADevice(ATAController const& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
: StorageDevice(StorageManagement::storage_type_major_number(), minor_number, logical_sector_size, max_addressable_block, move(early_storage_name))
, m_controller(controller)
, m_ata_address(ata_address)

4
Kernel/Storage/ATA/ATADevice.h
View file

@ -33,10 +33,10 @@ public:
virtual void start_request(AsyncBlockDeviceRequest&) override;
u16 ata_capabilites() const { return m_capabilities; }
const Address& ata_address() const { return m_ata_address; }
Address const& ata_address() const { return m_ata_address; }
protected:
ATADevice(const ATAController&, Address, MinorNumber, u16, u16, u64, NonnullOwnPtr<KString>);
ATADevice(ATAController const&, Address, MinorNumber, u16, u16, u64, NonnullOwnPtr<KString>);
WeakPtr<ATAController> m_controller;
const Address m_ata_address;

4
Kernel/Storage/ATA/ATADiskDevice.cpp
View file

@ -14,7 +14,7 @@
namespace Kernel {
NonnullRefPtr<ATADiskDevice> ATADiskDevice::create(const ATAController& controller, ATADevice::Address ata_address, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block)
NonnullRefPtr<ATADiskDevice> ATADiskDevice::create(ATAController const& controller, ATADevice::Address ata_address, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block)
{
auto minor_device_number = StorageManagement::generate_storage_minor_number();
@ -26,7 +26,7 @@ NonnullRefPtr<ATADiskDevice> ATADiskDevice::create(const ATAController& controll
return disk_device_or_error.release_value();
}
ATADiskDevice::ATADiskDevice(const ATAController& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
ATADiskDevice::ATADiskDevice(ATAController const& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
: ATADevice(controller, ata_address, minor_number, capabilities, logical_sector_size, max_addressable_block, move(early_storage_name))
{
}

4
Kernel/Storage/ATA/ATADiskDevice.h
View file

@ -19,14 +19,14 @@ class ATADiskDevice final : public ATADevice {
friend class DeviceManagement;
public:
static NonnullRefPtr<ATADiskDevice> create(const ATAController&, ATADevice::Address, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block);
static NonnullRefPtr<ATADiskDevice> create(ATAController const&, ATADevice::Address, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block);
virtual ~ATADiskDevice() override;
// ^StorageDevice
virtual CommandSet command_set() const override { return CommandSet::ATA; }
private:
ATADiskDevice(const ATAController&, Address, MinorNumber, u16, u16, u64, NonnullOwnPtr<KString>);
ATADiskDevice(ATAController const&, Address, MinorNumber, u16, u16, u64, NonnullOwnPtr<KString>);
// ^DiskDevice
virtual StringView class_name() const override;

4
Kernel/Storage/ATA/ATAPIDiscDevice.cpp
View file

@ -14,7 +14,7 @@
namespace Kernel {
NonnullRefPtr<ATAPIDiscDevice> ATAPIDiscDevice::create(const ATAController& controller, ATADevice::Address ata_address, u16 capabilities, u64 max_addressable_block)
NonnullRefPtr<ATAPIDiscDevice> ATAPIDiscDevice::create(ATAController const& controller, ATADevice::Address ata_address, u16 capabilities, u64 max_addressable_block)
{
auto minor_device_number = StorageManagement::generate_storage_minor_number();
@ -26,7 +26,7 @@ NonnullRefPtr<ATAPIDiscDevice> ATAPIDiscDevice::create(const ATAController& cont
return disc_device_or_error.release_value();
}
ATAPIDiscDevice::ATAPIDiscDevice(const ATAController& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
ATAPIDiscDevice::ATAPIDiscDevice(ATAController const& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
: ATADevice(controller, ata_address, minor_number, capabilities, 0, max_addressable_block, move(early_storage_name))
{
}

4
Kernel/Storage/ATA/ATAPIDiscDevice.h
View file

@ -19,14 +19,14 @@ class ATAPIDiscDevice final : public ATADevice {
friend class DeviceManagement;
public:
static NonnullRefPtr<ATAPIDiscDevice> create(const ATAController&, ATADevice::Address, u16 capabilities, u64 max_addressable_block);
static NonnullRefPtr<ATAPIDiscDevice> create(ATAController const&, ATADevice::Address, u16 capabilities, u64 max_addressable_block);
virtual ~ATAPIDiscDevice() override;
// ^StorageDevice
virtual CommandSet command_set() const override { return CommandSet::SCSI; }
private:
ATAPIDiscDevice(const ATAController&, Address, MinorNumber, u16, u64, NonnullOwnPtr<KString>);
ATAPIDiscDevice(ATAController const&, Address, MinorNumber, u16, u64, NonnullOwnPtr<KString>);
// ^DiskDevice
virtual StringView class_name() const override;

10
Kernel/Storage/ATA/BMIDEChannel.cpp
View file

@ -13,23 +13,23 @@
namespace Kernel {
UNMAP_AFTER_INIT NonnullRefPtr<BMIDEChannel> BMIDEChannel::create(const IDEController& ide_controller, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
UNMAP_AFTER_INIT NonnullRefPtr<BMIDEChannel> BMIDEChannel::create(IDEController const& ide_controller, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
{
return adopt_ref(*new BMIDEChannel(ide_controller, io_group, type));
}
UNMAP_AFTER_INIT NonnullRefPtr<BMIDEChannel> BMIDEChannel::create(const IDEController& ide_controller, u8 irq, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
UNMAP_AFTER_INIT NonnullRefPtr<BMIDEChannel> BMIDEChannel::create(IDEController const& ide_controller, u8 irq, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
{
return adopt_ref(*new BMIDEChannel(ide_controller, irq, io_group, type));
}
UNMAP_AFTER_INIT BMIDEChannel::BMIDEChannel(const IDEController& controller, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
UNMAP_AFTER_INIT BMIDEChannel::BMIDEChannel(IDEController const& controller, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
: IDEChannel(controller, io_group, type)
{
initialize();
}
UNMAP_AFTER_INIT BMIDEChannel::BMIDEChannel(const IDEController& controller, u8 irq, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
UNMAP_AFTER_INIT BMIDEChannel::BMIDEChannel(IDEController const& controller, u8 irq, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
: IDEChannel(controller, irq, io_group, type)
{
initialize();
@ -71,7 +71,7 @@ static void print_ide_status(u8 status)
(status & ATA_SR_ERR) != 0);
}
bool BMIDEChannel::handle_irq(const RegisterState&)
bool BMIDEChannel::handle_irq(RegisterState const&)
{
u8 status = m_io_group.io_base().offset(ATA_REG_STATUS).in<u8>();

10
Kernel/Storage/ATA/BMIDEChannel.h
View file

@ -25,21 +25,21 @@ class BMIDEChannel final : public IDEChannel {
friend class PATADiskDevice;
public:
static NonnullRefPtr<BMIDEChannel> create(const IDEController&, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
static NonnullRefPtr<BMIDEChannel> create(const IDEController&, u8 irq, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
static NonnullRefPtr<BMIDEChannel> create(IDEController const&, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
static NonnullRefPtr<BMIDEChannel> create(IDEController const&, u8 irq, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
virtual ~BMIDEChannel() override {};
virtual bool is_dma_enabled() const override { return true; };
private:
BMIDEChannel(const IDEController&, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
BMIDEChannel(const IDEController&, u8 irq, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
BMIDEChannel(IDEController const&, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
BMIDEChannel(IDEController const&, u8 irq, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
void initialize();
void complete_current_request(AsyncDeviceRequest::RequestResult);
//^ IRQHandler
virtual bool handle_irq(const RegisterState&) override;
virtual bool handle_irq(RegisterState const&) override;
//* IDEChannel
virtual void send_ata_io_command(LBAMode lba_mode, Direction direction) const override;

12
Kernel/Storage/ATA/IDEChannel.cpp
View file

@ -22,12 +22,12 @@ namespace Kernel {
#define PATA_PRIMARY_IRQ 14
#define PATA_SECONDARY_IRQ 15
UNMAP_AFTER_INIT NonnullRefPtr<IDEChannel> IDEChannel::create(const IDEController& controller, IOAddressGroup io_group, ChannelType type)
UNMAP_AFTER_INIT NonnullRefPtr<IDEChannel> IDEChannel::create(IDEController const& controller, IOAddressGroup io_group, ChannelType type)
{
return adopt_ref(*new IDEChannel(controller, io_group, type));
}
UNMAP_AFTER_INIT NonnullRefPtr<IDEChannel> IDEChannel::create(const IDEController& controller, u8 irq, IOAddressGroup io_group, ChannelType type)
UNMAP_AFTER_INIT NonnullRefPtr<IDEChannel> IDEChannel::create(IDEController const& controller, u8 irq, IOAddressGroup io_group, ChannelType type)
{
return adopt_ref(*new IDEChannel(controller, irq, io_group, type));
}
@ -77,7 +77,7 @@ UNMAP_AFTER_INIT void IDEChannel::initialize()
clear_pending_interrupts();
}
UNMAP_AFTER_INIT IDEChannel::IDEChannel(const IDEController& controller, u8 irq, IOAddressGroup io_group, ChannelType type)
UNMAP_AFTER_INIT IDEChannel::IDEChannel(IDEController const& controller, u8 irq, IOAddressGroup io_group, ChannelType type)
: IRQHandler(irq)
, m_channel_type(type)
, m_io_group(io_group)
@ -86,7 +86,7 @@ UNMAP_AFTER_INIT IDEChannel::IDEChannel(const IDEController& controller, u8 irq,
initialize();
}
UNMAP_AFTER_INIT IDEChannel::IDEChannel(const IDEController& controller, IOAddressGroup io_group, ChannelType type)
UNMAP_AFTER_INIT IDEChannel::IDEChannel(IDEController const& controller, IOAddressGroup io_group, ChannelType type)
: IRQHandler(type == ChannelType::Primary ? PATA_PRIMARY_IRQ : PATA_SECONDARY_IRQ)
, m_channel_type(type)
, m_io_group(io_group)
@ -188,7 +188,7 @@ void IDEChannel::try_disambiguate_error()
}
}
bool IDEChannel::handle_irq(const RegisterState&)
bool IDEChannel::handle_irq(RegisterState const&)
{
u8 status = m_io_group.io_base().offset(ATA_REG_STATUS).in<u8>();
@ -394,7 +394,7 @@ UNMAP_AFTER_INIT void IDEChannel::detect_disks()
for (u32 i = 93; i > 54 && bbuf[i] == ' '; --i)
bbuf[i] = 0;
volatile ATAIdentifyBlock& identify_block = (volatile ATAIdentifyBlock&)(*wbuf.data());
ATAIdentifyBlock volatile& identify_block = (ATAIdentifyBlock volatile&)(*wbuf.data());
u16 capabilities = identify_block.capabilities[0];

20
Kernel/Storage/ATA/IDEChannel.h
View file

@ -74,11 +74,11 @@ public:
IOAddressGroup(IOAddressGroup const&) = default;
// Disable default implementations that would use surprising integer promotion.
bool operator==(const IOAddressGroup&) const = delete;
bool operator<=(const IOAddressGroup&) const = delete;
bool operator>=(const IOAddressGroup&) const = delete;
bool operator<(const IOAddressGroup&) const = delete;
bool operator>(const IOAddressGroup&) const = delete;
bool operator==(IOAddressGroup const&) const = delete;
bool operator<=(IOAddressGroup const&) const = delete;
bool operator>=(IOAddressGroup const&) const = delete;
bool operator<(IOAddressGroup const&) const = delete;
bool operator>(IOAddressGroup const&) const = delete;
IOAddress io_base() const { return m_io_base; };
IOAddress control_base() const { return m_control_base; }
@ -91,8 +91,8 @@ public:
};
public:
static NonnullRefPtr<IDEChannel> create(const IDEController&, IOAddressGroup, ChannelType type);
static NonnullRefPtr<IDEChannel> create(const IDEController&, u8 irq, IOAddressGroup, ChannelType type);
static NonnullRefPtr<IDEChannel> create(IDEController const&, IOAddressGroup, ChannelType type);
static NonnullRefPtr<IDEChannel> create(IDEController const&, u8 irq, IOAddressGroup, ChannelType type);
virtual ~IDEChannel() override;
RefPtr<StorageDevice> master_device() const;
@ -119,10 +119,10 @@ protected:
Write,
};
IDEChannel(const IDEController&, IOAddressGroup, ChannelType type);
IDEChannel(const IDEController&, u8 irq, IOAddressGroup, ChannelType type);
IDEChannel(IDEController const&, IOAddressGroup, ChannelType type);
IDEChannel(IDEController const&, u8 irq, IOAddressGroup, ChannelType type);
//^ IRQHandler
virtual bool handle_irq(const RegisterState&) override;
virtual bool handle_irq(RegisterState const&) override;
virtual void send_ata_io_command(LBAMode lba_mode, Direction direction) const;

2
Kernel/Storage/ATA/IDEController.cpp
View file

@ -41,7 +41,7 @@ size_t IDEController::devices_count() const
return count;
}
void IDEController::start_request(const ATADevice& device, AsyncBlockDeviceRequest& request)
void IDEController::start_request(ATADevice const& device, AsyncBlockDeviceRequest& request)
{
auto& address = device.ata_address();
VERIFY(address.subport < 2);

2
Kernel/Storage/ATA/IDEController.h
View file

@ -26,7 +26,7 @@ public:
virtual bool reset() override final;
virtual bool shutdown() override final;
virtual size_t devices_count() const override final;
virtual void start_request(const ATADevice&, AsyncBlockDeviceRequest&) override final;
virtual void start_request(ATADevice const&, AsyncBlockDeviceRequest&) override final;
virtual void complete_current_request(AsyncDeviceRequest::RequestResult) override final;
protected:

2
Kernel/Storage/ATA/PCIIDEController.cpp
View file

@ -53,7 +53,7 @@ bool PCIIDEController::is_bus_master_capable() const
return m_prog_if.value() & (1 << 7);
}
static const char* detect_controller_type(u8 programming_value)
static char const* detect_controller_type(u8 programming_value)
{
switch (programming_value) {
case 0x00: