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https://github.com/RGBCube/serenity
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Everywhere: Run clang-format
This commit is contained in:
parent
0376c127f6
commit
086969277e
1665 changed files with 8479 additions and 8479 deletions
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@ -130,13 +130,13 @@ namespace Kernel::AHCI {
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class MaskedBitField {
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public:
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explicit MaskedBitField(volatile u32& bitfield_register)
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explicit MaskedBitField(u32 volatile& bitfield_register)
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: m_bitfield(bitfield_register)
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, m_bit_mask(0xffffffff)
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{
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}
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MaskedBitField(volatile u32& bitfield_register, u32 bit_mask)
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MaskedBitField(u32 volatile& bitfield_register, u32 bit_mask)
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: m_bitfield(bitfield_register)
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, m_bit_mask(bit_mask)
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{
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@ -180,14 +180,14 @@ public:
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u32 bit_mask() const { return m_bit_mask; };
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// Disable default implementations that would use surprising integer promotion.
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bool operator==(const MaskedBitField&) const = delete;
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bool operator<=(const MaskedBitField&) const = delete;
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bool operator>=(const MaskedBitField&) const = delete;
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bool operator<(const MaskedBitField&) const = delete;
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bool operator>(const MaskedBitField&) const = delete;
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bool operator==(MaskedBitField const&) const = delete;
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bool operator<=(MaskedBitField const&) const = delete;
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bool operator>=(MaskedBitField const&) const = delete;
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bool operator<(MaskedBitField const&) const = delete;
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bool operator>(MaskedBitField const&) const = delete;
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private:
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volatile u32& m_bitfield;
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u32 volatile& m_bitfield;
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const u32 m_bit_mask;
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};
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@ -321,7 +321,7 @@ enum SErr : u32 {
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class PortInterruptStatusBitField {
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public:
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explicit PortInterruptStatusBitField(volatile u32& bitfield_register)
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explicit PortInterruptStatusBitField(u32 volatile& bitfield_register)
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: m_bitfield(bitfield_register)
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{
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}
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@ -331,20 +331,20 @@ public:
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void clear() { m_bitfield = 0xffffffff; }
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// Disable default implementations that would use surprising integer promotion.
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bool operator==(const MaskedBitField&) const = delete;
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bool operator<=(const MaskedBitField&) const = delete;
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bool operator>=(const MaskedBitField&) const = delete;
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bool operator<(const MaskedBitField&) const = delete;
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bool operator>(const MaskedBitField&) const = delete;
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bool operator==(MaskedBitField const&) const = delete;
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bool operator<=(MaskedBitField const&) const = delete;
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bool operator>=(MaskedBitField const&) const = delete;
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bool operator<(MaskedBitField const&) const = delete;
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bool operator>(MaskedBitField const&) const = delete;
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private:
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volatile u32& m_bitfield;
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u32 volatile& m_bitfield;
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};
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class PortInterruptEnableBitField {
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public:
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explicit PortInterruptEnableBitField(volatile u32& bitfield_register)
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explicit PortInterruptEnableBitField(u32 volatile& bitfield_register)
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: m_bitfield(bitfield_register)
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{
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}
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@ -357,14 +357,14 @@ public:
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void set_all() { m_bitfield = 0xffffffff; }
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// Disable default implementations that would use surprising integer promotion.
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bool operator==(const MaskedBitField&) const = delete;
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bool operator<=(const MaskedBitField&) const = delete;
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bool operator>=(const MaskedBitField&) const = delete;
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bool operator<(const MaskedBitField&) const = delete;
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bool operator>(const MaskedBitField&) const = delete;
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bool operator==(MaskedBitField const&) const = delete;
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bool operator<=(MaskedBitField const&) const = delete;
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bool operator>=(MaskedBitField const&) const = delete;
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bool operator<(MaskedBitField const&) const = delete;
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bool operator>(MaskedBitField const&) const = delete;
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private:
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volatile u32& m_bitfield;
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u32 volatile& m_bitfield;
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};
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struct [[gnu::packed]] PortRegisters {
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@ -51,7 +51,7 @@ size_t AHCIController::devices_count() const
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{
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size_t count = 0;
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for (auto& port_handler : m_handlers) {
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port_handler.enumerate_ports([&](const AHCIPort& port) {
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port_handler.enumerate_ports([&](AHCIPort const& port) {
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if (port.connected_device())
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count++;
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});
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@ -59,7 +59,7 @@ size_t AHCIController::devices_count() const
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return count;
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}
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void AHCIController::start_request(const ATADevice& device, AsyncBlockDeviceRequest& request)
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void AHCIController::start_request(ATADevice const& device, AsyncBlockDeviceRequest& request)
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{
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// FIXME: For now we have one port handler, check all of them...
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VERIFY(m_handlers.size() > 0);
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@ -154,7 +154,7 @@ void AHCIController::initialize_hba(PCI::DeviceIdentifier const& pci_device_iden
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PCI::enable_bus_mastering(pci_address());
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enable_global_interrupts();
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m_handlers.append(AHCIPortHandler::create(*this, pci_device_identifier.interrupt_line().value(),
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AHCI::MaskedBitField((volatile u32&)(hba().control_regs.pi))));
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AHCI::MaskedBitField((u32 volatile&)(hba().control_regs.pi))));
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}
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void AHCIController::disable_global_interrupts() const
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@ -32,7 +32,7 @@ public:
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virtual bool reset() override;
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virtual bool shutdown() override;
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virtual size_t devices_count() const override;
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virtual void start_request(const ATADevice&, AsyncBlockDeviceRequest&) override;
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virtual void start_request(ATADevice const&, AsyncBlockDeviceRequest&) override;
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virtual void complete_current_request(AsyncDeviceRequest::RequestResult) override;
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const AHCI::HBADefinedCapabilities& hba_capabilities() const { return m_capabilities; };
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@ -20,17 +20,17 @@
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namespace Kernel {
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NonnullRefPtr<AHCIPort> AHCIPort::create(const AHCIPortHandler& handler, volatile AHCI::PortRegisters& registers, u32 port_index)
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NonnullRefPtr<AHCIPort> AHCIPort::create(AHCIPortHandler const& handler, volatile AHCI::PortRegisters& registers, u32 port_index)
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{
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return adopt_ref(*new AHCIPort(handler, registers, port_index));
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}
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AHCIPort::AHCIPort(const AHCIPortHandler& handler, volatile AHCI::PortRegisters& registers, u32 port_index)
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AHCIPort::AHCIPort(AHCIPortHandler const& handler, volatile AHCI::PortRegisters& registers, u32 port_index)
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: m_port_index(port_index)
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, m_port_registers(registers)
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, m_parent_handler(handler)
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, m_interrupt_status((volatile u32&)m_port_registers.is)
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, m_interrupt_enable((volatile u32&)m_port_registers.ie)
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, m_interrupt_status((u32 volatile&)m_port_registers.is)
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, m_interrupt_enable((u32 volatile&)m_port_registers.ie)
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{
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if (is_interface_disabled()) {
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m_disabled_by_firmware = true;
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@ -319,7 +319,7 @@ bool AHCIPort::initialize()
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return true;
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}
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const char* AHCIPort::try_disambiguate_sata_status()
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char const* AHCIPort::try_disambiguate_sata_status()
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{
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switch (m_port_registers.ssts & 0xf) {
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case 0:
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@ -37,7 +37,7 @@ class AHCIPort
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friend class AHCIController;
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public:
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UNMAP_AFTER_INIT static NonnullRefPtr<AHCIPort> create(const AHCIPortHandler&, volatile AHCI::PortRegisters&, u32 port_index);
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UNMAP_AFTER_INIT static NonnullRefPtr<AHCIPort> create(AHCIPortHandler const&, volatile AHCI::PortRegisters&, u32 port_index);
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u32 port_index() const { return m_port_index; }
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u32 representative_port_index() const { return port_index() + 1; }
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@ -54,13 +54,13 @@ private:
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bool is_phy_enabled() const { return (m_port_registers.ssts & 0xf) == 3; }
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bool initialize();
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UNMAP_AFTER_INIT AHCIPort(const AHCIPortHandler&, volatile AHCI::PortRegisters&, u32 port_index);
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UNMAP_AFTER_INIT AHCIPort(AHCIPortHandler const&, volatile AHCI::PortRegisters&, u32 port_index);
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ALWAYS_INLINE void clear_sata_error_register() const;
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void eject();
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const char* try_disambiguate_sata_status();
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char const* try_disambiguate_sata_status();
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void try_disambiguate_sata_error();
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bool initiate_sata_reset();
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@ -46,7 +46,7 @@ AHCIPortHandler::AHCIPortHandler(AHCIController& controller, u8 irq, AHCI::Maske
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}
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}
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void AHCIPortHandler::enumerate_ports(Function<void(const AHCIPort&)> callback) const
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void AHCIPortHandler::enumerate_ports(Function<void(AHCIPort const&)> callback) const
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{
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for (auto& port : m_handled_ports) {
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callback(*port.value);
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@ -70,7 +70,7 @@ PhysicalAddress AHCIPortHandler::get_identify_metadata_physical_region(u32 port_
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AHCI::MaskedBitField AHCIPortHandler::create_pending_ports_interrupts_bitfield() const
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{
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return AHCI::MaskedBitField((volatile u32&)m_parent_controller->hba().control_regs.is, m_taken_ports.bit_mask());
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return AHCI::MaskedBitField((u32 volatile&)m_parent_controller->hba().control_regs.is, m_taken_ports.bit_mask());
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}
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AHCI::HBADefinedCapabilities AHCIPortHandler::hba_capabilities() const
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@ -80,7 +80,7 @@ AHCI::HBADefinedCapabilities AHCIPortHandler::hba_capabilities() const
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AHCIPortHandler::~AHCIPortHandler() = default;
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bool AHCIPortHandler::handle_irq(const RegisterState&)
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bool AHCIPortHandler::handle_irq(RegisterState const&)
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{
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dbgln_if(AHCI_DEBUG, "AHCI Port Handler: IRQ received");
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if (m_pending_ports_interrupts.is_zeroed())
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@ -47,7 +47,7 @@ private:
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UNMAP_AFTER_INIT AHCIPortHandler(AHCIController&, u8 irq, AHCI::MaskedBitField taken_ports);
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//^ IRQHandler
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virtual bool handle_irq(const RegisterState&) override;
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virtual bool handle_irq(RegisterState const&) override;
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enum class Direction : u8 {
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Read,
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void start_request(AsyncBlockDeviceRequest&, bool, bool, u16);
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void complete_current_request(AsyncDeviceRequest::RequestResult);
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void enumerate_ports(Function<void(const AHCIPort&)> callback) const;
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void enumerate_ports(Function<void(AHCIPort const&)> callback) const;
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RefPtr<AHCIPort> port_at_index(u32 port_index) const;
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// Data members
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@ -21,7 +21,7 @@ class ATAController
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: public StorageController
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, public Weakable<ATAController> {
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public:
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virtual void start_request(const ATADevice&, AsyncBlockDeviceRequest&) = 0;
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virtual void start_request(ATADevice const&, AsyncBlockDeviceRequest&) = 0;
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protected:
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ATAController() = default;
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@ -13,7 +13,7 @@
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namespace Kernel {
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ATADevice::ATADevice(const ATAController& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
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ATADevice::ATADevice(ATAController const& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
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: StorageDevice(StorageManagement::storage_type_major_number(), minor_number, logical_sector_size, max_addressable_block, move(early_storage_name))
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, m_controller(controller)
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, m_ata_address(ata_address)
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@ -33,10 +33,10 @@ public:
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virtual void start_request(AsyncBlockDeviceRequest&) override;
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u16 ata_capabilites() const { return m_capabilities; }
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const Address& ata_address() const { return m_ata_address; }
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Address const& ata_address() const { return m_ata_address; }
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protected:
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ATADevice(const ATAController&, Address, MinorNumber, u16, u16, u64, NonnullOwnPtr<KString>);
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ATADevice(ATAController const&, Address, MinorNumber, u16, u16, u64, NonnullOwnPtr<KString>);
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WeakPtr<ATAController> m_controller;
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const Address m_ata_address;
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@ -14,7 +14,7 @@
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namespace Kernel {
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NonnullRefPtr<ATADiskDevice> ATADiskDevice::create(const ATAController& controller, ATADevice::Address ata_address, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block)
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NonnullRefPtr<ATADiskDevice> ATADiskDevice::create(ATAController const& controller, ATADevice::Address ata_address, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block)
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{
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auto minor_device_number = StorageManagement::generate_storage_minor_number();
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@ -26,7 +26,7 @@ NonnullRefPtr<ATADiskDevice> ATADiskDevice::create(const ATAController& controll
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return disk_device_or_error.release_value();
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}
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ATADiskDevice::ATADiskDevice(const ATAController& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
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ATADiskDevice::ATADiskDevice(ATAController const& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
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: ATADevice(controller, ata_address, minor_number, capabilities, logical_sector_size, max_addressable_block, move(early_storage_name))
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{
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}
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@ -19,14 +19,14 @@ class ATADiskDevice final : public ATADevice {
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friend class DeviceManagement;
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public:
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static NonnullRefPtr<ATADiskDevice> create(const ATAController&, ATADevice::Address, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block);
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static NonnullRefPtr<ATADiskDevice> create(ATAController const&, ATADevice::Address, u16 capabilities, u16 logical_sector_size, u64 max_addressable_block);
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virtual ~ATADiskDevice() override;
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// ^StorageDevice
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virtual CommandSet command_set() const override { return CommandSet::ATA; }
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private:
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ATADiskDevice(const ATAController&, Address, MinorNumber, u16, u16, u64, NonnullOwnPtr<KString>);
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ATADiskDevice(ATAController const&, Address, MinorNumber, u16, u16, u64, NonnullOwnPtr<KString>);
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// ^DiskDevice
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virtual StringView class_name() const override;
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@ -14,7 +14,7 @@
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namespace Kernel {
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NonnullRefPtr<ATAPIDiscDevice> ATAPIDiscDevice::create(const ATAController& controller, ATADevice::Address ata_address, u16 capabilities, u64 max_addressable_block)
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NonnullRefPtr<ATAPIDiscDevice> ATAPIDiscDevice::create(ATAController const& controller, ATADevice::Address ata_address, u16 capabilities, u64 max_addressable_block)
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{
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auto minor_device_number = StorageManagement::generate_storage_minor_number();
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@ -26,7 +26,7 @@ NonnullRefPtr<ATAPIDiscDevice> ATAPIDiscDevice::create(const ATAController& cont
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return disc_device_or_error.release_value();
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}
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ATAPIDiscDevice::ATAPIDiscDevice(const ATAController& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
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ATAPIDiscDevice::ATAPIDiscDevice(ATAController const& controller, ATADevice::Address ata_address, MinorNumber minor_number, u16 capabilities, u64 max_addressable_block, NonnullOwnPtr<KString> early_storage_name)
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: ATADevice(controller, ata_address, minor_number, capabilities, 0, max_addressable_block, move(early_storage_name))
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{
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}
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@ -19,14 +19,14 @@ class ATAPIDiscDevice final : public ATADevice {
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friend class DeviceManagement;
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public:
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static NonnullRefPtr<ATAPIDiscDevice> create(const ATAController&, ATADevice::Address, u16 capabilities, u64 max_addressable_block);
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static NonnullRefPtr<ATAPIDiscDevice> create(ATAController const&, ATADevice::Address, u16 capabilities, u64 max_addressable_block);
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virtual ~ATAPIDiscDevice() override;
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// ^StorageDevice
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virtual CommandSet command_set() const override { return CommandSet::SCSI; }
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private:
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ATAPIDiscDevice(const ATAController&, Address, MinorNumber, u16, u64, NonnullOwnPtr<KString>);
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ATAPIDiscDevice(ATAController const&, Address, MinorNumber, u16, u64, NonnullOwnPtr<KString>);
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// ^DiskDevice
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virtual StringView class_name() const override;
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@ -13,23 +13,23 @@
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namespace Kernel {
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UNMAP_AFTER_INIT NonnullRefPtr<BMIDEChannel> BMIDEChannel::create(const IDEController& ide_controller, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
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UNMAP_AFTER_INIT NonnullRefPtr<BMIDEChannel> BMIDEChannel::create(IDEController const& ide_controller, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
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{
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return adopt_ref(*new BMIDEChannel(ide_controller, io_group, type));
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}
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UNMAP_AFTER_INIT NonnullRefPtr<BMIDEChannel> BMIDEChannel::create(const IDEController& ide_controller, u8 irq, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
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UNMAP_AFTER_INIT NonnullRefPtr<BMIDEChannel> BMIDEChannel::create(IDEController const& ide_controller, u8 irq, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
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{
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return adopt_ref(*new BMIDEChannel(ide_controller, irq, io_group, type));
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}
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UNMAP_AFTER_INIT BMIDEChannel::BMIDEChannel(const IDEController& controller, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
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UNMAP_AFTER_INIT BMIDEChannel::BMIDEChannel(IDEController const& controller, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
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: IDEChannel(controller, io_group, type)
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{
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initialize();
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}
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UNMAP_AFTER_INIT BMIDEChannel::BMIDEChannel(const IDEController& controller, u8 irq, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
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UNMAP_AFTER_INIT BMIDEChannel::BMIDEChannel(IDEController const& controller, u8 irq, IDEChannel::IOAddressGroup io_group, IDEChannel::ChannelType type)
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: IDEChannel(controller, irq, io_group, type)
|
||||
{
|
||||
initialize();
|
||||
|
@ -71,7 +71,7 @@ static void print_ide_status(u8 status)
|
|||
(status & ATA_SR_ERR) != 0);
|
||||
}
|
||||
|
||||
bool BMIDEChannel::handle_irq(const RegisterState&)
|
||||
bool BMIDEChannel::handle_irq(RegisterState const&)
|
||||
{
|
||||
u8 status = m_io_group.io_base().offset(ATA_REG_STATUS).in<u8>();
|
||||
|
||||
|
|
|
@ -25,21 +25,21 @@ class BMIDEChannel final : public IDEChannel {
|
|||
friend class PATADiskDevice;
|
||||
|
||||
public:
|
||||
static NonnullRefPtr<BMIDEChannel> create(const IDEController&, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
|
||||
static NonnullRefPtr<BMIDEChannel> create(const IDEController&, u8 irq, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
|
||||
static NonnullRefPtr<BMIDEChannel> create(IDEController const&, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
|
||||
static NonnullRefPtr<BMIDEChannel> create(IDEController const&, u8 irq, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
|
||||
virtual ~BMIDEChannel() override {};
|
||||
|
||||
virtual bool is_dma_enabled() const override { return true; };
|
||||
|
||||
private:
|
||||
BMIDEChannel(const IDEController&, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
|
||||
BMIDEChannel(const IDEController&, u8 irq, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
|
||||
BMIDEChannel(IDEController const&, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
|
||||
BMIDEChannel(IDEController const&, u8 irq, IDEChannel::IOAddressGroup, IDEChannel::ChannelType type);
|
||||
void initialize();
|
||||
|
||||
void complete_current_request(AsyncDeviceRequest::RequestResult);
|
||||
|
||||
//^ IRQHandler
|
||||
virtual bool handle_irq(const RegisterState&) override;
|
||||
virtual bool handle_irq(RegisterState const&) override;
|
||||
|
||||
//* IDEChannel
|
||||
virtual void send_ata_io_command(LBAMode lba_mode, Direction direction) const override;
|
||||
|
|
|
@ -22,12 +22,12 @@ namespace Kernel {
|
|||
#define PATA_PRIMARY_IRQ 14
|
||||
#define PATA_SECONDARY_IRQ 15
|
||||
|
||||
UNMAP_AFTER_INIT NonnullRefPtr<IDEChannel> IDEChannel::create(const IDEController& controller, IOAddressGroup io_group, ChannelType type)
|
||||
UNMAP_AFTER_INIT NonnullRefPtr<IDEChannel> IDEChannel::create(IDEController const& controller, IOAddressGroup io_group, ChannelType type)
|
||||
{
|
||||
return adopt_ref(*new IDEChannel(controller, io_group, type));
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT NonnullRefPtr<IDEChannel> IDEChannel::create(const IDEController& controller, u8 irq, IOAddressGroup io_group, ChannelType type)
|
||||
UNMAP_AFTER_INIT NonnullRefPtr<IDEChannel> IDEChannel::create(IDEController const& controller, u8 irq, IOAddressGroup io_group, ChannelType type)
|
||||
{
|
||||
return adopt_ref(*new IDEChannel(controller, irq, io_group, type));
|
||||
}
|
||||
|
@ -77,7 +77,7 @@ UNMAP_AFTER_INIT void IDEChannel::initialize()
|
|||
clear_pending_interrupts();
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT IDEChannel::IDEChannel(const IDEController& controller, u8 irq, IOAddressGroup io_group, ChannelType type)
|
||||
UNMAP_AFTER_INIT IDEChannel::IDEChannel(IDEController const& controller, u8 irq, IOAddressGroup io_group, ChannelType type)
|
||||
: IRQHandler(irq)
|
||||
, m_channel_type(type)
|
||||
, m_io_group(io_group)
|
||||
|
@ -86,7 +86,7 @@ UNMAP_AFTER_INIT IDEChannel::IDEChannel(const IDEController& controller, u8 irq,
|
|||
initialize();
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT IDEChannel::IDEChannel(const IDEController& controller, IOAddressGroup io_group, ChannelType type)
|
||||
UNMAP_AFTER_INIT IDEChannel::IDEChannel(IDEController const& controller, IOAddressGroup io_group, ChannelType type)
|
||||
: IRQHandler(type == ChannelType::Primary ? PATA_PRIMARY_IRQ : PATA_SECONDARY_IRQ)
|
||||
, m_channel_type(type)
|
||||
, m_io_group(io_group)
|
||||
|
@ -188,7 +188,7 @@ void IDEChannel::try_disambiguate_error()
|
|||
}
|
||||
}
|
||||
|
||||
bool IDEChannel::handle_irq(const RegisterState&)
|
||||
bool IDEChannel::handle_irq(RegisterState const&)
|
||||
{
|
||||
u8 status = m_io_group.io_base().offset(ATA_REG_STATUS).in<u8>();
|
||||
|
||||
|
@ -394,7 +394,7 @@ UNMAP_AFTER_INIT void IDEChannel::detect_disks()
|
|||
for (u32 i = 93; i > 54 && bbuf[i] == ' '; --i)
|
||||
bbuf[i] = 0;
|
||||
|
||||
volatile ATAIdentifyBlock& identify_block = (volatile ATAIdentifyBlock&)(*wbuf.data());
|
||||
ATAIdentifyBlock volatile& identify_block = (ATAIdentifyBlock volatile&)(*wbuf.data());
|
||||
|
||||
u16 capabilities = identify_block.capabilities[0];
|
||||
|
||||
|
|
|
@ -74,11 +74,11 @@ public:
|
|||
IOAddressGroup(IOAddressGroup const&) = default;
|
||||
|
||||
// Disable default implementations that would use surprising integer promotion.
|
||||
bool operator==(const IOAddressGroup&) const = delete;
|
||||
bool operator<=(const IOAddressGroup&) const = delete;
|
||||
bool operator>=(const IOAddressGroup&) const = delete;
|
||||
bool operator<(const IOAddressGroup&) const = delete;
|
||||
bool operator>(const IOAddressGroup&) const = delete;
|
||||
bool operator==(IOAddressGroup const&) const = delete;
|
||||
bool operator<=(IOAddressGroup const&) const = delete;
|
||||
bool operator>=(IOAddressGroup const&) const = delete;
|
||||
bool operator<(IOAddressGroup const&) const = delete;
|
||||
bool operator>(IOAddressGroup const&) const = delete;
|
||||
|
||||
IOAddress io_base() const { return m_io_base; };
|
||||
IOAddress control_base() const { return m_control_base; }
|
||||
|
@ -91,8 +91,8 @@ public:
|
|||
};
|
||||
|
||||
public:
|
||||
static NonnullRefPtr<IDEChannel> create(const IDEController&, IOAddressGroup, ChannelType type);
|
||||
static NonnullRefPtr<IDEChannel> create(const IDEController&, u8 irq, IOAddressGroup, ChannelType type);
|
||||
static NonnullRefPtr<IDEChannel> create(IDEController const&, IOAddressGroup, ChannelType type);
|
||||
static NonnullRefPtr<IDEChannel> create(IDEController const&, u8 irq, IOAddressGroup, ChannelType type);
|
||||
virtual ~IDEChannel() override;
|
||||
|
||||
RefPtr<StorageDevice> master_device() const;
|
||||
|
@ -119,10 +119,10 @@ protected:
|
|||
Write,
|
||||
};
|
||||
|
||||
IDEChannel(const IDEController&, IOAddressGroup, ChannelType type);
|
||||
IDEChannel(const IDEController&, u8 irq, IOAddressGroup, ChannelType type);
|
||||
IDEChannel(IDEController const&, IOAddressGroup, ChannelType type);
|
||||
IDEChannel(IDEController const&, u8 irq, IOAddressGroup, ChannelType type);
|
||||
//^ IRQHandler
|
||||
virtual bool handle_irq(const RegisterState&) override;
|
||||
virtual bool handle_irq(RegisterState const&) override;
|
||||
|
||||
virtual void send_ata_io_command(LBAMode lba_mode, Direction direction) const;
|
||||
|
||||
|
|
|
@ -41,7 +41,7 @@ size_t IDEController::devices_count() const
|
|||
return count;
|
||||
}
|
||||
|
||||
void IDEController::start_request(const ATADevice& device, AsyncBlockDeviceRequest& request)
|
||||
void IDEController::start_request(ATADevice const& device, AsyncBlockDeviceRequest& request)
|
||||
{
|
||||
auto& address = device.ata_address();
|
||||
VERIFY(address.subport < 2);
|
||||
|
|
|
@ -26,7 +26,7 @@ public:
|
|||
virtual bool reset() override final;
|
||||
virtual bool shutdown() override final;
|
||||
virtual size_t devices_count() const override final;
|
||||
virtual void start_request(const ATADevice&, AsyncBlockDeviceRequest&) override final;
|
||||
virtual void start_request(ATADevice const&, AsyncBlockDeviceRequest&) override final;
|
||||
virtual void complete_current_request(AsyncDeviceRequest::RequestResult) override final;
|
||||
|
||||
protected:
|
||||
|
|
|
@ -53,7 +53,7 @@ bool PCIIDEController::is_bus_master_capable() const
|
|||
return m_prog_if.value() & (1 << 7);
|
||||
}
|
||||
|
||||
static const char* detect_controller_type(u8 programming_value)
|
||||
static char const* detect_controller_type(u8 programming_value)
|
||||
{
|
||||
switch (programming_value) {
|
||||
case 0x00:
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue