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Kernel: Introduce the new Storage subsystem
This new subsystem is somewhat replacing the IDE disk code we had with a new flexible design. StorageDevice is a generic class that represent a generic storage device. It is meant that specific storage hardware will override the interface. StorageController is a generic class that represent a storage controller that can be found in a machine. The IDEController class governs two IDEChannels. An IDEChannel is responsible to manage the master & slave devices of the channel, therefore an IDEChannel is an IRQHandler.
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12 changed files with 604 additions and 213 deletions
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/*
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* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <AK/ByteBuffer.h>
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#include <AK/Singleton.h>
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#include <AK/StringView.h>
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#include <Kernel/Devices/PATAChannel.h>
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#include <Kernel/Devices/PATADiskDevice.h>
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#include <Kernel/FileSystem/ProcFS.h>
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#include <Kernel/IO.h>
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#include <Kernel/Process.h>
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#include <Kernel/VM/MemoryManager.h>
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namespace Kernel {
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#define PATA_PRIMARY_IRQ 14
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#define PATA_SECONDARY_IRQ 15
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//#define PATA_DEBUG
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#define ATA_SR_BSY 0x80
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#define ATA_SR_DRDY 0x40
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#define ATA_SR_DF 0x20
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#define ATA_SR_DSC 0x10
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#define ATA_SR_DRQ 0x08
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#define ATA_SR_CORR 0x04
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#define ATA_SR_IDX 0x02
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#define ATA_SR_ERR 0x01
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#define ATA_ER_BBK 0x80
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#define ATA_ER_UNC 0x40
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#define ATA_ER_MC 0x20
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#define ATA_ER_IDNF 0x10
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#define ATA_ER_MCR 0x08
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#define ATA_ER_ABRT 0x04
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#define ATA_ER_TK0NF 0x02
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#define ATA_ER_AMNF 0x01
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#define ATA_CMD_READ_PIO 0x20
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#define ATA_CMD_READ_PIO_EXT 0x24
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#define ATA_CMD_READ_DMA 0xC8
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#define ATA_CMD_READ_DMA_EXT 0x25
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#define ATA_CMD_WRITE_PIO 0x30
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#define ATA_CMD_WRITE_PIO_EXT 0x34
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#define ATA_CMD_WRITE_DMA 0xCA
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#define ATA_CMD_WRITE_DMA_EXT 0x35
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#define ATA_CMD_CACHE_FLUSH 0xE7
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#define ATA_CMD_CACHE_FLUSH_EXT 0xEA
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#define ATA_CMD_PACKET 0xA0
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#define ATA_CMD_IDENTIFY_PACKET 0xA1
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#define ATA_CMD_IDENTIFY 0xEC
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#define ATAPI_CMD_READ 0xA8
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#define ATAPI_CMD_EJECT 0x1B
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#define ATA_IDENT_DEVICETYPE 0
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#define ATA_IDENT_CYLINDERS 2
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#define ATA_IDENT_HEADS 6
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#define ATA_IDENT_SECTORS 12
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#define ATA_IDENT_SERIAL 20
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#define ATA_IDENT_MODEL 54
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#define ATA_IDENT_CAPABILITIES 98
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#define ATA_IDENT_FIELDVALID 106
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#define ATA_IDENT_MAX_LBA 120
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#define ATA_IDENT_COMMANDSETS 164
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#define ATA_IDENT_MAX_LBA_EXT 200
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#define IDE_ATA 0x00
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#define IDE_ATAPI 0x01
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#define ATA_REG_DATA 0x00
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#define ATA_REG_ERROR 0x01
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#define ATA_REG_FEATURES 0x01
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#define ATA_REG_SECCOUNT0 0x02
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#define ATA_REG_LBA0 0x03
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#define ATA_REG_LBA1 0x04
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#define ATA_REG_LBA2 0x05
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#define ATA_REG_HDDEVSEL 0x06
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#define ATA_REG_COMMAND 0x07
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#define ATA_REG_STATUS 0x07
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#define ATA_CTL_CONTROL 0x00
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#define ATA_CTL_ALTSTATUS 0x00
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#define ATA_CTL_DEVADDRESS 0x01
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#define PCI_Mass_Storage_Class 0x1
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#define PCI_IDE_Controller_Subclass 0x1
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OwnPtr<PATAChannel> PATAChannel::create(ChannelType type, bool force_pio)
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{
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PCI::Address pci_address;
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PCI::enumerate([&](const PCI::Address& address, PCI::ID id) {
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if (PCI::get_class(address) == PCI_Mass_Storage_Class && PCI::get_subclass(address) == PCI_IDE_Controller_Subclass) {
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pci_address = address;
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klog() << "PATAChannel: PATA Controller found, ID " << id;
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}
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});
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return make<PATAChannel>(pci_address, type, force_pio);
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}
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PATAChannel::PATAChannel(PCI::Address address, ChannelType type, bool force_pio)
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: PCI::Device(address, (type == ChannelType::Primary ? PATA_PRIMARY_IRQ : PATA_SECONDARY_IRQ))
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, m_channel_number((type == ChannelType::Primary ? 0 : 1))
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, m_io_base((type == ChannelType::Primary ? 0x1F0 : 0x170))
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, m_control_base((type == ChannelType::Primary ? 0x3f6 : 0x376))
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, m_bus_master_base(PCI::get_BAR4(pci_address()) & 0xfffc)
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{
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disable_irq();
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m_dma_enabled.resource() = !force_pio;
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ProcFS::add_sys_bool("ide_dma", m_dma_enabled);
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initialize(force_pio);
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detect_disks();
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enable_irq();
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}
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PATAChannel::~PATAChannel()
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{
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}
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void PATAChannel::start_request(AsyncBlockDeviceRequest& request, bool use_dma, bool is_slave)
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{
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ScopedSpinLock lock(m_request_lock);
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#ifdef PATA_DEBUG
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dbg() << "PATAChannel::start_request";
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#endif
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m_current_request = &request;
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m_current_request_block_index = 0;
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m_current_request_uses_dma = use_dma;
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m_current_request_flushing_cache = false;
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if (request.request_type() == AsyncBlockDeviceRequest::Read) {
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if (use_dma)
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ata_read_sectors_with_dma(is_slave);
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else
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ata_read_sectors(is_slave);
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} else {
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if (use_dma)
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ata_write_sectors_with_dma(is_slave);
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else
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ata_write_sectors(is_slave);
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}
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}
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void PATAChannel::complete_current_request(AsyncDeviceRequest::RequestResult result)
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{
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// NOTE: this may be called from the interrupt handler!
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ASSERT(m_current_request);
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ASSERT(m_request_lock.is_locked());
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// Now schedule reading back the buffer as soon as we leave the irq handler.
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// This is important so that we can safely write the buffer back,
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// which could cause page faults. Note that this may be called immediately
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// before Processor::deferred_call_queue returns!
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Processor::deferred_call_queue([this, result]() {
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#ifdef PATA_DEBUG
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dbg() << "PATAChannel::complete_current_request result: " << result;
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#endif
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ASSERT(m_current_request);
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auto& request = *m_current_request;
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m_current_request = nullptr;
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if (m_current_request_uses_dma) {
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if (result == AsyncDeviceRequest::Success) {
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if (request.request_type() == AsyncBlockDeviceRequest::Read) {
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if (!request.write_to_buffer(request.buffer(), m_dma_buffer_page->paddr().offset(0xc0000000).as_ptr(), 512 * request.block_count())) {
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request.complete(AsyncDeviceRequest::MemoryFault);
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return;
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}
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}
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// I read somewhere that this may trigger a cache flush so let's do it.
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m_bus_master_base.offset(2).out<u8>(m_bus_master_base.offset(2).in<u8>() | 0x6);
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}
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}
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request.complete(result);
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});
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}
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void PATAChannel::initialize(bool force_pio)
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{
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PCI::enable_interrupt_line(pci_address());
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if (force_pio) {
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klog() << "PATAChannel: Requested to force PIO mode; not setting up DMA";
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return;
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}
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// Let's try to set up DMA transfers.
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PCI::enable_bus_mastering(pci_address());
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m_prdt_page = MM.allocate_supervisor_physical_page();
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prdt().end_of_table = 0x8000;
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m_dma_buffer_page = MM.allocate_supervisor_physical_page();
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klog() << "PATAChannel: Bus master IDE: " << m_bus_master_base;
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}
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static void print_ide_status(u8 status)
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{
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klog() << "PATAChannel: print_ide_status: DRQ=" << ((status & ATA_SR_DRQ) != 0) << " BSY=" << ((status & ATA_SR_BSY) != 0) << " DRDY=" << ((status & ATA_SR_DRDY) != 0) << " DSC=" << ((status & ATA_SR_DSC) != 0) << " DF=" << ((status & ATA_SR_DF) != 0) << " CORR=" << ((status & ATA_SR_CORR) != 0) << " IDX=" << ((status & ATA_SR_IDX) != 0) << " ERR=" << ((status & ATA_SR_ERR) != 0);
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}
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void PATAChannel::handle_irq(const RegisterState&)
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{
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u8 status = m_io_base.offset(ATA_REG_STATUS).in<u8>();
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m_entropy_source.add_random_event(status);
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u8 bstatus = m_bus_master_base.offset(2).in<u8>();
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if (!(bstatus & 0x4)) {
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// interrupt not from this device, ignore
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#ifdef PATA_DEBUG
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klog() << "PATAChannel: ignore interrupt";
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#endif
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return;
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}
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ScopedSpinLock lock(m_request_lock);
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#ifdef PATA_DEBUG
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klog() << "PATAChannel: interrupt: DRQ=" << ((status & ATA_SR_DRQ) != 0) << " BSY=" << ((status & ATA_SR_BSY) != 0) << " DRDY=" << ((status & ATA_SR_DRDY) != 0);
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#endif
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if (!m_current_request) {
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#ifdef PATA_DEBUG
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dbg() << "PATAChannel: IRQ but no pending request!";
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#endif
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return;
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}
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bool received_all_irqs = m_current_request_uses_dma || m_current_request_block_index + 1 >= m_current_request->block_count();
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if (status & ATA_SR_ERR) {
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print_ide_status(status);
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m_device_error = m_io_base.offset(ATA_REG_ERROR).in<u8>();
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klog() << "PATAChannel: Error " << String::format("%b", m_device_error) << "!";
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complete_current_request(AsyncDeviceRequest::Failure);
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return;
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}
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m_device_error = 0;
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if (received_all_irqs) {
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complete_current_request(AsyncDeviceRequest::Success);
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} else {
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ASSERT(!m_current_request_uses_dma);
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// Now schedule reading/writing the buffer as soon as we leave the irq handler.
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// This is important so that we can safely access the buffers, which could
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// trigger page faults
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Processor::deferred_call_queue([this]() {
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if (m_current_request->request_type() == AsyncBlockDeviceRequest::Read) {
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dbg() << "PATAChannel: Read block " << m_current_request_block_index << "/" << m_current_request->block_count();
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if (ata_do_read_sector()) {
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if (++m_current_request_block_index >= m_current_request->block_count()) {
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complete_current_request(AsyncDeviceRequest::Success);
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return;
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}
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// Wait for the next block
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enable_irq();
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}
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} else {
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if (!m_current_request_flushing_cache) {
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dbg() << "PATAChannel: Wrote block " << m_current_request_block_index << "/" << m_current_request->block_count();
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if (++m_current_request_block_index >= m_current_request->block_count()) {
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// We read the last block, flush cache
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ASSERT(!m_current_request_flushing_cache);
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m_current_request_flushing_cache = true;
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m_io_base.offset(ATA_REG_COMMAND).out<u8>(ATA_CMD_CACHE_FLUSH);
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} else {
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// Read next block
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ata_do_write_sector();
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}
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} else {
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complete_current_request(AsyncDeviceRequest::Success);
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}
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}
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});
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}
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}
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static void io_delay()
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{
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for (int i = 0; i < 4; ++i)
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IO::in8(0x3f6);
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}
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void PATAChannel::detect_disks()
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{
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// There are only two possible disks connected to a channel
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for (auto i = 0; i < 2; i++) {
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m_io_base.offset(ATA_REG_HDDEVSEL).out<u8>(0xA0 | (i << 4)); // First, we need to select the drive itself
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// Apparently these need to be 0 before sending IDENTIFY?!
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m_io_base.offset(ATA_REG_SECCOUNT0).out<u8>(0x00);
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m_io_base.offset(ATA_REG_LBA0).out<u8>(0x00);
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m_io_base.offset(ATA_REG_LBA1).out<u8>(0x00);
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m_io_base.offset(ATA_REG_LBA2).out<u8>(0x00);
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m_io_base.offset(ATA_REG_COMMAND).out<u8>(ATA_CMD_IDENTIFY); // Send the ATA_IDENTIFY command
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// Wait for the BSY flag to be reset
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while (m_io_base.offset(ATA_REG_STATUS).in<u8>() & ATA_SR_BSY)
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;
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if (m_io_base.offset(ATA_REG_STATUS).in<u8>() == 0x00) {
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#ifdef PATA_DEBUG
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klog() << "PATAChannel: No " << (i == 0 ? "master" : "slave") << " disk detected!";
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#endif
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continue;
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}
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ByteBuffer wbuf = ByteBuffer::create_uninitialized(512);
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ByteBuffer bbuf = ByteBuffer::create_uninitialized(512);
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u8* b = bbuf.data();
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u16* w = (u16*)wbuf.data();
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const u16* wbufbase = (u16*)wbuf.data();
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for (u32 i = 0; i < 256; ++i) {
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u16 data = m_io_base.offset(ATA_REG_DATA).in<u16>();
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*(w++) = data;
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*(b++) = MSB(data);
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*(b++) = LSB(data);
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}
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// "Unpad" the device name string.
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for (u32 i = 93; i > 54 && bbuf[i] == ' '; --i)
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bbuf[i] = 0;
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u8 cyls = wbufbase[1];
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u8 heads = wbufbase[3];
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u8 spt = wbufbase[6];
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klog() << "PATAChannel: Name=" << ((char*)bbuf.data() + 54) << ", C/H/Spt=" << cyls << "/" << heads << "/" << spt;
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int major = (m_channel_number == 0) ? 3 : 4;
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if (i == 0) {
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m_master = PATADiskDevice::create(*this, PATADiskDevice::DriveType::Master, major, 0);
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m_master->set_drive_geometry(cyls, heads, spt);
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} else {
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m_slave = PATADiskDevice::create(*this, PATADiskDevice::DriveType::Slave, major, 1);
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m_slave->set_drive_geometry(cyls, heads, spt);
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}
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}
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}
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void PATAChannel::ata_read_sectors_with_dma(bool slave_request)
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{
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auto& request = *m_current_request;
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u32 lba = request.block_index();
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#ifdef PATA_DEBUG
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dbg() << "PATAChannel::ata_read_sectors_with_dma (" << lba << " x" << request.block_count() << ")";
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#endif
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prdt().offset = m_dma_buffer_page->paddr();
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prdt().size = 512 * request.block_count();
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ASSERT(prdt().size <= PAGE_SIZE);
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// Stop bus master
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m_bus_master_base.out<u8>(0);
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// Write the PRDT location
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m_bus_master_base.offset(4).out(m_prdt_page->paddr().get());
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// Turn on "Interrupt" and "Error" flag. The error flag should be cleared by hardware.
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m_bus_master_base.offset(2).out<u8>(m_bus_master_base.offset(2).in<u8>() | 0x6);
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// Set transfer direction
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m_bus_master_base.out<u8>(0x8);
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while (m_io_base.offset(ATA_REG_STATUS).in<u8>() & ATA_SR_BSY)
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;
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m_control_base.offset(ATA_CTL_CONTROL).out<u8>(0);
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m_io_base.offset(ATA_REG_HDDEVSEL).out<u8>(0x40 | (static_cast<u8>(slave_request) << 4));
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io_delay();
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m_io_base.offset(ATA_REG_FEATURES).out<u16>(0);
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m_io_base.offset(ATA_REG_SECCOUNT0).out<u8>(0);
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m_io_base.offset(ATA_REG_LBA0).out<u8>(0);
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m_io_base.offset(ATA_REG_LBA1).out<u8>(0);
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m_io_base.offset(ATA_REG_LBA2).out<u8>(0);
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m_io_base.offset(ATA_REG_SECCOUNT0).out<u8>(request.block_count());
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m_io_base.offset(ATA_REG_LBA0).out<u8>((lba & 0x000000ff) >> 0);
|
||||
m_io_base.offset(ATA_REG_LBA1).out<u8>((lba & 0x0000ff00) >> 8);
|
||||
m_io_base.offset(ATA_REG_LBA2).out<u8>((lba & 0x00ff0000) >> 16);
|
||||
|
||||
for (;;) {
|
||||
auto status = m_io_base.offset(ATA_REG_STATUS).in<u8>();
|
||||
if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRDY))
|
||||
break;
|
||||
}
|
||||
|
||||
m_io_base.offset(ATA_REG_COMMAND).out<u8>(ATA_CMD_READ_DMA_EXT);
|
||||
io_delay();
|
||||
|
||||
enable_irq();
|
||||
// Start bus master
|
||||
m_bus_master_base.out<u8>(0x9);
|
||||
}
|
||||
|
||||
bool PATAChannel::ata_do_read_sector()
|
||||
{
|
||||
auto& request = *m_current_request;
|
||||
auto out_buffer = request.buffer().offset(m_current_request_block_index * 512);
|
||||
ssize_t nwritten = request.write_to_buffer_buffered<512>(out_buffer, 512, [&](u8* buffer, size_t buffer_bytes) {
|
||||
for (size_t i = 0; i < buffer_bytes; i += sizeof(u16))
|
||||
*(u16*)&buffer[i] = IO::in16(m_io_base.offset(ATA_REG_DATA).get());
|
||||
return (ssize_t)buffer_bytes;
|
||||
});
|
||||
if (nwritten < 0) {
|
||||
// TODO: Do we need to abort the PATA read if this wasn't the last block?
|
||||
complete_current_request(AsyncDeviceRequest::MemoryFault);
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
void PATAChannel::ata_read_sectors(bool slave_request)
|
||||
{
|
||||
auto& request = *m_current_request;
|
||||
ASSERT(request.block_count() <= 256);
|
||||
#ifdef PATA_DEBUG
|
||||
dbg() << "PATAChannel::ata_read_sectors";
|
||||
#endif
|
||||
|
||||
while (m_io_base.offset(ATA_REG_STATUS).in<u8>() & ATA_SR_BSY)
|
||||
;
|
||||
|
||||
auto lba = request.block_index();
|
||||
#ifdef PATA_DEBUG
|
||||
klog() << "PATAChannel: Reading " << request.block_count() << " sector(s) @ LBA " << lba;
|
||||
#endif
|
||||
|
||||
u8 devsel = 0xe0;
|
||||
if (slave_request)
|
||||
devsel |= 0x10;
|
||||
|
||||
m_control_base.offset(ATA_CTL_CONTROL).out<u8>(0);
|
||||
m_io_base.offset(ATA_REG_HDDEVSEL).out<u8>(devsel | (static_cast<u8>(slave_request) << 4) | 0x40);
|
||||
io_delay();
|
||||
|
||||
m_io_base.offset(ATA_REG_FEATURES).out<u8>(0);
|
||||
|
||||
m_io_base.offset(ATA_REG_SECCOUNT0).out<u8>(0);
|
||||
m_io_base.offset(ATA_REG_LBA0).out<u8>(0);
|
||||
m_io_base.offset(ATA_REG_LBA1).out<u8>(0);
|
||||
m_io_base.offset(ATA_REG_LBA2).out<u8>(0);
|
||||
|
||||
m_io_base.offset(ATA_REG_SECCOUNT0).out<u8>(request.block_count());
|
||||
m_io_base.offset(ATA_REG_LBA0).out<u8>((lba & 0x000000ff) >> 0);
|
||||
m_io_base.offset(ATA_REG_LBA1).out<u8>((lba & 0x0000ff00) >> 8);
|
||||
m_io_base.offset(ATA_REG_LBA2).out<u8>((lba & 0x00ff0000) >> 16);
|
||||
|
||||
for (;;) {
|
||||
auto status = m_io_base.offset(ATA_REG_STATUS).in<u8>();
|
||||
if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRDY))
|
||||
break;
|
||||
}
|
||||
|
||||
enable_irq();
|
||||
m_io_base.offset(ATA_REG_COMMAND).out<u8>(ATA_CMD_READ_PIO);
|
||||
}
|
||||
|
||||
void PATAChannel::ata_write_sectors_with_dma(bool slave_request)
|
||||
{
|
||||
auto& request = *m_current_request;
|
||||
u32 lba = request.block_index();
|
||||
#ifdef PATA_DEBUG
|
||||
dbg() << "PATAChannel::ata_write_sectors_with_dma (" << lba << " x" << request.block_count() << ")";
|
||||
#endif
|
||||
|
||||
prdt().offset = m_dma_buffer_page->paddr();
|
||||
prdt().size = 512 * request.block_count();
|
||||
|
||||
if (!request.read_from_buffer(request.buffer(), m_dma_buffer_page->paddr().offset(0xc0000000).as_ptr(), 512 * request.block_count())) {
|
||||
complete_current_request(AsyncDeviceRequest::MemoryFault);
|
||||
return;
|
||||
}
|
||||
|
||||
ASSERT(prdt().size <= PAGE_SIZE);
|
||||
|
||||
// Stop bus master
|
||||
m_bus_master_base.out<u8>(0);
|
||||
|
||||
// Write the PRDT location
|
||||
m_bus_master_base.offset(4).out<u32>(m_prdt_page->paddr().get());
|
||||
|
||||
// Turn on "Interrupt" and "Error" flag. The error flag should be cleared by hardware.
|
||||
m_bus_master_base.offset(2).out<u8>(m_bus_master_base.offset(2).in<u8>() | 0x6);
|
||||
|
||||
while (m_io_base.offset(ATA_REG_STATUS).in<u8>() & ATA_SR_BSY)
|
||||
;
|
||||
|
||||
m_control_base.offset(ATA_CTL_CONTROL).out<u8>(0);
|
||||
m_io_base.offset(ATA_REG_HDDEVSEL).out<u8>(0x40 | (static_cast<u8>(slave_request) << 4));
|
||||
io_delay();
|
||||
|
||||
m_io_base.offset(ATA_REG_FEATURES).out<u16>(0);
|
||||
|
||||
m_io_base.offset(ATA_REG_SECCOUNT0).out<u8>(0);
|
||||
m_io_base.offset(ATA_REG_LBA0).out<u8>(0);
|
||||
m_io_base.offset(ATA_REG_LBA1).out<u8>(0);
|
||||
m_io_base.offset(ATA_REG_LBA2).out<u8>(0);
|
||||
|
||||
m_io_base.offset(ATA_REG_SECCOUNT0).out<u8>(request.block_count());
|
||||
m_io_base.offset(ATA_REG_LBA0).out<u8>((lba & 0x000000ff) >> 0);
|
||||
m_io_base.offset(ATA_REG_LBA1).out<u8>((lba & 0x0000ff00) >> 8);
|
||||
m_io_base.offset(ATA_REG_LBA2).out<u8>((lba & 0x00ff0000) >> 16);
|
||||
|
||||
for (;;) {
|
||||
auto status = m_io_base.offset(ATA_REG_STATUS).in<u8>();
|
||||
if (!(status & ATA_SR_BSY) && (status & ATA_SR_DRDY))
|
||||
break;
|
||||
}
|
||||
|
||||
m_io_base.offset(ATA_REG_COMMAND).out<u8>(ATA_CMD_WRITE_DMA_EXT);
|
||||
io_delay();
|
||||
|
||||
enable_irq();
|
||||
// Start bus master
|
||||
m_bus_master_base.out<u8>(0x1);
|
||||
}
|
||||
|
||||
void PATAChannel::ata_do_write_sector()
|
||||
{
|
||||
auto& request = *m_current_request;
|
||||
|
||||
io_delay();
|
||||
while ((m_io_base.offset(ATA_REG_STATUS).in<u8>() & ATA_SR_BSY) || !(m_io_base.offset(ATA_REG_STATUS).in<u8>() & ATA_SR_DRQ))
|
||||
;
|
||||
|
||||
u8 status = m_io_base.offset(ATA_REG_STATUS).in<u8>();
|
||||
ASSERT(status & ATA_SR_DRQ);
|
||||
|
||||
auto in_buffer = request.buffer().offset(m_current_request_block_index * 512);
|
||||
#ifdef PATA_DEBUG
|
||||
dbg() << "PATAChannel: Writing 512 bytes (part " << m_current_request_block_index << ") (status=" << String::format("%b", status) << ")...";
|
||||
#endif
|
||||
ssize_t nread = request.read_from_buffer_buffered<512>(in_buffer, 512, [&](const u8* buffer, size_t buffer_bytes) {
|
||||
for (size_t i = 0; i < buffer_bytes; i += sizeof(u16))
|
||||
IO::out16(m_io_base.offset(ATA_REG_DATA).get(), *(const u16*)&buffer[i]);
|
||||
return (ssize_t)buffer_bytes;
|
||||
});
|
||||
if (nread < 0)
|
||||
complete_current_request(AsyncDeviceRequest::MemoryFault);
|
||||
}
|
||||
|
||||
void PATAChannel::ata_write_sectors(bool slave_request)
|
||||
{
|
||||
auto& request = *m_current_request;
|
||||
|
||||
ASSERT(request.block_count() <= 256);
|
||||
u32 start_sector = request.block_index();
|
||||
u32 count = request.block_count();
|
||||
#ifdef PATA_DEBUG
|
||||
klog() << "PATAChannel::ata_write_sectors request (" << count << " sector(s) @ " << start_sector << ")";
|
||||
#endif
|
||||
|
||||
while (m_io_base.offset(ATA_REG_STATUS).in<u8>() & ATA_SR_BSY)
|
||||
;
|
||||
|
||||
#ifdef PATA_DEBUG
|
||||
klog() << "PATAChannel: Writing " << count << " sector(s) @ LBA " << start_sector;
|
||||
#endif
|
||||
|
||||
u8 devsel = 0xe0;
|
||||
if (slave_request)
|
||||
devsel |= 0x10;
|
||||
|
||||
m_io_base.offset(ATA_REG_SECCOUNT0).out<u8>(count == 256 ? 0 : LSB(count));
|
||||
m_io_base.offset(ATA_REG_LBA0).out<u8>(start_sector & 0xff);
|
||||
m_io_base.offset(ATA_REG_LBA1).out<u8>((start_sector >> 8) & 0xff);
|
||||
m_io_base.offset(ATA_REG_LBA2).out<u8>((start_sector >> 16) & 0xff);
|
||||
m_io_base.offset(ATA_REG_HDDEVSEL).out<u8>(devsel | ((start_sector >> 24) & 0xf));
|
||||
|
||||
IO::out8(0x3F6, 0x08);
|
||||
while (!(m_io_base.offset(ATA_REG_STATUS).in<u8>() & ATA_SR_DRDY))
|
||||
;
|
||||
|
||||
m_io_base.offset(ATA_REG_COMMAND).out<u8>(ATA_CMD_WRITE_PIO);
|
||||
|
||||
io_delay();
|
||||
while ((m_io_base.offset(ATA_REG_STATUS).in<u8>() & ATA_SR_BSY) || !(m_io_base.offset(ATA_REG_STATUS).in<u8>() & ATA_SR_DRQ))
|
||||
;
|
||||
|
||||
enable_irq();
|
||||
ata_do_write_sector();
|
||||
}
|
||||
|
||||
}
|
|
@ -1,121 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
//
|
||||
// Parallel ATA (PATA) controller driver
|
||||
//
|
||||
// This driver describes a logical PATA Channel. Each channel can connect up to 2
|
||||
// IDE Hard Disk Drives. The drives themselves can be either the master drive (hd0)
|
||||
// or the slave drive (hd1).
|
||||
//
|
||||
// More information about the ATA spec for PATA can be found here:
|
||||
// ftp://ftp.seagate.com/acrobat/reference/111-1c.pdf
|
||||
//
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <AK/OwnPtr.h>
|
||||
#include <AK/RefPtr.h>
|
||||
#include <Kernel/Devices/Device.h>
|
||||
#include <Kernel/IO.h>
|
||||
#include <Kernel/Lock.h>
|
||||
#include <Kernel/PCI/Access.h>
|
||||
#include <Kernel/PCI/Device.h>
|
||||
#include <Kernel/PhysicalAddress.h>
|
||||
#include <Kernel/Random.h>
|
||||
#include <Kernel/VM/PhysicalPage.h>
|
||||
#include <Kernel/WaitQueue.h>
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
class AsyncBlockDeviceRequest;
|
||||
|
||||
struct PhysicalRegionDescriptor {
|
||||
PhysicalAddress offset;
|
||||
u16 size { 0 };
|
||||
u16 end_of_table { 0 };
|
||||
};
|
||||
|
||||
class PATADiskDevice;
|
||||
class PATAChannel final : public PCI::Device {
|
||||
friend class PATADiskDevice;
|
||||
AK_MAKE_ETERNAL
|
||||
public:
|
||||
enum class ChannelType : u8 {
|
||||
Primary,
|
||||
Secondary
|
||||
};
|
||||
|
||||
public:
|
||||
static OwnPtr<PATAChannel> create(ChannelType type, bool force_pio);
|
||||
PATAChannel(PCI::Address address, ChannelType type, bool force_pio);
|
||||
virtual ~PATAChannel() override;
|
||||
|
||||
RefPtr<PATADiskDevice> master_device() { return m_master; };
|
||||
RefPtr<PATADiskDevice> slave_device() { return m_slave; };
|
||||
|
||||
virtual const char* purpose() const override { return "PATA Channel"; }
|
||||
|
||||
private:
|
||||
//^ IRQHandler
|
||||
virtual void handle_irq(const RegisterState&) override;
|
||||
|
||||
void initialize(bool force_pio);
|
||||
void detect_disks();
|
||||
|
||||
void start_request(AsyncBlockDeviceRequest&, bool, bool);
|
||||
void complete_current_request(AsyncDeviceRequest::RequestResult);
|
||||
|
||||
void ata_read_sectors_with_dma(bool);
|
||||
void ata_read_sectors(bool);
|
||||
bool ata_do_read_sector();
|
||||
void ata_write_sectors_with_dma(bool);
|
||||
void ata_write_sectors(bool);
|
||||
void ata_do_write_sector();
|
||||
|
||||
// Data members
|
||||
u8 m_channel_number { 0 }; // Channel number. 0 = master, 1 = slave
|
||||
IOAddress m_io_base;
|
||||
IOAddress m_control_base;
|
||||
volatile u8 m_device_error { 0 };
|
||||
|
||||
PhysicalRegionDescriptor& prdt() { return *reinterpret_cast<PhysicalRegionDescriptor*>(m_prdt_page->paddr().offset(0xc0000000).as_ptr()); }
|
||||
RefPtr<PhysicalPage> m_prdt_page;
|
||||
RefPtr<PhysicalPage> m_dma_buffer_page;
|
||||
IOAddress m_bus_master_base;
|
||||
Lockable<bool> m_dma_enabled;
|
||||
EntropySource m_entropy_source;
|
||||
|
||||
RefPtr<PATADiskDevice> m_master;
|
||||
RefPtr<PATADiskDevice> m_slave;
|
||||
|
||||
AsyncBlockDeviceRequest* m_current_request { nullptr };
|
||||
u32 m_current_request_block_index { 0 };
|
||||
bool m_current_request_uses_dma { false };
|
||||
bool m_current_request_flushing_cache { false };
|
||||
SpinLock<u8> m_request_lock;
|
||||
};
|
||||
}
|
|
@ -1,235 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
//#define PATA_DEVICE_DEBUG
|
||||
|
||||
#include <AK/Memory.h>
|
||||
#include <AK/StringView.h>
|
||||
#include <Kernel/Devices/PATAChannel.h>
|
||||
#include <Kernel/Devices/PATADiskDevice.h>
|
||||
#include <Kernel/FileSystem/FileDescription.h>
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
NonnullRefPtr<PATADiskDevice> PATADiskDevice::create(PATAChannel& channel, DriveType type, int major, int minor)
|
||||
{
|
||||
return adopt(*new PATADiskDevice(channel, type, major, minor));
|
||||
}
|
||||
|
||||
PATADiskDevice::PATADiskDevice(PATAChannel& channel, DriveType type, int major, int minor)
|
||||
: BlockDevice(major, minor, 512)
|
||||
, m_drive_type(type)
|
||||
, m_channel(channel)
|
||||
{
|
||||
}
|
||||
|
||||
PATADiskDevice::~PATADiskDevice()
|
||||
{
|
||||
}
|
||||
|
||||
const char* PATADiskDevice::class_name() const
|
||||
{
|
||||
return "PATADiskDevice";
|
||||
}
|
||||
|
||||
void PATADiskDevice::start_request(AsyncBlockDeviceRequest& request)
|
||||
{
|
||||
bool use_dma = !m_channel.m_bus_master_base.is_null() && m_channel.m_dma_enabled.resource();
|
||||
m_channel.start_request(request, use_dma, is_slave());
|
||||
}
|
||||
|
||||
void PATADiskDevice::set_drive_geometry(u16 cyls, u16 heads, u16 spt)
|
||||
{
|
||||
m_cylinders = cyls;
|
||||
m_heads = heads;
|
||||
m_sectors_per_track = spt;
|
||||
}
|
||||
|
||||
KResultOr<size_t> PATADiskDevice::read(FileDescription&, size_t offset, UserOrKernelBuffer& outbuf, size_t len)
|
||||
{
|
||||
unsigned index = offset / block_size();
|
||||
u16 whole_blocks = len / block_size();
|
||||
ssize_t remaining = len % block_size();
|
||||
|
||||
unsigned blocks_per_page = PAGE_SIZE / block_size();
|
||||
|
||||
// PATAChannel will chuck a wobbly if we try to read more than PAGE_SIZE
|
||||
// at a time, because it uses a single page for its DMA buffer.
|
||||
if (whole_blocks >= blocks_per_page) {
|
||||
whole_blocks = blocks_per_page;
|
||||
remaining = 0;
|
||||
}
|
||||
|
||||
#ifdef PATA_DEVICE_DEBUG
|
||||
klog() << "PATADiskDevice::read() index=" << index << " whole_blocks=" << whole_blocks << " remaining=" << remaining;
|
||||
#endif
|
||||
|
||||
if (whole_blocks > 0) {
|
||||
auto read_request = make_request<AsyncBlockDeviceRequest>(AsyncBlockDeviceRequest::Read, index, whole_blocks, outbuf, whole_blocks * block_size());
|
||||
auto result = read_request->wait();
|
||||
if (result.wait_result().was_interrupted())
|
||||
return KResult(-EINTR);
|
||||
switch (result.request_result()) {
|
||||
case AsyncDeviceRequest::Failure:
|
||||
case AsyncDeviceRequest::Cancelled:
|
||||
return KResult(-EIO);
|
||||
case AsyncDeviceRequest::MemoryFault:
|
||||
return KResult(-EFAULT);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
off_t pos = whole_blocks * block_size();
|
||||
|
||||
if (remaining > 0) {
|
||||
auto data = ByteBuffer::create_uninitialized(block_size());
|
||||
auto data_buffer = UserOrKernelBuffer::for_kernel_buffer(data.data());
|
||||
auto read_request = make_request<AsyncBlockDeviceRequest>(AsyncBlockDeviceRequest::Read, index + whole_blocks, 1, data_buffer, block_size());
|
||||
auto result = read_request->wait();
|
||||
if (result.wait_result().was_interrupted())
|
||||
return KResult(-EINTR);
|
||||
switch (result.request_result()) {
|
||||
case AsyncDeviceRequest::Failure:
|
||||
return pos;
|
||||
case AsyncDeviceRequest::Cancelled:
|
||||
return KResult(-EIO);
|
||||
case AsyncDeviceRequest::MemoryFault:
|
||||
// This should never happen, we're writing to a kernel buffer!
|
||||
ASSERT_NOT_REACHED();
|
||||
default:
|
||||
break;
|
||||
}
|
||||
if (!outbuf.write(data.data(), pos, remaining))
|
||||
return KResult(-EFAULT);
|
||||
}
|
||||
|
||||
return pos + remaining;
|
||||
}
|
||||
|
||||
bool PATADiskDevice::can_read(const FileDescription&, size_t offset) const
|
||||
{
|
||||
return offset < (m_cylinders * m_heads * m_sectors_per_track * block_size());
|
||||
}
|
||||
|
||||
KResultOr<size_t> PATADiskDevice::write(FileDescription&, size_t offset, const UserOrKernelBuffer& inbuf, size_t len)
|
||||
{
|
||||
unsigned index = offset / block_size();
|
||||
u16 whole_blocks = len / block_size();
|
||||
ssize_t remaining = len % block_size();
|
||||
|
||||
unsigned blocks_per_page = PAGE_SIZE / block_size();
|
||||
|
||||
// PATAChannel will chuck a wobbly if we try to write more than PAGE_SIZE
|
||||
// at a time, because it uses a single page for its DMA buffer.
|
||||
if (whole_blocks >= blocks_per_page) {
|
||||
whole_blocks = blocks_per_page;
|
||||
remaining = 0;
|
||||
}
|
||||
|
||||
#ifdef PATA_DEVICE_DEBUG
|
||||
klog() << "PATADiskDevice::write() index=" << index << " whole_blocks=" << whole_blocks << " remaining=" << remaining;
|
||||
#endif
|
||||
|
||||
if (whole_blocks > 0) {
|
||||
auto write_request = make_request<AsyncBlockDeviceRequest>(AsyncBlockDeviceRequest::Write, index, whole_blocks, inbuf, whole_blocks * block_size());
|
||||
auto result = write_request->wait();
|
||||
if (result.wait_result().was_interrupted())
|
||||
return KResult(-EINTR);
|
||||
switch (result.request_result()) {
|
||||
case AsyncDeviceRequest::Failure:
|
||||
case AsyncDeviceRequest::Cancelled:
|
||||
return KResult(-EIO);
|
||||
case AsyncDeviceRequest::MemoryFault:
|
||||
return KResult(-EFAULT);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
off_t pos = whole_blocks * block_size();
|
||||
|
||||
// since we can only write in block_size() increments, if we want to do a
|
||||
// partial write, we have to read the block's content first, modify it,
|
||||
// then write the whole block back to the disk.
|
||||
if (remaining > 0) {
|
||||
auto data = ByteBuffer::create_zeroed(block_size());
|
||||
auto data_buffer = UserOrKernelBuffer::for_kernel_buffer(data.data());
|
||||
|
||||
{
|
||||
auto read_request = make_request<AsyncBlockDeviceRequest>(AsyncBlockDeviceRequest::Read, index + whole_blocks, 1, data_buffer, block_size());
|
||||
auto result = read_request->wait();
|
||||
if (result.wait_result().was_interrupted())
|
||||
return KResult(-EINTR);
|
||||
switch (result.request_result()) {
|
||||
case AsyncDeviceRequest::Failure:
|
||||
return pos;
|
||||
case AsyncDeviceRequest::Cancelled:
|
||||
return KResult(-EIO);
|
||||
case AsyncDeviceRequest::MemoryFault:
|
||||
// This should never happen, we're writing to a kernel buffer!
|
||||
ASSERT_NOT_REACHED();
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!inbuf.read(data.data(), pos, remaining))
|
||||
return KResult(-EFAULT);
|
||||
|
||||
{
|
||||
auto write_request = make_request<AsyncBlockDeviceRequest>(AsyncBlockDeviceRequest::Write, index + whole_blocks, 1, data_buffer, block_size());
|
||||
auto result = write_request->wait();
|
||||
if (result.wait_result().was_interrupted())
|
||||
return KResult(-EINTR);
|
||||
switch (result.request_result()) {
|
||||
case AsyncDeviceRequest::Failure:
|
||||
return pos;
|
||||
case AsyncDeviceRequest::Cancelled:
|
||||
return KResult(-EIO);
|
||||
case AsyncDeviceRequest::MemoryFault:
|
||||
// This should never happen, we're writing to a kernel buffer!
|
||||
ASSERT_NOT_REACHED();
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return pos + remaining;
|
||||
}
|
||||
|
||||
bool PATADiskDevice::can_write(const FileDescription&, size_t offset) const
|
||||
{
|
||||
return offset < (m_cylinders * m_heads * m_sectors_per_track * block_size());
|
||||
}
|
||||
|
||||
bool PATADiskDevice::is_slave() const
|
||||
{
|
||||
return m_drive_type == DriveType::Slave;
|
||||
}
|
||||
|
||||
}
|
|
@ -1,84 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
//
|
||||
// A Disk Device Connected to a PATA Channel
|
||||
//
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <Kernel/Devices/BlockDevice.h>
|
||||
#include <Kernel/Interrupts/IRQHandler.h>
|
||||
#include <Kernel/Lock.h>
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
class PATAChannel;
|
||||
|
||||
class PATADiskDevice final : public BlockDevice {
|
||||
AK_MAKE_ETERNAL
|
||||
public:
|
||||
// Type of drive this IDEDiskDevice is on the ATA channel.
|
||||
//
|
||||
// Each PATA channel can contain only two devices, which (I think) are
|
||||
// jumper selectable on the drive itself by shorting two pins.
|
||||
enum class DriveType : u8 {
|
||||
Master,
|
||||
Slave
|
||||
};
|
||||
|
||||
public:
|
||||
static NonnullRefPtr<PATADiskDevice> create(PATAChannel&, DriveType, int major, int minor);
|
||||
virtual ~PATADiskDevice() override;
|
||||
|
||||
void set_drive_geometry(u16, u16, u16);
|
||||
|
||||
// ^BlockDevice
|
||||
virtual void start_request(AsyncBlockDeviceRequest&) override;
|
||||
virtual KResultOr<size_t> read(FileDescription&, size_t, UserOrKernelBuffer&, size_t) override;
|
||||
virtual bool can_read(const FileDescription&, size_t) const override;
|
||||
virtual KResultOr<size_t> write(FileDescription&, size_t, const UserOrKernelBuffer&, size_t) override;
|
||||
virtual bool can_write(const FileDescription&, size_t) const override;
|
||||
|
||||
protected:
|
||||
explicit PATADiskDevice(PATAChannel&, DriveType, int, int);
|
||||
|
||||
private:
|
||||
// ^DiskDevice
|
||||
virtual const char* class_name() const override;
|
||||
|
||||
bool is_slave() const;
|
||||
|
||||
Lock m_lock { "IDEDiskDevice" };
|
||||
u16 m_cylinders { 0 };
|
||||
u16 m_heads { 0 };
|
||||
u16 m_sectors_per_track { 0 };
|
||||
DriveType m_drive_type { DriveType::Master };
|
||||
|
||||
PATAChannel& m_channel;
|
||||
};
|
||||
|
||||
}
|
Loading…
Add table
Add a link
Reference in a new issue