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Kernel: Introduce the new Storage subsystem
This new subsystem is somewhat replacing the IDE disk code we had with a new flexible design. StorageDevice is a generic class that represent a generic storage device. It is meant that specific storage hardware will override the interface. StorageController is a generic class that represent a storage controller that can be found in a machine. The IDEController class governs two IDEChannels. An IDEChannel is responsible to manage the master & slave devices of the channel, therefore an IDEChannel is an IRQHandler.
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Kernel/Storage/IDEChannel.h
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156
Kernel/Storage/IDEChannel.h
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/*
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* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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//
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// Parallel ATA (PATA) controller driver
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//
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// This driver describes a logical PATA Channel. Each channel can connect up to 2
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// IDE Hard Disk Drives. The drives themselves can be either the master drive (hd0)
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// or the slave drive (hd1).
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//
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// More information about the ATA spec for PATA can be found here:
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// ftp://ftp.seagate.com/acrobat/reference/111-1c.pdf
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//
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#pragma once
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#include <AK/OwnPtr.h>
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#include <AK/RefPtr.h>
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#include <Kernel/Devices/Device.h>
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#include <Kernel/IO.h>
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#include <Kernel/Interrupts/IRQHandler.h>
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#include <Kernel/Lock.h>
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#include <Kernel/PhysicalAddress.h>
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#include <Kernel/Random.h>
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#include <Kernel/Storage/StorageDevice.h>
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#include <Kernel/VM/PhysicalPage.h>
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#include <Kernel/WaitQueue.h>
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namespace Kernel {
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class AsyncBlockDeviceRequest;
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struct PhysicalRegionDescriptor {
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PhysicalAddress offset;
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u16 size { 0 };
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u16 end_of_table { 0 };
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};
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class IDEController;
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class IDEChannel final : public IRQHandler {
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friend class IDEController;
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friend class PATADiskDevice;
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AK_MAKE_ETERNAL
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public:
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enum class ChannelType : u8 {
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Primary,
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Secondary
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};
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struct IOAddressGroup {
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IOAddressGroup(IOAddress io_base, IOAddress control_base, IOAddress bus_master_base)
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: m_io_base(io_base)
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, m_control_base(control_base)
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, m_bus_master_base(bus_master_base)
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{
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}
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// Disable default implementations that would use surprising integer promotion.
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bool operator==(const IOAddressGroup&) const = delete;
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bool operator<=(const IOAddressGroup&) const = delete;
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bool operator>=(const IOAddressGroup&) const = delete;
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bool operator<(const IOAddressGroup&) const = delete;
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bool operator>(const IOAddressGroup&) const = delete;
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IOAddress io_base() const { return m_io_base; };
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IOAddress control_base() const { return m_control_base; }
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IOAddress bus_master_base() const { return m_bus_master_base; }
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const IOAddressGroup& operator=(const IOAddressGroup& group)
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{
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m_io_base = group.io_base();
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m_control_base = group.control_base();
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m_bus_master_base = group.bus_master_base();
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return *this;
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}
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private:
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IOAddress m_io_base;
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IOAddress m_control_base;
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IOAddress m_bus_master_base;
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};
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public:
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static NonnullOwnPtr<IDEChannel> create(const IDEController&, IOAddressGroup, ChannelType type, bool force_pio);
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IDEChannel(const IDEController&, IOAddressGroup, ChannelType type, bool force_pio);
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virtual ~IDEChannel() override;
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RefPtr<StorageDevice> master_device();
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RefPtr<StorageDevice> slave_device();
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virtual const char* purpose() const override { return "PATA Channel"; }
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private:
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//^ IRQHandler
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virtual void handle_irq(const RegisterState&) override;
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void initialize(bool force_pio);
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void detect_disks();
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void start_request(AsyncBlockDeviceRequest&, bool, bool);
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void complete_current_request(AsyncDeviceRequest::RequestResult);
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void ata_read_sectors_with_dma(bool);
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void ata_read_sectors(bool);
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bool ata_do_read_sector();
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void ata_write_sectors_with_dma(bool);
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void ata_write_sectors(bool);
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void ata_do_write_sector();
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// Data members
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u8 m_channel_number { 0 }; // Channel number. 0 = master, 1 = slave
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volatile u8 m_device_error { 0 };
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PhysicalRegionDescriptor& prdt() { return *reinterpret_cast<PhysicalRegionDescriptor*>(m_prdt_page->paddr().offset(0xc0000000).as_ptr()); }
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RefPtr<PhysicalPage> m_prdt_page;
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RefPtr<PhysicalPage> m_dma_buffer_page;
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Lockable<bool> m_dma_enabled;
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EntropySource m_entropy_source;
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RefPtr<StorageDevice> m_master;
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RefPtr<StorageDevice> m_slave;
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AsyncBlockDeviceRequest* m_current_request { nullptr };
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u32 m_current_request_block_index { 0 };
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bool m_current_request_uses_dma { false };
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bool m_current_request_flushing_cache { false };
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SpinLock<u8> m_request_lock;
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IOAddressGroup m_io_group;
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NonnullRefPtr<IDEController> m_parent_controller;
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};
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}
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