From 0a448ee9603ad8eb4147eff291692c1eea736d3f Mon Sep 17 00:00:00 2001
From: Andreas Kling <kling@serenityos.org>
Date: Sat, 11 Jul 2020 17:03:42 +0200
Subject: [PATCH] UserspaceEmulator: Fix broken inline assembly for asymmetric
 op_foos

When the Destination and Source of an op_foo were types of different
sizes, the generated assembly was not filling up the "source" register
fully in some cases. This led to incorrect results.
---
 DevTools/UserspaceEmulator/SoftCPU.cpp | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/DevTools/UserspaceEmulator/SoftCPU.cpp b/DevTools/UserspaceEmulator/SoftCPU.cpp
index f122dfe40a..a1d2d76883 100644
--- a/DevTools/UserspaceEmulator/SoftCPU.cpp
+++ b/DevTools/UserspaceEmulator/SoftCPU.cpp
@@ -166,15 +166,15 @@ static typename TypeDoubler<Destination>::type op_xor(SoftCPU& cpu, const Destin
     if constexpr (sizeof(Destination) == 4) {
         asm volatile("xorl %%ecx, %%eax\n"
                      : "=a"(result)
-                     : "a"(dest), "c"(src));
+                     : "a"(dest), "c"((u32)src));
     } else if constexpr (sizeof(Destination) == 2) {
         asm volatile("xor %%cx, %%ax\n"
                      : "=a"(result)
-                     : "a"(dest), "c"(src));
+                     : "a"(dest), "c"((u16)src));
     } else if constexpr (sizeof(Destination) == 1) {
         asm volatile("xorb %%cl, %%al\n"
                      : "=a"(result)
-                     : "a"(dest), "c"(src));
+                     : "a"(dest), "c"((u8)src));
     } else {
         ASSERT_NOT_REACHED();
     }
@@ -197,15 +197,15 @@ static typename TypeDoubler<Destination>::type op_sub(SoftCPU& cpu, const Destin
     if constexpr (sizeof(Destination) == 4) {
         asm volatile("subl %%ecx, %%eax\n"
                      : "=a"(result)
-                     : "a"(dest), "c"(src));
+                     : "a"(dest), "c"((u32)src));
     } else if constexpr (sizeof(Destination) == 2) {
         asm volatile("subw %%cx, %%ax\n"
                      : "=a"(result)
-                     : "a"(dest), "c"(src));
+                     : "a"(dest), "c"((u16)src));
     } else if constexpr (sizeof(Destination) == 1) {
         asm volatile("subb %%cl, %%al\n"
                      : "=a"(result)
-                     : "a"(dest), "c"(src));
+                     : "a"(dest), "c"((u8)src));
     } else {
         ASSERT_NOT_REACHED();
     }
@@ -228,15 +228,15 @@ static Destination op_add(SoftCPU& cpu, Destination& dest, const Source& src)
     if constexpr (sizeof(Destination) == 4) {
         asm volatile("addl %%ecx, %%eax\n"
                      : "=a"(result)
-                     : "a"(dest), "c"(src));
+                     : "a"(dest), "c"((u32)src));
     } else if constexpr (sizeof(Destination) == 2) {
         asm volatile("addw %%cx, %%ax\n"
                      : "=a"(result)
-                     : "a"(dest), "c"(src));
+                     : "a"(dest), "c"((u16)src));
     } else if constexpr (sizeof(Destination) == 1) {
         asm volatile("addb %%cl, %%al\n"
                      : "=a"(result)
-                     : "a"(dest), "c"(src));
+                     : "a"(dest), "c"((u8)src));
     } else {
         ASSERT_NOT_REACHED();
     }