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Kernel: Make the x86 paging code slightly less insane.
Instead of PDE's and PTE's being weird wrappers around dword*, just have MemoryManager::ensure_pte() return a PageDirectoryEntry&, which in turn has a PageTableEntry* entries(). I've been trying to understand how things ended up this way, and I suspect it was because I inadvertently invoked the PageDirectoryEntry copy ctor in the original work on this, which must have made me very confused.. Anyways, now things are a bit saner and we can move forward towards a better future, etc. :^)
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4 changed files with 126 additions and 123 deletions
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@ -112,111 +112,11 @@ private:
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PageDirectory& kernel_page_directory() { return *m_kernel_page_directory; }
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struct PageDirectoryEntry {
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explicit PageDirectoryEntry(dword* pde)
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: m_pde(pde)
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{
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}
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dword* page_table_base() { return reinterpret_cast<dword*>(raw() & 0xfffff000u); }
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void set_page_table_base(dword value)
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{
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*m_pde &= 0xfff;
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*m_pde |= value & 0xfffff000;
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}
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dword raw() const { return *m_pde; }
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dword* ptr() { return m_pde; }
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enum Flags {
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Present = 1 << 0,
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ReadWrite = 1 << 1,
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UserSupervisor = 1 << 2,
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WriteThrough = 1 << 3,
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CacheDisabled = 1 << 4,
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};
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bool is_present() const { return raw() & Present; }
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void set_present(bool b) { set_bit(Present, b); }
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bool is_user_allowed() const { return raw() & UserSupervisor; }
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void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
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bool is_writable() const { return raw() & ReadWrite; }
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void set_writable(bool b) { set_bit(ReadWrite, b); }
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bool is_write_through() const { return raw() & WriteThrough; }
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void set_write_through(bool b) { set_bit(WriteThrough, b); }
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bool is_cache_disabled() const { return raw() & CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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void set_bit(byte bit, bool value)
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{
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if (value)
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*m_pde |= bit;
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else
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*m_pde &= ~bit;
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}
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dword* m_pde;
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};
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struct PageTableEntry {
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explicit PageTableEntry(dword* pte)
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: m_pte(pte)
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{
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}
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dword* physical_page_base() { return reinterpret_cast<dword*>(raw() & 0xfffff000u); }
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void set_physical_page_base(dword value)
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{
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*m_pte &= 0xfffu;
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*m_pte |= value & 0xfffff000u;
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}
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dword raw() const { return *m_pte; }
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dword* ptr() { return m_pte; }
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enum Flags {
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Present = 1 << 0,
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ReadWrite = 1 << 1,
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UserSupervisor = 1 << 2,
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WriteThrough = 1 << 3,
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CacheDisabled = 1 << 4,
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};
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bool is_present() const { return raw() & Present; }
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void set_present(bool b) { set_bit(Present, b); }
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bool is_user_allowed() const { return raw() & UserSupervisor; }
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void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
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bool is_writable() const { return raw() & ReadWrite; }
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void set_writable(bool b) { set_bit(ReadWrite, b); }
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bool is_write_through() const { return raw() & WriteThrough; }
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void set_write_through(bool b) { set_bit(WriteThrough, b); }
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bool is_cache_disabled() const { return raw() & CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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void set_bit(byte bit, bool value)
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{
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if (value)
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*m_pte |= bit;
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else
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*m_pte &= ~bit;
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}
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dword* m_pte;
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};
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PageTableEntry ensure_pte(PageDirectory&, VirtualAddress);
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PageTableEntry& ensure_pte(PageDirectory&, VirtualAddress);
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RefPtr<PageDirectory> m_kernel_page_directory;
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dword* m_page_table_zero { nullptr };
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dword* m_page_table_one { nullptr };
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PageTableEntry* m_page_table_zero { nullptr };
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PageTableEntry* m_page_table_one { nullptr };
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VirtualAddress m_quickmap_addr;
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