mirror of
https://github.com/RGBCube/serenity
synced 2025-07-24 22:37:34 +00:00
Kernel: Make the x86 paging code slightly less insane.
Instead of PDE's and PTE's being weird wrappers around dword*, just have MemoryManager::ensure_pte() return a PageDirectoryEntry&, which in turn has a PageTableEntry* entries(). I've been trying to understand how things ended up this way, and I suspect it was because I inadvertently invoked the PageDirectoryEntry copy ctor in the original work on this, which must have made me very confused.. Anyways, now things are a bit saner and we can move forward towards a better future, etc. :^)
This commit is contained in:
Andreas Kling
parent
0538adbabd
commit
183205d51c
4 changed files with 126 additions and 123 deletions
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@ -1,11 +1,16 @@
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#pragma once
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#include <AK/Badge.h>
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#include <AK/Noncopyable.h>
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#include <Kernel/VirtualAddress.h>
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#include <Kernel/kstdio.h>
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#define PAGE_SIZE 4096
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#define PAGE_MASK 0xfffff000
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class MemoryManager;
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class PageTableEntry;
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struct [[gnu::packed]] TSS32
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{
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word backlink, __blh;
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@ -79,6 +84,106 @@ union [[gnu::packed]] Descriptor
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}
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};
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class PageDirectoryEntry {
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AK_MAKE_NONCOPYABLE(PageDirectoryEntry);
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public:
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PageTableEntry* page_table_base() { return reinterpret_cast<PageTableEntry*>(m_raw & 0xfffff000u); }
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void set_page_table_base(dword value)
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{
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m_raw &= 0xfff;
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m_raw |= value & 0xfffff000;
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}
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dword raw() const { return m_raw; }
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void copy_from(Badge<MemoryManager>, const PageDirectoryEntry& other) { m_raw = other.m_raw; }
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enum Flags {
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Present = 1 << 0,
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ReadWrite = 1 << 1,
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UserSupervisor = 1 << 2,
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WriteThrough = 1 << 3,
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CacheDisabled = 1 << 4,
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};
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bool is_present() const { return raw() & Present; }
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void set_present(bool b) { set_bit(Present, b); }
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bool is_user_allowed() const { return raw() & UserSupervisor; }
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void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
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bool is_writable() const { return raw() & ReadWrite; }
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void set_writable(bool b) { set_bit(ReadWrite, b); }
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bool is_write_through() const { return raw() & WriteThrough; }
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void set_write_through(bool b) { set_bit(WriteThrough, b); }
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bool is_cache_disabled() const { return raw() & CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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void set_bit(byte bit, bool value)
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{
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if (value)
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m_raw |= bit;
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else
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m_raw &= ~bit;
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}
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private:
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dword m_raw;
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};
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class PageTableEntry {
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AK_MAKE_NONCOPYABLE(PageTableEntry);
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public:
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void* physical_page_base() { return reinterpret_cast<void*>(m_raw & 0xfffff000u); }
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void set_physical_page_base(dword value)
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{
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m_raw &= 0xfff;
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m_raw |= value & 0xfffff000;
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}
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dword raw() const { return m_raw; }
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enum Flags {
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Present = 1 << 0,
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ReadWrite = 1 << 1,
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UserSupervisor = 1 << 2,
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WriteThrough = 1 << 3,
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CacheDisabled = 1 << 4,
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};
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bool is_present() const { return raw() & Present; }
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void set_present(bool b) { set_bit(Present, b); }
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bool is_user_allowed() const { return raw() & UserSupervisor; }
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void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
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bool is_writable() const { return raw() & ReadWrite; }
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void set_writable(bool b) { set_bit(ReadWrite, b); }
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bool is_write_through() const { return raw() & WriteThrough; }
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void set_write_through(bool b) { set_bit(WriteThrough, b); }
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bool is_cache_disabled() const { return raw() & CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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void set_bit(byte bit, bool value)
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{
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if (value)
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m_raw |= bit;
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else
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m_raw &= ~bit;
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}
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private:
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dword m_raw;
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};
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static_assert(sizeof(PageDirectoryEntry) == 4);
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static_assert(sizeof(PageTableEntry) == 4);
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class IRQHandler;
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void gdt_init();
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@ -21,8 +21,8 @@ MemoryManager& MM
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MemoryManager::MemoryManager()
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{
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m_kernel_page_directory = PageDirectory::create_at_fixed_address(PhysicalAddress(0x4000));
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m_page_table_zero = (dword*)0x6000;
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m_page_table_one = (dword*)0x7000;
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m_page_table_zero = (PageTableEntry*)0x6000;
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m_page_table_one = (PageTableEntry*)0x7000;
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initialize_paging();
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@ -36,17 +36,15 @@ MemoryManager::~MemoryManager()
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void MemoryManager::populate_page_directory(PageDirectory& page_directory)
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{
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page_directory.m_directory_page = allocate_supervisor_physical_page();
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page_directory.entries()[0] = kernel_page_directory().entries()[0];
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page_directory.entries()[1] = kernel_page_directory().entries()[1];
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page_directory.entries()[0].copy_from({}, kernel_page_directory().entries()[0]);
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page_directory.entries()[1].copy_from({}, kernel_page_directory().entries()[1]);
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// Defer to the kernel page tables for 0xC0000000-0xFFFFFFFF
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for (int i = 768; i < 1024; ++i)
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page_directory.entries()[i] = kernel_page_directory().entries()[i];
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page_directory.entries()[i].copy_from({}, kernel_page_directory().entries()[i]);
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}
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void MemoryManager::initialize_paging()
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{
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static_assert(sizeof(MemoryManager::PageDirectoryEntry) == 4);
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static_assert(sizeof(MemoryManager::PageTableEntry) == 4);
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memset(m_page_table_zero, 0, PAGE_SIZE);
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memset(m_page_table_one, 0, PAGE_SIZE);
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@ -167,7 +165,7 @@ void MemoryManager::remove_identity_mapping(PageDirectory& page_directory, Virtu
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// FIXME: ASSERT(vaddr is 4KB aligned);
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for (dword offset = 0; offset < size; offset += PAGE_SIZE) {
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auto pte_address = vaddr.offset(offset);
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auto pte = ensure_pte(page_directory, pte_address);
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auto& pte = ensure_pte(page_directory, pte_address);
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pte.set_physical_page_base(0);
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pte.set_user_allowed(false);
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pte.set_present(true);
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@ -176,13 +174,13 @@ void MemoryManager::remove_identity_mapping(PageDirectory& page_directory, Virtu
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}
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}
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auto MemoryManager::ensure_pte(PageDirectory& page_directory, VirtualAddress vaddr) -> PageTableEntry
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PageTableEntry& MemoryManager::ensure_pte(PageDirectory& page_directory, VirtualAddress vaddr)
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{
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ASSERT_INTERRUPTS_DISABLED();
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dword page_directory_index = (vaddr.get() >> 22) & 0x3ff;
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dword page_table_index = (vaddr.get() >> 12) & 0x3ff;
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PageDirectoryEntry pde = PageDirectoryEntry(&page_directory.entries()[page_directory_index]);
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PageDirectoryEntry& pde = page_directory.entries()[page_directory_index];
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if (!pde.is_present()) {
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#ifdef MM_DEBUG
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dbgprintf("MM: PDE %u not present (requested for L%x), allocating\n", page_directory_index, vaddr.get());
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@ -219,7 +217,7 @@ auto MemoryManager::ensure_pte(PageDirectory& page_directory, VirtualAddress vad
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page_directory.m_physical_pages.set(page_directory_index, move(page_table));
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}
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}
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return PageTableEntry(&pde.page_table_base()[page_table_index]);
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return pde.page_table_base()[page_table_index];
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}
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void MemoryManager::map_protected(VirtualAddress vaddr, size_t length)
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@ -228,7 +226,7 @@ void MemoryManager::map_protected(VirtualAddress vaddr, size_t length)
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ASSERT(vaddr.is_page_aligned());
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for (dword offset = 0; offset < length; offset += PAGE_SIZE) {
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auto pte_address = vaddr.offset(offset);
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auto pte = ensure_pte(kernel_page_directory(), pte_address);
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auto& pte = ensure_pte(kernel_page_directory(), pte_address);
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pte.set_physical_page_base(pte_address.get());
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pte.set_user_allowed(false);
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pte.set_present(false);
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@ -243,7 +241,7 @@ void MemoryManager::create_identity_mapping(PageDirectory& page_directory, Virtu
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ASSERT((vaddr.get() & ~PAGE_MASK) == 0);
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for (dword offset = 0; offset < size; offset += PAGE_SIZE) {
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auto pte_address = vaddr.offset(offset);
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auto pte = ensure_pte(page_directory, pte_address);
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auto& pte = ensure_pte(page_directory, pte_address);
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pte.set_physical_page_base(pte_address.get());
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pte.set_user_allowed(false);
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pte.set_present(true);
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@ -595,7 +593,7 @@ void MemoryManager::flush_tlb(VirtualAddress vaddr)
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void MemoryManager::map_for_kernel(VirtualAddress vaddr, PhysicalAddress paddr)
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{
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auto pte = ensure_pte(kernel_page_directory(), vaddr);
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auto& pte = ensure_pte(kernel_page_directory(), vaddr);
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pte.set_physical_page_base(paddr.get());
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pte.set_present(true);
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pte.set_writable(true);
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@ -609,7 +607,7 @@ byte* MemoryManager::quickmap_page(PhysicalPage& physical_page)
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ASSERT(!m_quickmap_in_use);
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m_quickmap_in_use = true;
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auto page_vaddr = m_quickmap_addr;
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auto pte = ensure_pte(kernel_page_directory(), page_vaddr);
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auto& pte = ensure_pte(kernel_page_directory(), page_vaddr);
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pte.set_physical_page_base(physical_page.paddr().get());
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pte.set_present(true);
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pte.set_writable(true);
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@ -627,7 +625,7 @@ void MemoryManager::unquickmap_page()
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ASSERT_INTERRUPTS_DISABLED();
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ASSERT(m_quickmap_in_use);
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auto page_vaddr = m_quickmap_addr;
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auto pte = ensure_pte(kernel_page_directory(), page_vaddr);
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auto& pte = ensure_pte(kernel_page_directory(), page_vaddr);
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#ifdef MM_DEBUG
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auto old_physical_address = pte.physical_page_base();
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#endif
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@ -646,7 +644,7 @@ void MemoryManager::remap_region_page(Region& region, unsigned page_index_in_reg
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ASSERT(region.page_directory());
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InterruptDisabler disabler;
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auto page_vaddr = region.vaddr().offset(page_index_in_region * PAGE_SIZE);
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auto pte = ensure_pte(*region.page_directory(), page_vaddr);
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auto& pte = ensure_pte(*region.page_directory(), page_vaddr);
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auto& physical_page = region.vmo().physical_pages()[page_index_in_region];
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ASSERT(physical_page);
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pte.set_physical_page_base(physical_page->paddr().get());
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@ -681,7 +679,7 @@ void MemoryManager::map_region_at_address(PageDirectory& page_directory, Region&
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#endif
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for (size_t i = 0; i < region.page_count(); ++i) {
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auto page_vaddr = vaddr.offset(i * PAGE_SIZE);
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auto pte = ensure_pte(page_directory, page_vaddr);
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auto& pte = ensure_pte(page_directory, page_vaddr);
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auto& physical_page = vmo.physical_pages()[region.first_page_index() + i];
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if (physical_page) {
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pte.set_physical_page_base(physical_page->paddr().get());
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@ -712,7 +710,7 @@ bool MemoryManager::unmap_region(Region& region)
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InterruptDisabler disabler;
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for (size_t i = 0; i < region.page_count(); ++i) {
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auto vaddr = region.vaddr().offset(i * PAGE_SIZE);
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auto pte = ensure_pte(*region.page_directory(), vaddr);
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auto& pte = ensure_pte(*region.page_directory(), vaddr);
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pte.set_physical_page_base(0);
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pte.set_present(false);
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pte.set_writable(false);
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@ -112,111 +112,11 @@ private:
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PageDirectory& kernel_page_directory() { return *m_kernel_page_directory; }
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struct PageDirectoryEntry {
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explicit PageDirectoryEntry(dword* pde)
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: m_pde(pde)
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{
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}
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dword* page_table_base() { return reinterpret_cast<dword*>(raw() & 0xfffff000u); }
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void set_page_table_base(dword value)
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{
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*m_pde &= 0xfff;
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*m_pde |= value & 0xfffff000;
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}
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dword raw() const { return *m_pde; }
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dword* ptr() { return m_pde; }
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enum Flags {
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Present = 1 << 0,
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ReadWrite = 1 << 1,
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UserSupervisor = 1 << 2,
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WriteThrough = 1 << 3,
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CacheDisabled = 1 << 4,
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};
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bool is_present() const { return raw() & Present; }
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void set_present(bool b) { set_bit(Present, b); }
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bool is_user_allowed() const { return raw() & UserSupervisor; }
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void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
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bool is_writable() const { return raw() & ReadWrite; }
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void set_writable(bool b) { set_bit(ReadWrite, b); }
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bool is_write_through() const { return raw() & WriteThrough; }
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void set_write_through(bool b) { set_bit(WriteThrough, b); }
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bool is_cache_disabled() const { return raw() & CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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void set_bit(byte bit, bool value)
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{
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if (value)
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*m_pde |= bit;
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else
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*m_pde &= ~bit;
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}
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dword* m_pde;
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};
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struct PageTableEntry {
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explicit PageTableEntry(dword* pte)
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: m_pte(pte)
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{
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}
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dword* physical_page_base() { return reinterpret_cast<dword*>(raw() & 0xfffff000u); }
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void set_physical_page_base(dword value)
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{
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*m_pte &= 0xfffu;
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*m_pte |= value & 0xfffff000u;
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}
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dword raw() const { return *m_pte; }
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dword* ptr() { return m_pte; }
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enum Flags {
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Present = 1 << 0,
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ReadWrite = 1 << 1,
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UserSupervisor = 1 << 2,
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WriteThrough = 1 << 3,
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CacheDisabled = 1 << 4,
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};
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bool is_present() const { return raw() & Present; }
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void set_present(bool b) { set_bit(Present, b); }
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bool is_user_allowed() const { return raw() & UserSupervisor; }
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void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
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bool is_writable() const { return raw() & ReadWrite; }
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void set_writable(bool b) { set_bit(ReadWrite, b); }
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bool is_write_through() const { return raw() & WriteThrough; }
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void set_write_through(bool b) { set_bit(WriteThrough, b); }
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bool is_cache_disabled() const { return raw() & CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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void set_bit(byte bit, bool value)
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{
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if (value)
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*m_pte |= bit;
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else
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*m_pte &= ~bit;
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}
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dword* m_pte;
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};
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PageTableEntry ensure_pte(PageDirectory&, VirtualAddress);
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PageTableEntry& ensure_pte(PageDirectory&, VirtualAddress);
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RefPtr<PageDirectory> m_kernel_page_directory;
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dword* m_page_table_zero { nullptr };
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dword* m_page_table_one { nullptr };
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PageTableEntry* m_page_table_zero { nullptr };
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PageTableEntry* m_page_table_one { nullptr };
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VirtualAddress m_quickmap_addr;
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@ -15,7 +15,7 @@ public:
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~PageDirectory();
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dword cr3() const { return m_directory_page->paddr().get(); }
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dword* entries() { return reinterpret_cast<dword*>(cr3()); }
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PageDirectoryEntry* entries() { return reinterpret_cast<PageDirectoryEntry*>(cr3()); }
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void flush(VirtualAddress);
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