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Kernel: Support all AMD-defined CPUID feature flags for EAX=80000001h

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We're now able to detect all the AMD-defined CPUID feature flags from
ECX/EDX for EAX=80000001h :^)
This commit is contained in:
Linus Groh 2022-03-27 15:36:47 +01:00 • committed by Andreas Kling
parent 96e6420d8d
commit 1e82c2708d
3 changed files with 167 additions and 6 deletions
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44
Kernel/Arch/x86/CPUID.h
View file

@ -195,14 +195,46 @@ AK_MAKE_ARBITRARY_SIZED_ENUM(CPUFeature, u256,
IA32_ARCH_CAPABILITIES = CPUFeature(1u) << 152u, // IA32_ARCH_CAPABILITIES MSR IA32_ARCH_CAPABILITIES = CPUFeature(1u) << 152u, // IA32_ARCH_CAPABILITIES MSR
IA32_CORE_CAPABILITIES = CPUFeature(1u) << 153u, // IA32_CORE_CAPABILITIES MSR IA32_CORE_CAPABILITIES = CPUFeature(1u) << 153u, // IA32_CORE_CAPABILITIES MSR
SSBD = CPUFeature(1u) << 154u, // Speculative Store Bypass Disable SSBD = CPUFeature(1u) << 154u, // Speculative Store Bypass Disable
/* EAX=80000001h, ECX */ //
LAHF_LM = CPUFeature(1u) << 155u, // LAHF/SAHF in long mode
CMP_LEGACY = CPUFeature(1u) << 156u, // Hyperthreading not valid
SVM = CPUFeature(1u) << 157u, // Secure Virtual Machine
EXTAPIC = CPUFeature(1u) << 158u, // Extended APIC Space
CR8_LEGACY = CPUFeature(1u) << 159u, // CR8 in 32-bit mode
ABM = CPUFeature(1u) << 160u, // Advanced Bit Manipulation
SSE4A = CPUFeature(1u) << 161u, // SSE4a
MISALIGNSSE = CPUFeature(1u) << 162u, // Misaligned SSE Mode
_3DNOWPREFETCH = CPUFeature(1u) << 163u, // PREFETCH and PREFETCHW Instructions
OSVW = CPUFeature(1u) << 164u, // OS Visible Workaround
IBS = CPUFeature(1u) << 165u, // Instruction Based Sampling
XOP = CPUFeature(1u) << 166u, // XOP instruction set
SKINIT = CPUFeature(1u) << 167u, // SKINIT/STGI Instructions
WDT = CPUFeature(1u) << 168u, // Watchdog timer
LWP = CPUFeature(1u) << 169u, // Light Weight Profiling
FMA4 = CPUFeature(1u) << 170u, // FMA4 instruction set
TCE = CPUFeature(1u) << 171u, // Translation Cache Extension
NODEID_MSR = CPUFeature(1u) << 172u, // NodeID MSR
TBM = CPUFeature(1u) << 173u, // Trailing Bit Manipulation
TOPOEXT = CPUFeature(1u) << 174u, // Topology Extensions
PERFCTR_CORE = CPUFeature(1u) << 175u, // Core Performance Counter Extensions
PERFCTR_NB = CPUFeature(1u) << 176u, // NB Performance Counter Extensions
DBX = CPUFeature(1u) << 177u, // Data Breakpoint Extensions
PERFTSC = CPUFeature(1u) << 178u, // Performance TSC
PCX_L2I = CPUFeature(1u) << 179u, // L2I Performance Counter Extensions
/* EAX=80000001h, EDX */ // /* EAX=80000001h, EDX */ //
SYSCALL = CPUFeature(1u) << 155u, // SYSCALL/SYSRET Instructions SYSCALL = CPUFeature(1u) << 180u, // SYSCALL/SYSRET Instructions
NX = CPUFeature(1u) << 156u, // NX bit MP = CPUFeature(1u) << 181u, // Multiprocessor Capable
RDTSCP = CPUFeature(1u) << 157u, // RDTSCP Instruction NX = CPUFeature(1u) << 182u, // NX bit
LM = CPUFeature(1u) << 158u, // Long Mode MMXEXT = CPUFeature(1u) << 183u, // Extended MMX
FXSR_OPT = CPUFeature(1u) << 184u, // FXSAVE/FXRSTOR Optimizations
PDPE1GB = CPUFeature(1u) << 185u, // Gigabyte Pages
RDTSCP = CPUFeature(1u) << 186u, // RDTSCP Instruction
LM = CPUFeature(1u) << 187u, // Long Mode
_3DNOWEXT = CPUFeature(1u) << 188u, // Extended 3DNow!
_3DNOW = CPUFeature(1u) << 189u, // 3DNow!
/* EAX=80000007h, EDX */ // /* EAX=80000007h, EDX */ //
CONSTANT_TSC = CPUFeature(1u) << 159u, // Invariant TSC CONSTANT_TSC = CPUFeature(1u) << 190u, // Invariant TSC
NONSTOP_TSC = CPUFeature(1u) << 160u, // Invariant TSC NONSTOP_TSC = CPUFeature(1u) << 191u, // Invariant TSC
__End = CPUFeature(1u) << 255u); __End = CPUFeature(1u) << 255u);
StringView cpu_feature_to_string_view(CPUFeature::Type const&); StringView cpu_feature_to_string_view(CPUFeature::Type const&);

63
Kernel/Arch/x86/common/CPUID.cpp
View file

@ -295,14 +295,77 @@ StringView cpu_feature_to_string_view(CPUFeature::Type const& feature)
return "ia32_code_capabilities"sv; return "ia32_code_capabilities"sv;
if (feature == CPUFeature::SSBD) if (feature == CPUFeature::SSBD)
return "ssbd"sv; return "ssbd"sv;
if (feature == CPUFeature::LAHF_LM)
return "lahf_lm"sv;
if (feature == CPUFeature::CMP_LEGACY)
return "cmp_legacy"sv;
if (feature == CPUFeature::SVM)
return "svm"sv;
if (feature == CPUFeature::EXTAPIC)
return "extapic"sv;
if (feature == CPUFeature::CR8_LEGACY)
return "cr8_legacy"sv;
if (feature == CPUFeature::ABM)
return "abm"sv;
if (feature == CPUFeature::SSE4A)
return "sse4a"sv;
if (feature == CPUFeature::MISALIGNSSE)
return "misalignsse"sv;
if (feature == CPUFeature::_3DNOWPREFETCH)
return "3dnowprefetch"sv;
if (feature == CPUFeature::OSVW)
return "osvw"sv;
if (feature == CPUFeature::IBS)
return "ibs"sv;
if (feature == CPUFeature::XOP)
return "xop"sv;
if (feature == CPUFeature::SKINIT)
return "skinit"sv;
if (feature == CPUFeature::WDT)
return "wdt"sv;
if (feature == CPUFeature::LWP)
return "lwp"sv;
if (feature == CPUFeature::FMA4)
return "fma4"sv;
if (feature == CPUFeature::TCE)
return "tce"sv;
if (feature == CPUFeature::NODEID_MSR)
return "nodeid_msr"sv;
if (feature == CPUFeature::TBM)
return "tbm"sv;
if (feature == CPUFeature::TOPOEXT)
return "topoext"sv;
if (feature == CPUFeature::PERFCTR_CORE)
return "perfctr_core"sv;
if (feature == CPUFeature::PERFCTR_NB)
return "perfctr_nb"sv;
if (feature == CPUFeature::DBX)
return "dbx"sv;
if (feature == CPUFeature::PERFTSC)
return "perftsc"sv;
// NOTE: This is called perfctr_l2 on Linux, but PCX_L2I in the AMD manual & other references.
if (feature == CPUFeature::PCX_L2I)
return "pcx_l2i"sv;
if (feature == CPUFeature::SYSCALL) if (feature == CPUFeature::SYSCALL)
return "syscall"sv; return "syscall"sv;
if (feature == CPUFeature::MP)
return "mp"sv;
if (feature == CPUFeature::NX) if (feature == CPUFeature::NX)
return "nx"sv; return "nx"sv;
if (feature == CPUFeature::MMXEXT)
return "mmxext"sv;
if (feature == CPUFeature::FXSR_OPT)
return "fxsr_opt"sv;
if (feature == CPUFeature::PDPE1GB)
return "pdpe1gb"sv;
if (feature == CPUFeature::RDTSCP) if (feature == CPUFeature::RDTSCP)
return "rdtscp"sv; return "rdtscp"sv;
if (feature == CPUFeature::LM) if (feature == CPUFeature::LM)
return "lm"sv; return "lm"sv;
if (feature == CPUFeature::_3DNOWEXT)
return "3dnowext"sv;
if (feature == CPUFeature::_3DNOW)
return "3dnow"sv;
if (feature == CPUFeature::CONSTANT_TSC) if (feature == CPUFeature::CONSTANT_TSC)
return "constant_tsc"sv; return "constant_tsc"sv;
if (feature == CPUFeature::NONSTOP_TSC) if (feature == CPUFeature::NONSTOP_TSC)

66
Kernel/Arch/x86/common/Processor.cpp
View file

@ -380,14 +380,80 @@ UNMAP_AFTER_INIT void Processor::cpu_detect()
if (max_extended_leaf >= 0x80000001) { if (max_extended_leaf >= 0x80000001) {
CPUID extended_processor_info(0x80000001); CPUID extended_processor_info(0x80000001);
if (extended_processor_info.ecx() & (1 << 0))
m_features |= CPUFeature::LAHF_LM;
if (extended_processor_info.ecx() & (1 << 1))
m_features |= CPUFeature::CMP_LEGACY;
if (extended_processor_info.ecx() & (1 << 2))
m_features |= CPUFeature::SVM;
if (extended_processor_info.ecx() & (1 << 3))
m_features |= CPUFeature::EXTAPIC;
if (extended_processor_info.ecx() & (1 << 4))
m_features |= CPUFeature::CR8_LEGACY;
if (extended_processor_info.ecx() & (1 << 5))
m_features |= CPUFeature::ABM;
if (extended_processor_info.ecx() & (1 << 6))
m_features |= CPUFeature::SSE4A;
if (extended_processor_info.ecx() & (1 << 7))
m_features |= CPUFeature::MISALIGNSSE;
if (extended_processor_info.ecx() & (1 << 8))
m_features |= CPUFeature::_3DNOWPREFETCH;
if (extended_processor_info.ecx() & (1 << 9))
m_features |= CPUFeature::OSVW;
if (extended_processor_info.ecx() & (1 << 10))
m_features |= CPUFeature::IBS;
if (extended_processor_info.ecx() & (1 << 11))
m_features |= CPUFeature::XOP;
if (extended_processor_info.ecx() & (1 << 12))
m_features |= CPUFeature::SKINIT;
if (extended_processor_info.ecx() & (1 << 13))
m_features |= CPUFeature::WDT;
if (extended_processor_info.ecx() & (1 << 15))
m_features |= CPUFeature::LWP;
if (extended_processor_info.ecx() & (1 << 16))
m_features |= CPUFeature::FMA4;
if (extended_processor_info.ecx() & (1 << 17))
m_features |= CPUFeature::TCE;
if (extended_processor_info.ecx() & (1 << 19))
m_features |= CPUFeature::NODEID_MSR;
if (extended_processor_info.ecx() & (1 << 21))
m_features |= CPUFeature::TBM;
if (extended_processor_info.ecx() & (1 << 22))
m_features |= CPUFeature::TOPOEXT;
if (extended_processor_info.ecx() & (1 << 23))
m_features |= CPUFeature::PERFCTR_CORE;
if (extended_processor_info.ecx() & (1 << 24))
m_features |= CPUFeature::PERFCTR_NB;
if (extended_processor_info.ecx() & (1 << 26))
m_features |= CPUFeature::DBX;
if (extended_processor_info.ecx() & (1 << 27))
m_features |= CPUFeature::PERFTSC;
if (extended_processor_info.ecx() & (1 << 28))
m_features |= CPUFeature::PCX_L2I;
if (extended_processor_info.edx() & (1 << 11)) if (extended_processor_info.edx() & (1 << 11))
m_features |= CPUFeature::SYSCALL; // Only available in 64 bit mode m_features |= CPUFeature::SYSCALL; // Only available in 64 bit mode
if (extended_processor_info.edx() & (1 << 19))
m_features |= CPUFeature::MP;
if (extended_processor_info.edx() & (1 << 20)) if (extended_processor_info.edx() & (1 << 20))
m_features |= CPUFeature::NX; m_features |= CPUFeature::NX;
if (extended_processor_info.edx() & (1 << 22))
m_features |= CPUFeature::MMXEXT;
if (extended_processor_info.edx() & (1 << 23))
m_features |= CPUFeature::RDTSCP;
if (extended_processor_info.edx() & (1 << 25))
m_features |= CPUFeature::FXSR_OPT;
if (extended_processor_info.edx() & (1 << 26))
m_features |= CPUFeature::PDPE1GB;
if (extended_processor_info.edx() & (1 << 27)) if (extended_processor_info.edx() & (1 << 27))
m_features |= CPUFeature::RDTSCP; m_features |= CPUFeature::RDTSCP;
if (extended_processor_info.edx() & (1 << 29)) if (extended_processor_info.edx() & (1 << 29))
m_features |= CPUFeature::LM; m_features |= CPUFeature::LM;
if (extended_processor_info.edx() & (1 << 30))
m_features |= CPUFeature::_3DNOWEXT;
if (extended_processor_info.edx() & (1 << 31))
m_features |= CPUFeature::_3DNOW;
} }
if (max_extended_leaf >= 0x80000007) { if (max_extended_leaf >= 0x80000007) {