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Kernel: Remove Prekernel namespace in the aarch64 Kernel

Now that we merged all the Prekernel files into the Kernel files, we can
get rid of the Prekernel namespace as well.
This commit is contained in:
Timon Kruiper 2022-05-10 00:27:23 +02:00 committed by Linus Groh
parent c96a3f0c48
commit 1f3977b303
23 changed files with 55 additions and 57 deletions

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@ -8,7 +8,7 @@
#include <Kernel/Arch/aarch64/RPi/Framebuffer.h>
#include <Kernel/Arch/aarch64/RPi/FramebufferMailboxMessages.h>
namespace Prekernel {
namespace Kernel {
Framebuffer::Framebuffer()
{

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@ -8,7 +8,7 @@
#include <AK/Types.h>
namespace Prekernel {
namespace Kernel {
class Framebuffer {
public:

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@ -8,7 +8,7 @@
#include <Kernel/Arch/aarch64/RPi/Mailbox.h>
namespace Prekernel {
namespace Kernel {
class FramebufferSetPhysicalSizeMboxMessage : public Mailbox::Message {
public:

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@ -8,7 +8,7 @@
#include <Kernel/Arch/aarch64/RPi/GPIO.h>
#include <Kernel/Arch/aarch64/RPi/MMIO.h>
namespace Prekernel {
namespace Kernel {
// See BCM2835-ARM-Peripherals.pdf section "6 General Purpose I/O" or bcm2711-peripherals.pdf "Chapter 5. General Purpose I/O".
@ -72,7 +72,7 @@ void GPIO::internal_enable_pins(u32 enable[2], PullUpDownState state)
m_registers->pull_up_down_enable = static_cast<u32>(state);
// 2. Wait 150 cycles this provides the required set-up time for the control signal
Kernel::Aarch64::Asm::wait_cycles(150);
Aarch64::Asm::wait_cycles(150);
// 3. Write to GPPUDCLK0/1 to clock the control signal into the GPIO pads you wish to
// modify NOTE only the pads which receive a clock will be modified, all others will
@ -81,7 +81,7 @@ void GPIO::internal_enable_pins(u32 enable[2], PullUpDownState state)
m_registers->pull_up_down_enable_clock.bits[1] = enable[1];
// 4. Wait 150 cycles this provides the required hold time for the control signal
Kernel::Aarch64::Asm::wait_cycles(150);
Aarch64::Asm::wait_cycles(150);
// 5. Write to GPPUD to remove the control signal
m_registers->pull_up_down_enable = 0;

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@ -9,7 +9,7 @@
#include <AK/Array.h>
#include <AK/Types.h>
namespace Prekernel {
namespace Kernel {
struct GPIOControlRegisters;

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@ -7,7 +7,7 @@
#include <Kernel/Arch/aarch64/MainIdRegister.h>
#include <Kernel/Arch/aarch64/RPi/MMIO.h>
namespace Prekernel {
namespace Kernel {
MMIO::MMIO()
: m_base_address(0xFE00'0000)

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@ -8,7 +8,7 @@
#include <AK/Types.h>
namespace Prekernel {
namespace Kernel {
// Knows about memory-mapped IO addresses on the Broadcom family of SOCs used in Raspberry Pis.
// RPi3 is the first Raspberry Pi that supports aarch64.

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@ -7,7 +7,7 @@
#include <Kernel/Arch/aarch64/RPi/MMIO.h>
#include <Kernel/Arch/aarch64/RPi/Mailbox.h>
namespace Prekernel {
namespace Kernel {
// There's one mailbox at MBOX_BASE_OFFSET for reading responses from VideoCore, and one at MBOX_BASE_OFFSET + 0x20 for sending requests.
// Each has its own status word.

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@ -8,7 +8,7 @@
#include <AK/Types.h>
namespace Prekernel {
namespace Kernel {
// Can exchange mailbox messages with the Raspberry Pi's VideoCore chip.
// https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface

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@ -9,7 +9,7 @@
#include <Kernel/Arch/aarch64/RPi/Mailbox.h>
#include <Kernel/Arch/aarch64/RPi/Timer.h>
namespace Prekernel {
namespace Kernel {
// "12.1 System Timer Registers" / "10.2 System Timer Registers"
struct TimerRegisters {
@ -50,14 +50,14 @@ u64 Timer::microseconds_since_boot()
return (static_cast<u64>(high) << 32) | low;
}
class SetClockRateMboxMessage : Prekernel::Mailbox::Message {
class SetClockRateMboxMessage : Mailbox::Message {
public:
u32 clock_id;
u32 rate_hz;
u32 skip_setting_turbo;
SetClockRateMboxMessage()
: Prekernel::Mailbox::Message(0x0003'8002, 12)
: Mailbox::Message(0x0003'8002, 12)
{
clock_id = 0;
rate_hz = 0;
@ -68,16 +68,16 @@ public:
u32 Timer::set_clock_rate(ClockID clock_id, u32 rate_hz, bool skip_setting_turbo)
{
struct __attribute__((aligned(16))) {
Prekernel::Mailbox::MessageHeader header;
Mailbox::MessageHeader header;
SetClockRateMboxMessage set_clock_rate;
Prekernel::Mailbox::MessageTail tail;
Mailbox::MessageTail tail;
} message_queue;
message_queue.set_clock_rate.clock_id = static_cast<u32>(clock_id);
message_queue.set_clock_rate.rate_hz = rate_hz;
message_queue.set_clock_rate.skip_setting_turbo = skip_setting_turbo ? 1 : 0;
if (!Prekernel::Mailbox::the().send_queue(&message_queue, sizeof(message_queue))) {
if (!Mailbox::the().send_queue(&message_queue, sizeof(message_queue))) {
dbgln("Timer::set_clock_rate() failed!");
return 0;
}

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@ -8,7 +8,7 @@
#include <AK/Types.h>
namespace Prekernel {
namespace Kernel {
struct TimerRegisters;

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@ -9,7 +9,7 @@
#include <Kernel/Arch/aarch64/RPi/Timer.h>
#include <Kernel/Arch/aarch64/RPi/UART.h>
namespace Prekernel {
namespace Kernel {
// "13.4 Register View" / "11.5 Register View"
struct UARTRegisters {
@ -104,10 +104,10 @@ UART::UART()
u32 rate_in_hz = Timer::the().set_clock_rate(Timer::ClockID::UART, 16 * baud_rate);
// The BCM's PL011 UART is alternate function 0 on pins 14 and 15.
auto& gpio = Prekernel::GPIO::the();
gpio.set_pin_function(14, Prekernel::GPIO::PinFunction::Alternate0);
gpio.set_pin_function(15, Prekernel::GPIO::PinFunction::Alternate0);
gpio.set_pin_pull_up_down_state(Array { 14, 15 }, Prekernel::GPIO::PullUpDownState::Disable);
auto& gpio = GPIO::the();
gpio.set_pin_function(14, GPIO::PinFunction::Alternate0);
gpio.set_pin_function(15, GPIO::PinFunction::Alternate0);
gpio.set_pin_pull_up_down_state(Array { 14, 15 }, GPIO::PullUpDownState::Disable);
// Clock and pins are configured. Turn UART on.
set_baud_rate(baud_rate, rate_in_hz);

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@ -9,7 +9,7 @@
#include <AK/Types.h>
namespace Prekernel {
namespace Kernel {
struct UARTRegisters;