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https://github.com/RGBCube/serenity
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UserspaceEmulator: Implement the SSE extension
This almost fully implements the SSE extension, similar to the x87 and MMX extensions, using a separate class "SoftVPU". Currently missing are all shadow and exception checks, as well as the denormals-are-zero and flush-to-zero flags. Also missing are some integer-SIMD functions.
This commit is contained in:
Hendiadyoin1
Andreas Kling
parent
1d2ad9cf61
commit
2377344a89
5 changed files with 1053 additions and 79 deletions
186
Userland/DevTools/UserspaceEmulator/SoftVPU.h
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186
Userland/DevTools/UserspaceEmulator/SoftVPU.h
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/*
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* Copyright (c) 2022, Leon Albrecht <leon.a@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/SIMD.h>
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#include <AK/Types.h>
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#include <LibX86/Instruction.h>
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#include <math.h>
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namespace UserspaceEmulator {
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using namespace AK::SIMD;
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class Emulator;
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class SoftCPU;
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union XMM {
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f32x4 ps;
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f64x2 pd;
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i8x16 psb;
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u8x16 pub;
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i16x8 psw;
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u16x8 puw;
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u32x4 pudw;
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u64x2 puqw;
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};
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class SoftVPU {
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public:
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SoftVPU(Emulator& emulator, SoftCPU& cpu)
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: m_emulator(emulator)
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, m_cpu(cpu)
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, m_mxcsr { 0x1F80 }
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{
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}
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XMM& operator[](u8 index) { return m_xmm[index]; }
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enum class RoundingMode : u8 {
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NEAREST = 0b00,
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DOWN = 0b01,
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UP = 0b10,
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TRUNC = 0b11
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};
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enum class ComparePredicate : u8 {
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EQ = 0,
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LT = 1,
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LE = 2,
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UNORD = 3,
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NEQ = 4,
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NLT = 5,
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NLE = 6,
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ORD = 7
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// FIXME: More with VEX prefix
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};
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i32 lround(float value) const
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{
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// FIXME: This is not yet 100% correct
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using enum RoundingMode;
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switch ((RoundingMode)rounding_control) {
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case NEAREST:
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return ::lroundf(value);
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case DOWN:
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return floorf(value);
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case UP:
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return ceilf(value);
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case TRUNC:
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return truncf(value);
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default:
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VERIFY_NOT_REACHED();
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}
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}
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private:
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friend SoftCPU;
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Emulator& m_emulator;
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SoftCPU& m_cpu;
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XMM m_xmm[8];
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union {
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u32 m_mxcsr;
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struct {
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u32 invalid_operation_flag : 1; // IE
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u32 denormal_operation_flag : 1; // DE
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u32 divide_by_zero_flag : 1; // ZE
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u32 overflow_flag : 1; // OE
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u32 underflow_flag : 1; // UE
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u32 precision_flag : 1; // PE
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u32 denormals_are_zero : 1; // FIXME: DAZ
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u32 invalid_operation_mask : 1; // IM
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u32 denormal_operation_mask : 1; // DM
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u32 devide_by_zero_mask : 1; // ZM
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u32 overflow_mask : 1; // OM
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u32 underflow_mask : 1; // UM
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u32 precision_mask : 1; // PM
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u32 rounding_control : 2; // FIXME: RC
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u32 flush_to_zero : 1; // FIXME: FTZ
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u32 __reserved : 16;
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};
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};
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void PREFETCHTNTA(X86::Instruction const&);
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void PREFETCHT0(X86::Instruction const&);
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void PREFETCHT1(X86::Instruction const&);
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void PREFETCHT2(X86::Instruction const&);
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void LDMXCSR(X86::Instruction const&);
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void STMXCSR(X86::Instruction const&);
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void MOVUPS_xmm1_xmm2m128(X86::Instruction const&);
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void MOVSS_xmm1_xmm2m32(X86::Instruction const&);
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void MOVUPS_xmm1m128_xmm2(X86::Instruction const&);
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void MOVSS_xmm1m32_xmm2(X86::Instruction const&);
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void MOVLPS_xmm1_xmm2m64(X86::Instruction const&);
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void MOVLPS_m64_xmm2(X86::Instruction const&);
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void UNPCKLPS_xmm1_xmm2m128(X86::Instruction const&);
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void UNPCKHPS_xmm1_xmm2m128(X86::Instruction const&);
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void MOVHPS_xmm1_xmm2m64(X86::Instruction const&);
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void MOVHPS_m64_xmm2(X86::Instruction const&);
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void MOVAPS_xmm1_xmm2m128(X86::Instruction const&);
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void MOVAPS_xmm1m128_xmm2(X86::Instruction const&);
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void CVTPI2PS_xmm1_mm2m64(X86::Instruction const&);
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void CVTSI2SS_xmm1_rm32(X86::Instruction const&);
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void MOVNTPS_xmm1m128_xmm2(X86::Instruction const&);
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void CVTTPS2PI_mm1_xmm2m64(X86::Instruction const&);
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void CVTTSS2SI_r32_xmm2m32(X86::Instruction const&);
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void CVTPS2PI_xmm1_mm2m64(X86::Instruction const&);
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void CVTSS2SI_xmm1_rm32(X86::Instruction const&);
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void UCOMISS_xmm1_xmm2m32(X86::Instruction const&);
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void COMISS_xmm1_xmm2m32(X86::Instruction const&);
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void MOVMSKPS_reg_xmm(X86::Instruction const&);
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void SQRTPS_xmm1_xmm2m128(X86::Instruction const&);
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void SQRTSS_xmm1_xmm2m32(X86::Instruction const&);
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void RSQRTPS_xmm1_xmm2m128(X86::Instruction const&);
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void RSQRTSS_xmm1_xmm2m32(X86::Instruction const&);
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void RCPPS_xmm1_xmm2m128(X86::Instruction const&);
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void RCPSS_xmm1_xmm2m32(X86::Instruction const&);
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void ANDPS_xmm1_xmm2m128(X86::Instruction const&);
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void ANDNPS_xmm1_xmm2m128(X86::Instruction const&);
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void ORPS_xmm1_xmm2m128(X86::Instruction const&);
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void XORPS_xmm1_xmm2m128(X86::Instruction const&);
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void ADDPS_xmm1_xmm2m128(X86::Instruction const&);
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void ADDSS_xmm1_xmm2m32(X86::Instruction const&);
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void MULPS_xmm1_xmm2m128(X86::Instruction const&);
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void MULSS_xmm1_xmm2m32(X86::Instruction const&);
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void SUBPS_xmm1_xmm2m128(X86::Instruction const&);
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void SUBSS_xmm1_xmm2m32(X86::Instruction const&);
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void MINPS_xmm1_xmm2m128(X86::Instruction const&);
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void MINSS_xmm1_xmm2m32(X86::Instruction const&);
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void DIVPS_xmm1_xmm2m128(X86::Instruction const&);
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void DIVSS_xmm1_xmm2m32(X86::Instruction const&);
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void MAXPS_xmm1_xmm2m128(X86::Instruction const&);
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void MAXSS_xmm1_xmm2m32(X86::Instruction const&);
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void PSHUFW_mm1_mm2m64_imm8(X86::Instruction const&);
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void CMPPS_xmm1_xmm2m128_imm8(X86::Instruction const&);
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void CMPSS_xmm1_xmm2m32_imm8(X86::Instruction const&);
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void PINSRW_mm1_r32m16_imm8(X86::Instruction const&);
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void PINSRW_xmm1_r32m16_imm8(X86::Instruction const&);
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void PEXTRW_reg_mm1_imm8(X86::Instruction const&);
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void PEXTRW_reg_xmm1_imm8(X86::Instruction const&);
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void SHUFPS_xmm1_xmm2m128_imm8(X86::Instruction const&);
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void PMOVMSKB_reg_mm1(X86::Instruction const&);
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void PMOVMSKB_reg_xmm1(X86::Instruction const&);
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void PMINUB_mm1_mm2m64(X86::Instruction const&);
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void PMINUB_xmm1_xmm2m128(X86::Instruction const&);
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void PMAXUB_mm1_mm2m64(X86::Instruction const&);
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void PMAXUB_xmm1_xmm2m128(X86::Instruction const&);
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void PAVGB_mm1_mm2m64(X86::Instruction const&);
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void PAVGB_xmm1_xmm2m128(X86::Instruction const&);
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void PAVGW_mm1_mm2m64(X86::Instruction const&);
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void PAVGW_xmm1_xmm2m128(X86::Instruction const&);
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void PMULHUW_mm1_mm2m64(X86::Instruction const&);
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void PMULHUW_xmm1_xmm2m64(X86::Instruction const&);
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void MOVNTQ_m64_mm1(X86::Instruction const&);
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void PMINSB_mm1_mm2m64(X86::Instruction const&);
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void PMINSB_xmm1_xmm2m128(X86::Instruction const&);
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void PMAXSB_mm1_mm2m64(X86::Instruction const&);
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void PMAXSB_xmm1_xmm2m128(X86::Instruction const&);
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void PSADBB_mm1_mm2m64(X86::Instruction const&);
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void PSADBB_xmm1_xmm2m128(X86::Instruction const&);
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void MASKMOVQ_mm1_mm2m64(X86::Instruction const&);
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};
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}
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