mirror of
https://github.com/RGBCube/serenity
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LibWasm+LibWeb: Parse and validate all Wasm SIMD instructions
This commit is contained in:
Ali Mohammad Pur
Ali Mohammad Pur
parent
b005691497
commit
2462064fcd
13 changed files with 2474 additions and 78 deletions
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@ -433,6 +433,15 @@ void Printer::print(Wasm::Instruction const& instruction)
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[&](TableIndex const& index) { print("(table index {})", index.value()); },
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[&](Instruction::IndirectCallArgs const& args) { print("(indirect (type index {}) (table index {}))", args.type.value(), args.table.value()); },
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[&](Instruction::MemoryArgument const& args) { print("(memory (align {}) (offset {}))", args.align, args.offset); },
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[&](Instruction::MemoryAndLaneArgument const& args) { print("(memory (align {}) (offset {})) (lane {})", args.memory.align, args.memory.offset, args.lane); },
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[&](Instruction::LaneIndex const& args) { print("(lane {})", args.lane); },
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[&](Instruction::ShuffleArgument const& args) {
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print("{{ {} {} {} {} {} {} {} {} {} {} {} {} {} {} {} {} }}",
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args.lanes[0], args.lanes[1], args.lanes[2], args.lanes[3],
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args.lanes[4], args.lanes[5], args.lanes[6], args.lanes[7],
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args.lanes[8], args.lanes[9], args.lanes[10], args.lanes[11],
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args.lanes[12], args.lanes[13], args.lanes[14], args.lanes[15]);
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},
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[&](Instruction::StructuredInstructionArgs const& args) {
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print("(structured\n");
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TemporaryChange change { m_indent, m_indent + 1 };
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@ -637,14 +646,17 @@ void Printer::print(Wasm::Value const& value)
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{
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print_indent();
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print("{} ", value.value().visit([&]<typename T>(T const& value) {
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if constexpr (IsSame<Wasm::Reference, T>)
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if constexpr (IsSame<Wasm::Reference, T>) {
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return DeprecatedString::formatted(
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"addr({})",
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value.ref().visit(
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[](Wasm::Reference::Null const&) { return DeprecatedString("null"); },
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[](auto const& ref) { return DeprecatedString::number(ref.address.value()); }));
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else
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} else if constexpr (IsSame<u128, T>) {
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return DeprecatedString::formatted("v128({:x})", value);
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} else {
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return DeprecatedString::formatted("{}", value);
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}
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}));
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TemporaryChange<size_t> change { m_indent, 0 };
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print(value.type());
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@ -861,6 +873,242 @@ HashMap<Wasm::OpCode, DeprecatedString> Wasm::Names::instruction_names {
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{ Instructions::table_grow, "table.grow" },
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{ Instructions::table_size, "table.size" },
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{ Instructions::table_fill, "table.fill" },
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{ Instructions::v128_load, "v128.load" },
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{ Instructions::v128_load8x8_s, "v128.load8x8_s" },
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{ Instructions::v128_load8x8_u, "v128.load8x8_u" },
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{ Instructions::v128_load16x4_s, "v128.load16x4_s" },
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{ Instructions::v128_load16x4_u, "v128.load16x4_u" },
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{ Instructions::v128_load32x2_s, "v128.load32x2_s" },
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{ Instructions::v128_load32x2_u, "v128.load32x2_u" },
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{ Instructions::v128_load8_splat, "v128.load8_splat" },
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{ Instructions::v128_load16_splat, "v128.load16_splat" },
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{ Instructions::v128_load32_splat, "v128.load32_splat" },
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{ Instructions::v128_load64_splat, "v128.load64_splat" },
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{ Instructions::v128_store, "v128.store" },
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{ Instructions::v128_const, "v128.const" },
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{ Instructions::i8x16_shuffle, "i8x16.shuffle" },
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{ Instructions::i8x16_swizzle, "i8x16.swizzle" },
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{ Instructions::i8x16_splat, "i8x16.splat" },
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{ Instructions::i16x8_splat, "i16x8.splat" },
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{ Instructions::i32x4_splat, "i32x4.splat" },
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{ Instructions::i64x2_splat, "i64x2.splat" },
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{ Instructions::f32x4_splat, "f32x4.splat" },
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{ Instructions::f64x2_splat, "f64x2.splat" },
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{ Instructions::i8x16_extract_lane_s, "i8x16.extract_lane_s" },
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{ Instructions::i8x16_extract_lane_u, "i8x16.extract_lane_u" },
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{ Instructions::i8x16_replace_lane, "i8x16.replace_lane" },
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{ Instructions::i16x8_extract_lane_s, "i16x8.extract_lane_s" },
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{ Instructions::i16x8_extract_lane_u, "i16x8.extract_lane_u" },
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{ Instructions::i16x8_replace_lane, "i16x8.replace_lane" },
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{ Instructions::i32x4_extract_lane, "i32x4.extract_lane" },
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{ Instructions::i32x4_replace_lane, "i32x4.replace_lane" },
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{ Instructions::i64x2_extract_lane, "i64x2.extract_lane" },
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{ Instructions::i64x2_replace_lane, "i64x2.replace_lane" },
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{ Instructions::f32x4_extract_lane, "f32x4.extract_lane" },
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{ Instructions::f32x4_replace_lane, "f32x4.replace_lane" },
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{ Instructions::f64x2_extract_lane, "f64x2.extract_lane" },
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{ Instructions::f64x2_replace_lane, "f64x2.replace_lane" },
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{ Instructions::i8x16_eq, "i8x16.eq" },
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{ Instructions::i8x16_ne, "i8x16.ne" },
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{ Instructions::i8x16_lt_s, "i8x16.lt_s" },
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{ Instructions::i8x16_lt_u, "i8x16.lt_u" },
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{ Instructions::i8x16_gt_s, "i8x16.gt_s" },
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{ Instructions::i8x16_gt_u, "i8x16.gt_u" },
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{ Instructions::i8x16_le_s, "i8x16.le_s" },
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{ Instructions::i8x16_le_u, "i8x16.le_u" },
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{ Instructions::i8x16_ge_s, "i8x16.ge_s" },
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{ Instructions::i8x16_ge_u, "i8x16.ge_u" },
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{ Instructions::i16x8_eq, "i16x8.eq" },
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{ Instructions::i16x8_ne, "i16x8.ne" },
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{ Instructions::i16x8_lt_s, "i16x8.lt_s" },
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{ Instructions::i16x8_lt_u, "i16x8.lt_u" },
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{ Instructions::i16x8_gt_s, "i16x8.gt_s" },
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{ Instructions::i16x8_gt_u, "i16x8.gt_u" },
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{ Instructions::i16x8_le_s, "i16x8.le_s" },
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{ Instructions::i16x8_le_u, "i16x8.le_u" },
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{ Instructions::i16x8_ge_s, "i16x8.ge_s" },
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{ Instructions::i16x8_ge_u, "i16x8.ge_u" },
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{ Instructions::i32x4_eq, "i32x4.eq" },
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{ Instructions::i32x4_ne, "i32x4.ne" },
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{ Instructions::i32x4_lt_s, "i32x4.lt_s" },
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{ Instructions::i32x4_lt_u, "i32x4.lt_u" },
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{ Instructions::i32x4_gt_s, "i32x4.gt_s" },
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{ Instructions::i32x4_gt_u, "i32x4.gt_u" },
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{ Instructions::i32x4_le_s, "i32x4.le_s" },
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{ Instructions::i32x4_le_u, "i32x4.le_u" },
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{ Instructions::i32x4_ge_s, "i32x4.ge_s" },
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{ Instructions::i32x4_ge_u, "i32x4.ge_u" },
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{ Instructions::f32x4_eq, "f32x4.eq" },
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{ Instructions::f32x4_ne, "f32x4.ne" },
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{ Instructions::f32x4_lt, "f32x4.lt" },
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{ Instructions::f32x4_gt, "f32x4.gt" },
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{ Instructions::f32x4_le, "f32x4.le" },
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{ Instructions::f32x4_ge, "f32x4.ge" },
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{ Instructions::f64x2_eq, "f64x2.eq" },
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{ Instructions::f64x2_ne, "f64x2.ne" },
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{ Instructions::f64x2_lt, "f64x2.lt" },
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{ Instructions::f64x2_gt, "f64x2.gt" },
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{ Instructions::f64x2_le, "f64x2.le" },
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{ Instructions::f64x2_ge, "f64x2.ge" },
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{ Instructions::v128_not, "v128.not" },
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{ Instructions::v128_and, "v128.and" },
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{ Instructions::v128_andnot, "v128.andnot" },
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{ Instructions::v128_or, "v128.or" },
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{ Instructions::v128_xor, "v128.xor" },
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{ Instructions::v128_bitselect, "v128.bitselect" },
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{ Instructions::v128_any_true, "v128.any_true" },
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{ Instructions::v128_load8_lane, "v128.load8_lane" },
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{ Instructions::v128_load16_lane, "v128.load16_lane" },
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{ Instructions::v128_load32_lane, "v128.load32_lane" },
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{ Instructions::v128_load64_lane, "v128.load64_lane" },
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{ Instructions::v128_store8_lane, "v128.store8_lane" },
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{ Instructions::v128_store16_lane, "v128.store16_lane" },
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{ Instructions::v128_store32_lane, "v128.store32_lane" },
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{ Instructions::v128_store64_lane, "v128.store64_lane" },
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{ Instructions::v128_load32_zero, "v128.load32_zero" },
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{ Instructions::v128_load64_zero, "v128.load64_zero" },
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{ Instructions::f32x4_demote_f64x2_zero, "f32x4.demote_f64x2_zero" },
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{ Instructions::f64x2_promote_low_f32x4, "f64x2.promote_low_f32x4" },
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{ Instructions::i8x16_abs, "i8x16.abs" },
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{ Instructions::i8x16_neg, "i8x16.neg" },
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{ Instructions::i8x16_popcnt, "i8x16.popcnt" },
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{ Instructions::i8x16_all_true, "i8x16.all_true" },
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{ Instructions::i8x16_bitmask, "i8x16.bitmask" },
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{ Instructions::i8x16_narrow_i16x8_s, "i8x16.narrow_i16x8_s" },
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{ Instructions::i8x16_narrow_i16x8_u, "i8x16.narrow_i16x8_u" },
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{ Instructions::f32x4_ceil, "f32x4.ceil" },
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{ Instructions::f32x4_floor, "f32x4.floor" },
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{ Instructions::f32x4_trunc, "f32x4.trunc" },
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{ Instructions::f32x4_nearest, "f32x4.nearest" },
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{ Instructions::i8x16_shl, "i8x16.shl" },
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{ Instructions::i8x16_shr_s, "i8x16.shr_s" },
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{ Instructions::i8x16_shr_u, "i8x16.shr_u" },
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{ Instructions::i8x16_add, "i8x16.add" },
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{ Instructions::i8x16_add_sat_s, "i8x16.add_sat_s" },
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{ Instructions::i8x16_add_sat_u, "i8x16.add_sat_u" },
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{ Instructions::i8x16_sub, "i8x16.sub" },
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{ Instructions::i8x16_sub_sat_s, "i8x16.sub_sat_s" },
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{ Instructions::i8x16_sub_sat_u, "i8x16.sub_sat_u" },
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{ Instructions::f64x2_ceil, "f64x2.ceil" },
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{ Instructions::f64x2_floor, "f64x2.floor" },
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{ Instructions::i8x16_min_s, "i8x16.min_s" },
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{ Instructions::i8x16_min_u, "i8x16.min_u" },
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{ Instructions::i8x16_max_s, "i8x16.max_s" },
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{ Instructions::i8x16_max_u, "i8x16.max_u" },
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{ Instructions::f64x2_trunc, "f64x2.trunc" },
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{ Instructions::i8x16_avgr_u, "i8x16.avgr_u" },
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{ Instructions::i16x8_extadd_pairwise_i8x16_s, "i16x8.extadd_pairwise_i8x16_s" },
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{ Instructions::i16x8_extadd_pairwise_i8x16_u, "i16x8.extadd_pairwise_i8x16_u" },
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{ Instructions::i32x4_extadd_pairwise_i16x8_s, "i32x4.extadd_pairwise_i16x8_s" },
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{ Instructions::i32x4_extadd_pairwise_i16x8_u, "i32x4.extadd_pairwise_i16x8_u" },
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{ Instructions::i16x8_abs, "i16x8.abs" },
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{ Instructions::i16x8_neg, "i16x8.neg" },
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{ Instructions::i16x8_q15mulr_sat_s, "i16x8.q15mulr_sat_s" },
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{ Instructions::i16x8_all_true, "i16x8.all_true" },
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{ Instructions::i16x8_bitmask, "i16x8.bitmask" },
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{ Instructions::i16x8_narrow_i32x4_s, "i16x8.narrow_i32x4_s" },
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{ Instructions::i16x8_narrow_i32x4_u, "i16x8.narrow_i32x4_u" },
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{ Instructions::i16x8_extend_low_i8x16_s, "i16x8.extend_low_i8x16_s" },
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{ Instructions::i16x8_extend_high_i8x16_s, "i16x8.extend_high_i8x16_s" },
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{ Instructions::i16x8_extend_low_i8x16_u, "i16x8.extend_low_i8x16_u" },
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{ Instructions::i16x8_extend_high_i8x16_u, "i16x8.extend_high_i8x16_u" },
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{ Instructions::i16x8_shl, "i16x8.shl" },
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{ Instructions::i16x8_shr_s, "i16x8.shr_s" },
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{ Instructions::i16x8_shr_u, "i16x8.shr_u" },
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{ Instructions::i16x8_add, "i16x8.add" },
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{ Instructions::i16x8_add_sat_s, "i16x8.add_sat_s" },
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{ Instructions::i16x8_add_sat_u, "i16x8.add_sat_u" },
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{ Instructions::i16x8_sub, "i16x8.sub" },
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{ Instructions::i16x8_sub_sat_s, "i16x8.sub_sat_s" },
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{ Instructions::i16x8_sub_sat_u, "i16x8.sub_sat_u" },
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{ Instructions::f64x2_nearest, "f64x2.nearest" },
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{ Instructions::i16x8_mul, "i16x8.mul" },
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{ Instructions::i16x8_min_s, "i16x8.min_s" },
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{ Instructions::i16x8_min_u, "i16x8.min_u" },
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{ Instructions::i16x8_max_s, "i16x8.max_s" },
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{ Instructions::i16x8_max_u, "i16x8.max_u" },
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{ Instructions::i16x8_avgr_u, "i16x8.avgr_u" },
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{ Instructions::i16x8_extmul_low_i8x16_s, "i16x8.extmul_low_i8x16_s" },
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{ Instructions::i16x8_extmul_high_i8x16_s, "i16x8.extmul_high_i8x16_s" },
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{ Instructions::i16x8_extmul_low_i8x16_u, "i16x8.extmul_low_i8x16_u" },
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{ Instructions::i16x8_extmul_high_i8x16_u, "i16x8.extmul_high_i8x16_u" },
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{ Instructions::i32x4_abs, "i32x4.abs" },
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{ Instructions::i32x4_neg, "i32x4.neg" },
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{ Instructions::i32x4_all_true, "i32x4.all_true" },
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{ Instructions::i32x4_bitmask, "i32x4.bitmask" },
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{ Instructions::i32x4_extend_low_i16x8_s, "i32x4.extend_low_i16x8_s" },
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{ Instructions::i32x4_extend_high_i16x8_s, "i32x4.extend_high_i16x8_s" },
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{ Instructions::i32x4_extend_low_i16x8_u, "i32x4.extend_low_i16x8_u" },
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{ Instructions::i32x4_extend_high_i16x8_u, "i32x4.extend_high_i16x8_u" },
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{ Instructions::i32x4_shl, "i32x4.shl" },
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{ Instructions::i32x4_shr_s, "i32x4.shr_s" },
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{ Instructions::i32x4_shr_u, "i32x4.shr_u" },
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{ Instructions::i32x4_add, "i32x4.add" },
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{ Instructions::i32x4_sub, "i32x4.sub" },
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{ Instructions::i32x4_mul, "i32x4.mul" },
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{ Instructions::i32x4_min_s, "i32x4.min_s" },
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{ Instructions::i32x4_min_u, "i32x4.min_u" },
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{ Instructions::i32x4_max_s, "i32x4.max_s" },
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{ Instructions::i32x4_max_u, "i32x4.max_u" },
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{ Instructions::i32x4_dot_i16x8_s, "i32x4.dot_i16x8_s" },
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{ Instructions::i32x4_extmul_low_i16x8_s, "i32x4.extmul_low_i16x8_s" },
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{ Instructions::i32x4_extmul_high_i16x8_s, "i32x4.extmul_high_i16x8_s" },
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{ Instructions::i32x4_extmul_low_i16x8_u, "i32x4.extmul_low_i16x8_u" },
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{ Instructions::i32x4_extmul_high_i16x8_u, "i32x4.extmul_high_i16x8_u" },
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{ Instructions::i64x2_abs, "i64x2.abs" },
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{ Instructions::i64x2_neg, "i64x2.neg" },
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{ Instructions::i64x2_all_true, "i64x2.all_true" },
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{ Instructions::i64x2_bitmask, "i64x2.bitmask" },
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{ Instructions::i64x2_extend_low_i32x4_s, "i64x2.extend_low_i32x4_s" },
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{ Instructions::i64x2_extend_high_i32x4_s, "i64x2.extend_high_i32x4_s" },
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{ Instructions::i64x2_extend_low_i32x4_u, "i64x2.extend_low_i32x4_u" },
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{ Instructions::i64x2_extend_high_i32x4_u, "i64x2.extend_high_i32x4_u" },
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{ Instructions::i64x2_shl, "i64x2.shl" },
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{ Instructions::i64x2_shr_s, "i64x2.shr_s" },
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{ Instructions::i64x2_shr_u, "i64x2.shr_u" },
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{ Instructions::i64x2_add, "i64x2.add" },
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{ Instructions::i64x2_sub, "i64x2.sub" },
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{ Instructions::i64x2_mul, "i64x2.mul" },
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{ Instructions::i64x2_eq, "i64x2.eq" },
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{ Instructions::i64x2_ne, "i64x2.ne" },
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{ Instructions::i64x2_lt_s, "i64x2.lt_s" },
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{ Instructions::i64x2_gt_s, "i64x2.gt_s" },
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{ Instructions::i64x2_le_s, "i64x2.le_s" },
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{ Instructions::i64x2_ge_s, "i64x2.ge_s" },
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{ Instructions::i64x2_extmul_low_i32x4_s, "i64x2.extmul_low_i32x4_s" },
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{ Instructions::i64x2_extmul_high_i32x4_s, "i64x2.extmul_high_i32x4_s" },
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{ Instructions::i64x2_extmul_low_i32x4_u, "i64x2.extmul_low_i32x4_u" },
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{ Instructions::i64x2_extmul_high_i32x4_u, "i64x2.extmul_high_i32x4_u" },
|
||||
{ Instructions::f32x4_abs, "f32x4.abs" },
|
||||
{ Instructions::f32x4_neg, "f32x4.neg" },
|
||||
{ Instructions::f32x4_sqrt, "f32x4.sqrt" },
|
||||
{ Instructions::f32x4_add, "f32x4.add" },
|
||||
{ Instructions::f32x4_sub, "f32x4.sub" },
|
||||
{ Instructions::f32x4_mul, "f32x4.mul" },
|
||||
{ Instructions::f32x4_div, "f32x4.div" },
|
||||
{ Instructions::f32x4_min, "f32x4.min" },
|
||||
{ Instructions::f32x4_max, "f32x4.max" },
|
||||
{ Instructions::f32x4_pmin, "f32x4.pmin" },
|
||||
{ Instructions::f32x4_pmax, "f32x4.pmax" },
|
||||
{ Instructions::f64x2_abs, "f64x2.abs" },
|
||||
{ Instructions::f64x2_neg, "f64x2.neg" },
|
||||
{ Instructions::f64x2_sqrt, "f64x2.sqrt" },
|
||||
{ Instructions::f64x2_add, "f64x2.add" },
|
||||
{ Instructions::f64x2_sub, "f64x2.sub" },
|
||||
{ Instructions::f64x2_mul, "f64x2.mul" },
|
||||
{ Instructions::f64x2_div, "f64x2.div" },
|
||||
{ Instructions::f64x2_min, "f64x2.min" },
|
||||
{ Instructions::f64x2_max, "f64x2.max" },
|
||||
{ Instructions::f64x2_pmin, "f64x2.pmin" },
|
||||
{ Instructions::f64x2_pmax, "f64x2.pmax" },
|
||||
{ Instructions::i32x4_trunc_sat_f32x4_s, "i32x4.trunc_sat_f32x4_s" },
|
||||
{ Instructions::i32x4_trunc_sat_f32x4_u, "i32x4.trunc_sat_f32x4_u" },
|
||||
{ Instructions::f32x4_convert_i32x4_s, "f32x4.convert_i32x4_s" },
|
||||
{ Instructions::f32x4_convert_i32x4_u, "f32x4.convert_i32x4_u" },
|
||||
{ Instructions::i32x4_trunc_sat_f64x2_s_zero, "i32x4.trunc_sat_f64x2_s_zero" },
|
||||
{ Instructions::i32x4_trunc_sat_f64x2_u_zero, "i32x4.trunc_sat_f64x2_u_zero" },
|
||||
{ Instructions::f64x2_convert_low_i32x4_s, "f64x2.convert_low_i32x4_s" },
|
||||
{ Instructions::f64x2_convert_low_i32x4_u, "f64x2.convert_low_i32x4_u" },
|
||||
{ Instructions::structured_else, "synthetic:else" },
|
||||
{ Instructions::structured_end, "synthetic:end" },
|
||||
};
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue