mirror of
https://github.com/RGBCube/serenity
synced 2025-07-27 05:07:45 +00:00
LibJIT: Introduce and use REX prefix helper
This makes the code a bit more readable and in conjunction with the ModRM helper should prevent some operand ordering bugs. This also includes one incidental bugfix: `sign_extend_32_to_64_bits`, was not setting the `REX.R` bit when appropriate, And one size obvious optimization: We may now elide the REX prefix on `xor eax, eax` as storing to a 32 bit register clears the upper 32 bit of said register, which is wanted here.
This commit is contained in:
Hendiadyoin1
Andreas Kling
parent
540963fbe3
commit
248782461c
1 changed files with 96 additions and 47 deletions
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@ -202,12 +202,78 @@ struct Assembler {
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}
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}
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union REX {
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struct {
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u8 B : 1; // ModRM::RM
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u8 X : 1; // SIB::Index
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u8 R : 1; // ModRM::Reg
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u8 W : 1; // Operand size override
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u8 _ : 4 { 0b0100 };
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};
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u8 raw;
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};
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enum class REX_W : bool {
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No = 0,
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Yes = 1
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};
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void emit_rex_for_OI(Operand arg, REX_W W)
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{
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emit_rex_for_slash(arg, W);
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}
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void emit_rex_for_slash(Operand arg, REX_W W)
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{
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VERIFY(arg.is_register_or_memory());
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if (W == REX_W::No && to_underlying(arg.reg) < 8)
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return;
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REX rex {
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.B = to_underlying(arg.reg) >= 8,
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.X = 0,
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.R = 0,
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.W = to_underlying(W)
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};
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emit8(rex.raw);
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}
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void emit_rex_for_mr(Operand dst, Operand src, REX_W W)
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{
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VERIFY(dst.is_register_or_memory());
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VERIFY(src.type == Operand::Type::Reg);
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if (W == REX_W::No && to_underlying(dst.reg) < 8 && to_underlying(src.reg) < 8)
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return;
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REX rex {
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.B = to_underlying(dst.reg) >= 8,
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.X = 0,
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.R = to_underlying(src.reg) >= 8,
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.W = to_underlying(W)
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};
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emit8(rex.raw);
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}
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void emit_rex_for_rm(Operand dst, Operand src, REX_W W)
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{
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VERIFY(src.is_register_or_memory());
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VERIFY(dst.type == Operand::Type::Reg);
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if (W == REX_W::No && to_underlying(dst.reg) < 8 && to_underlying(src.reg) < 8)
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return;
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REX rex {
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.B = to_underlying(src.reg) >= 8,
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.X = 0,
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.R = to_underlying(dst.reg) >= 8,
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.W = to_underlying(W)
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};
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emit8(rex.raw);
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}
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void shift_right(Operand dst, Operand count)
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{
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VERIFY(dst.type == Operand::Type::Reg);
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VERIFY(count.type == Operand::Type::Imm);
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VERIFY(count.fits_in_u8());
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(dst, REX_W::Yes);
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emit8(0xc1);
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emit_modrm_slash(5, dst);
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emit8(count.offset_or_immediate);
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@ -218,9 +284,7 @@ struct Assembler {
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if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
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if (src.type == Operand::Type::Reg && src.reg == dst.reg)
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return;
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emit8(0x48
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| ((to_underlying(src.reg) >= 8) ? 1 << 2 : 0)
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| ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_mr(dst, src, REX_W::Yes);
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emit8(0x89);
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emit_modrm_mr(dst, src, patchable);
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return;
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@ -230,29 +294,29 @@ struct Assembler {
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if (patchable == Patchable::No) {
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if (src.offset_or_immediate == 0) {
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// xor dst, dst
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? (1 << 0 | 1 << 2) : 0));
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// Note: Operand size does not matter here, as the result is 0-extended to 64 bit,
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// so we don't have to set the W flag in the REX prefix,
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// or use it at all in case we dont use REX addressed registers (elision is implemented in the helper)
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emit_rex_for_mr(dst, dst, REX_W::No);
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emit8(0x31);
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emit_modrm_mr(dst, dst, patchable);
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return;
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}
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if (src.fits_in_u32()) {
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if (dst.reg > Reg::RDI)
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emit8(0x41);
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emit_rex_for_OI(dst, REX_W::No);
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emit8(0xb8 | encode_reg(dst.reg));
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emit32(src.offset_or_immediate);
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return;
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}
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}
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_OI(dst, REX_W::Yes);
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emit8(0xb8 | encode_reg(dst.reg));
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emit64(src.offset_or_immediate);
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return;
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}
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if (dst.type == Operand::Type::Reg && src.is_register_or_memory()) {
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emit8(0x48
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| ((to_underlying(dst.reg) >= 8) ? 1 << 2 : 0)
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| ((to_underlying(src.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_rm(dst, src, REX_W::Yes);
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emit8(0x8b);
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emit_modrm_rm(dst, src, patchable);
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return;
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@ -342,8 +406,7 @@ struct Assembler {
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void jump(Operand op)
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{
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if (to_underlying(op.reg) >= 8)
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emit8(0x41);
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emit_rex_for_slash(op, REX_W::No);
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emit8(0xff);
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emit_modrm_slash(4, op);
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}
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@ -360,18 +423,16 @@ struct Assembler {
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if (lhs.type == Operand::Type::Reg && rhs.type == Operand::Type::Imm && rhs.offset_or_immediate == 0) {
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test(lhs, lhs);
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} else if (lhs.is_register_or_memory() && rhs.type == Operand::Type::Reg) {
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emit8(0x48
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| ((to_underlying(rhs.reg) >= 8) ? 1 << 2 : 0)
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| ((to_underlying(lhs.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_mr(lhs, rhs, REX_W::Yes);
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emit8(0x39);
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emit_modrm_mr(lhs, rhs);
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} else if (lhs.is_register_or_memory() && rhs.type == Operand::Type::Imm && rhs.fits_in_i8()) {
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emit8(0x48 | ((to_underlying(lhs.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(lhs, REX_W::Yes);
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emit8(0x83);
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emit_modrm_slash(7, lhs);
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emit8(rhs.offset_or_immediate);
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} else if (lhs.is_register_or_memory() && rhs.type == Operand::Type::Imm && rhs.fits_in_i32()) {
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emit8(0x48 | ((to_underlying(lhs.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(lhs, REX_W::Yes);
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emit8(0x81);
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emit_modrm_slash(7, lhs);
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emit32(rhs.offset_or_immediate);
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@ -383,14 +444,12 @@ struct Assembler {
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void test(Operand lhs, Operand rhs)
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{
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if (lhs.is_register_or_memory() && rhs.type == Operand::Type::Reg) {
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emit8(0x48
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| ((to_underlying(rhs.reg) >= 8) ? 1 << 2 : 0)
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| ((to_underlying(lhs.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_mr(lhs, rhs, REX_W::Yes);
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emit8(0x85);
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emit_modrm_mr(lhs, rhs);
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} else if (lhs.type != Operand::Type::Imm && rhs.type == Operand::Type::Imm) {
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VERIFY(rhs.fits_in_i32());
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emit8(0x48 | ((to_underlying(lhs.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(lhs, REX_W::Yes);
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emit8(0xf7);
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emit_modrm_slash(0, lhs);
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emit32(rhs.offset_or_immediate);
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@ -412,7 +471,7 @@ struct Assembler {
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void sign_extend_32_to_64_bits(Reg reg)
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{
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// movsxd (reg as 64-bit), (reg as 32-bit)
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emit8(0x48 | ((to_underlying(reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_rm(Operand::Register(reg), Operand::Register(reg), REX_W::Yes);
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emit8(0x63);
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emit_modrm_rm(Operand::Register(reg), Operand::Register(reg));
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}
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@ -421,18 +480,16 @@ struct Assembler {
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{
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// and dst,src
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if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
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emit8(0x48
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| ((to_underlying(src.reg) >= 8) ? 1 << 2 : 0)
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| ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_mr(dst, src, REX_W::Yes);
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emit8(0x21);
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emit_modrm_mr(dst, src);
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i8()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(dst, REX_W::Yes);
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emit8(0x83);
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emit_modrm_slash(4, dst);
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emit8(src.offset_or_immediate);
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i32()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(dst, REX_W::Yes);
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emit8(0x81);
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emit_modrm_slash(4, dst);
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emit32(src.offset_or_immediate);
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@ -445,18 +502,16 @@ struct Assembler {
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{
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// or dst,src
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if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
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emit8(0x48
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| ((to_underlying(src.reg) >= 8) ? 1 << 2 : 0)
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| ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_mr(dst, src, REX_W::Yes);
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emit8(0x09);
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emit_modrm_mr(dst, src);
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i8()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(dst, REX_W::Yes);
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emit8(0x83);
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emit_modrm_slash(1, dst);
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emit8(src.offset_or_immediate);
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i32()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(dst, REX_W::Yes);
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emit8(0x81);
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emit_modrm_slash(1, dst);
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emit32(src.offset_or_immediate);
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@ -510,8 +565,7 @@ struct Assembler {
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void push(Operand op)
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{
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if (op.type == Operand::Type::Reg) {
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if (to_underlying(op.reg) >= 8)
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emit8(0x49);
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emit_rex_for_OI(op, REX_W::No);
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emit8(0x50 | encode_reg(op.reg));
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} else if (op.type == Operand::Type::Imm) {
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if (op.fits_in_i8()) {
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@ -531,8 +585,7 @@ struct Assembler {
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void pop(Operand op)
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{
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if (op.type == Operand::Type::Reg) {
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if (to_underlying(op.reg) >= 8)
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emit8(0x49);
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emit_rex_for_OI(op, REX_W::No);
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emit8(0x58 | encode_reg(op.reg));
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} else {
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VERIFY_NOT_REACHED();
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@ -542,18 +595,16 @@ struct Assembler {
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void add(Operand dst, Operand src)
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{
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if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
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emit8(0x48
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| ((to_underlying(src.reg) >= 8) ? 1 << 2 : 0)
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| ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_mr(dst, src, REX_W::Yes);
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emit8(0x01);
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emit_modrm_mr(dst, src);
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} else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i8()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(dst, REX_W::Yes);
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emit8(0x83);
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emit_modrm_slash(0, dst);
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emit8(src.offset_or_immediate);
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} else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i32()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(dst, REX_W::Yes);
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emit8(0x81);
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emit_modrm_slash(0, dst);
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emit32(src.offset_or_immediate);
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@ -591,18 +642,16 @@ struct Assembler {
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void sub(Operand dst, Operand src)
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{
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if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
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emit8(0x48
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| ((to_underlying(src.reg) >= 8) ? 1 << 2 : 0)
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| ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_mr(dst, src, REX_W::Yes);
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emit8(0x29);
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emit_modrm_mr(dst, src);
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} else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i8()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(dst, REX_W::Yes);
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emit8(0x83);
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emit_modrm_slash(5, dst);
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emit8(src.offset_or_immediate);
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} else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i32()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit_rex_for_slash(dst, REX_W::Yes);
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emit8(0x81);
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emit_modrm_slash(5, dst);
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emit32(src.offset_or_immediate);
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