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Kernel/PCI: Simplify the entire subsystem
A couple of things were changed: 1. Semantic changes - PCI segments are now called PCI domains, to better match what they are really. It's also the name that Linux gave, and it seems that Wikipedia also uses this name. We also remove PCI::ChangeableAddress, because it was used in the past but now it's no longer being used. 2. There are no WindowedMMIOAccess or MMIOAccess classes anymore, as they made a bunch of unnecessary complexity. Instead, Windowed access is removed entirely (this was tested, but never was benchmarked), so we are left with IO access and memory access options. The memory access option is essentially mapping the PCI bus (from the chosen PCI domain), to virtual memory as-is. This means that unless needed, at any time, there is only one PCI bus being mapped, and this is changed if access to another PCI bus in the same PCI domain is needed. For now, we don't support mapping of different PCI buses from different PCI domains at the same time, because basically it's still a non-issue for most machines out there. 2. OOM-safety is increased, especially when constructing the Access object. It means that we pre-allocating any needed resources, and we try to find PCI domains (if requested to initialize memory access) after we attempt to construct the Access object, so it's possible to fail at this point "gracefully". 3. All PCI API functions are now separated into a different header file, which means only "clients" of the PCI subsystem API will need to include that header file. 4. Functional changes - we only allow now to enumerate the bus after a hardware scan. This means that the old method "enumerate_hardware" is removed, so, when initializing an Access object, the initializing function must call rescan on it to force it to find devices. This makes it possible to fail rescan, and also to defer it after construction from both OOM-safety terms and hotplug capabilities.
This commit is contained in:
Liav A
Andreas Kling
parent
d1378339f6
commit
25ea7461a0
39 changed files with 948 additions and 1163 deletions
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@ -4,24 +4,24 @@
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/ByteReader.h>
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#include <AK/HashTable.h>
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#include <Kernel/ACPI/Definitions.h>
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#include <Kernel/API/KResult.h>
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#include <Kernel/Bus/PCI/Access.h>
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#include <Kernel/Bus/PCI/IOAccess.h>
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#include <Kernel/Debug.h>
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#include <Kernel/IO.h>
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#include <Kernel/Memory/MemoryManager.h>
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#include <Kernel/Memory/Region.h>
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#include <Kernel/Sections.h>
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namespace Kernel {
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namespace PCI {
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namespace Kernel::PCI {
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#define PCI_MMIO_CONFIG_SPACE_SIZE 4096
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#define MEMORY_RANGE_PER_BUS (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE * PCI_MAX_DEVICES_PER_BUS)
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static Access* s_access;
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inline void write8(Address address, u32 field, u8 value) { Access::the().write8_field(address, field, value); }
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inline void write16(Address address, u32 field, u16 value) { Access::the().write16_field(address, field, value); }
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inline void write32(Address address, u32 field, u32 value) { Access::the().write32_field(address, field, value); }
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inline u8 read8(Address address, u32 field) { return Access::the().read8_field(address, field); }
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inline u16 read16(Address address, u32 field) { return Access::the().read16_field(address, field); }
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inline u32 read32(Address address, u32 field) { return Access::the().read32_field(address, field); }
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Access& Access::the()
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{
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if (s_access == nullptr) {
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@ -35,16 +35,400 @@ bool Access::is_initialized()
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return (s_access != nullptr);
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}
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UNMAP_AFTER_INIT Access::Access()
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: m_enumerated_buses(256, false)
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UNMAP_AFTER_INIT bool Access::initialize_for_memory_access(PhysicalAddress mcfg_table)
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{
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if (Access::is_initialized())
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return false;
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InterruptDisabler disabler;
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auto* access = new Access(Access::AccessType::Memory);
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if (!access->scan_pci_domains(mcfg_table))
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return false;
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access->rescan_hardware();
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dbgln_if(PCI_DEBUG, "PCI: MMIO access initialised.");
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return true;
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}
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UNMAP_AFTER_INIT bool Access::scan_pci_domains(PhysicalAddress mcfg_table)
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{
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auto checkup_region_or_error = MM.allocate_kernel_region(mcfg_table.page_base(), (PAGE_SIZE * 2), "PCI MCFG Checkup", Memory::Region::Access::ReadWrite);
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if (checkup_region_or_error.is_error())
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return false;
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dbgln_if(PCI_DEBUG, "PCI: Checking MCFG Table length to choose the correct mapping size");
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auto* sdt = (ACPI::Structures::SDTHeader*)checkup_region_or_error.value()->vaddr().offset(mcfg_table.offset_in_page()).as_ptr();
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u32 length = sdt->length;
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u8 revision = sdt->revision;
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dbgln("PCI: MCFG, length: {}, revision: {}", length, revision);
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auto mcfg_region_or_error = MM.allocate_kernel_region(mcfg_table.page_base(), Memory::page_round_up(length) + PAGE_SIZE, "PCI Parsing MCFG", Memory::Region::Access::ReadWrite);
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if (mcfg_region_or_error.is_error())
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return false;
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auto& mcfg = *(ACPI::Structures::MCFG*)mcfg_region_or_error.value()->vaddr().offset(mcfg_table.offset_in_page()).as_ptr();
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dbgln_if(PCI_DEBUG, "PCI: Checking MCFG @ {}, {}", VirtualAddress(&mcfg), mcfg_table);
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for (u32 index = 0; index < ((mcfg.header.length - sizeof(ACPI::Structures::MCFG)) / sizeof(ACPI::Structures::PCI_MMIO_Descriptor)); index++) {
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u8 start_bus = mcfg.descriptors[index].start_pci_bus;
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u8 end_bus = mcfg.descriptors[index].end_pci_bus;
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u32 lower_addr = mcfg.descriptors[index].base_addr;
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auto result = m_domains.set(index, { PhysicalAddress(lower_addr), start_bus, end_bus });
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VERIFY(result == AK::HashSetResult::InsertedNewEntry);
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dmesgln("PCI: New PCI domain @ {}, PCI buses ({}-{})", PhysicalAddress { lower_addr }, start_bus, end_bus);
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}
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VERIFY(m_domains.contains(0));
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dmesgln("PCI: MMIO domain: {}", m_domains.size());
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return true;
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}
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UNMAP_AFTER_INIT bool Access::initialize_for_io_access()
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{
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if (Access::is_initialized()) {
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return false;
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}
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auto* access = new Access(Access::AccessType::IO);
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access->rescan_hardware();
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dbgln_if(PCI_DEBUG, "PCI: IO access initialised.");
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return true;
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}
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UNMAP_AFTER_INIT Access::Access(AccessType access_type)
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: m_enumerated_buses(256, false)
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, m_access_type(access_type)
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{
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if (access_type == AccessType::IO)
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dmesgln("PCI: Using I/O instructions for PCI configuration space access");
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else
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dmesgln("PCI: Using memory access for PCI configuration space accesses");
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s_access = this;
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}
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Optional<PhysicalAddress> Access::determine_memory_mapped_bus_base_address(u32 domain, u8 bus) const
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{
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auto chosen_domain = m_domains.get(domain);
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if (!chosen_domain.has_value())
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return {};
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if (!(chosen_domain.value().start_bus() <= bus && bus <= chosen_domain.value().end_bus()))
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return {};
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return chosen_domain.value().paddr().offset(MEMORY_RANGE_PER_BUS * (bus - chosen_domain.value().start_bus()));
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}
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void Access::map_bus_region(u32 domain, u8 bus)
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{
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VERIFY(m_access_lock.is_locked());
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if (m_mapped_bus == bus && m_mapped_bus_region)
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return;
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auto bus_base_address = determine_memory_mapped_bus_base_address(domain, bus);
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// FIXME: Find a way to propagate error from here.
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if (!bus_base_address.has_value())
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VERIFY_NOT_REACHED();
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auto region_or_error = MM.allocate_kernel_region(bus_base_address.value(), MEMORY_RANGE_PER_BUS, "PCI ECAM", Memory::Region::Access::ReadWrite);
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// FIXME: Find a way to propagate error from here.
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if (region_or_error.is_error())
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VERIFY_NOT_REACHED();
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m_mapped_bus_region = region_or_error.release_value();
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m_mapped_bus = bus;
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dbgln_if(PCI_DEBUG, "PCI: New PCI ECAM Mapped region for bus {} @ {} {}", bus, m_mapped_bus_region->vaddr(), m_mapped_bus_region->physical_page(0)->paddr());
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}
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VirtualAddress Access::get_device_configuration_memory_mapped_space(Address address)
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{
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VERIFY(m_access_lock.is_locked());
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dbgln_if(PCI_DEBUG, "PCI: Getting device configuration space for {}", address);
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map_bus_region(address.domain(), address.bus());
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return m_mapped_bus_region->vaddr().offset(PCI_MMIO_CONFIG_SPACE_SIZE * address.function() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE) * address.device());
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}
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u8 Access::io_read8_field(Address address, u32 field)
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{
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MutexLocker lock(m_access_lock);
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dbgln_if(PCI_DEBUG, "PCI: IO Reading 8-bit field {:#08x} for {}", field, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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return IO::in8(PCI_VALUE_PORT + (field & 3));
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}
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u16 Access::io_read16_field(Address address, u32 field)
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{
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MutexLocker lock(m_access_lock);
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dbgln_if(PCI_DEBUG, "PCI: IO Reading 16-bit field {:#08x} for {}", field, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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return IO::in16(PCI_VALUE_PORT + (field & 2));
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}
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u32 Access::io_read32_field(Address address, u32 field)
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{
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MutexLocker lock(m_access_lock);
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dbgln_if(PCI_DEBUG, "PCI: IO Reading 32-bit field {:#08x} for {}", field, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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return IO::in32(PCI_VALUE_PORT);
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}
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void Access::io_write8_field(Address address, u32 field, u8 value)
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{
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MutexLocker lock(m_access_lock);
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dbgln_if(PCI_DEBUG, "PCI: IO Writing to 8-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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IO::out8(PCI_VALUE_PORT + (field & 3), value);
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}
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void Access::io_write16_field(Address address, u32 field, u16 value)
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{
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MutexLocker lock(m_access_lock);
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dbgln_if(PCI_DEBUG, "PCI: IO Writing to 16-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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IO::out16(PCI_VALUE_PORT + (field & 2), value);
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}
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void Access::io_write32_field(Address address, u32 field, u32 value)
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{
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MutexLocker lock(m_access_lock);
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dbgln_if(PCI_DEBUG, "PCI: IO Writing to 32-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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IO::out32(PCI_VALUE_PORT, value);
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}
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u8 Access::memory_read8_field(Address address, u32 field)
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{
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MutexLocker lock(m_access_lock);
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VERIFY(field <= 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 8-bit field {:#08x} for {}", field, address);
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return *((volatile u8*)(get_device_configuration_memory_mapped_space(address).get() + (field & 0xfff)));
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}
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u16 Access::memory_read16_field(Address address, u32 field)
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{
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MutexLocker lock(m_access_lock);
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VERIFY(field < 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 16-bit field {:#08x} for {}", field, address);
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u16 data = 0;
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ByteReader::load<u16>(get_device_configuration_memory_mapped_space(address).offset(field & 0xfff).as_ptr(), data);
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return data;
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}
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u32 Access::memory_read32_field(Address address, u32 field)
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{
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MutexLocker lock(m_access_lock);
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VERIFY(field <= 0xffc);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 32-bit field {:#08x} for {}", field, address);
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u32 data = 0;
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ByteReader::load<u32>(get_device_configuration_memory_mapped_space(address).offset(field & 0xfff).as_ptr(), data);
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return data;
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}
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void Access::memory_write8_field(Address address, u32 field, u8 value)
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{
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MutexLocker lock(m_access_lock);
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VERIFY(field <= 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 8-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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*((volatile u8*)(get_device_configuration_memory_mapped_space(address).get() + (field & 0xfff))) = value;
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}
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void Access::memory_write16_field(Address address, u32 field, u16 value)
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{
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MutexLocker lock(m_access_lock);
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VERIFY(field < 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 16-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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ByteReader::store<u16>(get_device_configuration_memory_mapped_space(address).offset(field & 0xfff).as_ptr(), value);
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}
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void Access::memory_write32_field(Address address, u32 field, u32 value)
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{
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MutexLocker lock(m_access_lock);
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VERIFY(field <= 0xffc);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 32-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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ByteReader::store<u32>(get_device_configuration_memory_mapped_space(address).offset(field & 0xfff).as_ptr(), value);
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}
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void Access::write8_field(Address address, u32 field, u8 value)
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{
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switch (m_access_type) {
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case AccessType::IO:
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io_write8_field(address, field, value);
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return;
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case AccessType::Memory:
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memory_write8_field(address, field, value);
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return;
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}
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VERIFY_NOT_REACHED();
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}
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void Access::write16_field(Address address, u32 field, u16 value)
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{
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switch (m_access_type) {
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case AccessType::IO:
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io_write16_field(address, field, value);
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return;
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case AccessType::Memory:
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memory_write16_field(address, field, value);
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return;
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}
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VERIFY_NOT_REACHED();
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}
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void Access::write32_field(Address address, u32 field, u32 value)
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{
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switch (m_access_type) {
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case AccessType::IO:
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io_write32_field(address, field, value);
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return;
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case AccessType::Memory:
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memory_write32_field(address, field, value);
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return;
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}
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VERIFY_NOT_REACHED();
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}
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u8 Access::read8_field(Address address, u32 field)
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{
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switch (m_access_type) {
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case AccessType::IO:
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return io_read8_field(address, field);
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case AccessType::Memory:
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return memory_read8_field(address, field);
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}
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VERIFY_NOT_REACHED();
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}
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u16 Access::read16_field(Address address, u32 field)
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{
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switch (m_access_type) {
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case AccessType::IO:
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return io_read16_field(address, field);
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case AccessType::Memory:
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return memory_read16_field(address, field);
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}
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VERIFY_NOT_REACHED();
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}
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u32 Access::read32_field(Address address, u32 field)
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{
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switch (m_access_type) {
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case AccessType::IO:
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return io_read32_field(address, field);
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case AccessType::Memory:
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return memory_read32_field(address, field);
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}
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VERIFY_NOT_REACHED();
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}
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UNMAP_AFTER_INIT void Access::rescan_hardware()
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{
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MutexLocker locker(m_scan_lock);
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VERIFY(m_physical_ids.is_empty());
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if (m_access_type == AccessType::IO) {
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dbgln_if(PCI_DEBUG, "PCI: IO enumerating hardware");
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// First scan bus 0. Find any device on that bus, and if it's a PCI-to-PCI
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// bridge, recursively scan it too.
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m_enumerated_buses.set(0, true);
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enumerate_bus(-1, 0, true);
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// Handle Multiple PCI host bridges on slot 0, device 0.
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// If we happen to miss some PCI buses because they are not reachable through
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// recursive PCI-to-PCI bridges starting from bus 0, we might find them here.
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if ((read8_field(Address(), PCI_HEADER_TYPE) & 0x80) != 0) {
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for (int bus = 1; bus < 256; ++bus) {
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if (read16_field(Address(0, 0, 0, bus), PCI_VENDOR_ID) == PCI_NONE)
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continue;
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if (read16_field(Address(0, 0, 0, bus), PCI_CLASS) != 0x6)
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continue;
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if (m_enumerated_buses.get(bus))
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continue;
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enumerate_bus(-1, bus, false);
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m_enumerated_buses.set(bus, true);
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}
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}
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return;
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}
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VERIFY(m_access_type == AccessType::Memory);
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for (u32 domain = 0; domain < m_domains.size(); domain++) {
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dbgln_if(PCI_DEBUG, "PCI: Scan memory mapped domain {}", domain);
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// Single PCI host controller.
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if ((read8_field(Address(domain), PCI_HEADER_TYPE) & 0x80) == 0) {
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enumerate_bus(-1, 0, true);
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return;
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}
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// Multiple PCI host controllers.
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for (u8 function = 0; function < 8; ++function) {
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if (read16_field(Address(domain, 0, 0, function), PCI_VENDOR_ID) == PCI_NONE)
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break;
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enumerate_bus(-1, function, false);
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}
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}
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}
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UNMAP_AFTER_INIT Optional<u8> Access::get_capabilities_pointer(Address address)
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{
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dbgln_if(PCI_DEBUG, "PCI: Getting capabilities pointer for {}", address);
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if (read16_field(address, PCI_STATUS) & (1 << 4)) {
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dbgln_if(PCI_DEBUG, "PCI: Found capabilities pointer for {}", address);
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return read8_field(address, PCI_CAPABILITIES_POINTER);
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}
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dbgln_if(PCI_DEBUG, "PCI: No capabilities pointer for {}", address);
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return {};
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}
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UNMAP_AFTER_INIT Vector<Capability> Access::get_capabilities(Address address)
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{
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dbgln_if(PCI_DEBUG, "PCI: Getting capabilities for {}", address);
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auto capabilities_pointer = get_capabilities_pointer(address);
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if (!capabilities_pointer.has_value()) {
|
||||
dbgln_if(PCI_DEBUG, "PCI: No capabilities for {}", address);
|
||||
return {};
|
||||
}
|
||||
Vector<Capability> capabilities;
|
||||
auto capability_pointer = capabilities_pointer.value();
|
||||
while (capability_pointer != 0) {
|
||||
dbgln_if(PCI_DEBUG, "PCI: Reading in capability at {:#02x} for {}", capability_pointer, address);
|
||||
u16 capability_header = read16_field(address, capability_pointer);
|
||||
u8 capability_id = capability_header & 0xff;
|
||||
capabilities.append({ address, capability_id, capability_pointer });
|
||||
capability_pointer = capability_header >> 8;
|
||||
}
|
||||
return capabilities;
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT void Access::enumerate_functions(int type, u8 bus, u8 device, u8 function, bool recursive)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Enumerating function type={}, bus={}, device={}, function={}", type, bus, device, function);
|
||||
Address address(0, bus, device, function);
|
||||
auto read_type = (read8_field(address, PCI_CLASS) << 8u) | read8_field(address, PCI_SUBCLASS);
|
||||
if (type == -1 || type == read_type) {
|
||||
m_physical_ids.append(PhysicalID { address, { read16_field(address, PCI_VENDOR_ID), read16_field(address, PCI_DEVICE_ID) }, get_capabilities(address) });
|
||||
}
|
||||
|
||||
if (read_type == PCI_TYPE_BRIDGE && recursive && (!m_enumerated_buses.get(read8_field(address, PCI_SECONDARY_BUS)))) {
|
||||
u8 secondary_bus = read8_field(address, PCI_SECONDARY_BUS);
|
||||
dbgln_if(PCI_DEBUG, "PCI: Found secondary bus: {}", secondary_bus);
|
||||
VERIFY(secondary_bus != bus);
|
||||
m_enumerated_buses.set(secondary_bus, true);
|
||||
enumerate_bus(type, secondary_bus, recursive);
|
||||
}
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT void Access::enumerate_device(int type, u8 bus, u8 device, bool recursive)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Enumerating device type={}, bus={}, device={}", type, bus, device);
|
||||
Address address(0, bus, device, 0);
|
||||
if (read16_field(address, PCI_VENDOR_ID) == PCI_NONE)
|
||||
return;
|
||||
enumerate_functions(type, bus, device, 0, recursive);
|
||||
if (!(read8_field(address, PCI_HEADER_TYPE) & 0x80))
|
||||
return;
|
||||
for (u8 function = 1; function < 8; ++function) {
|
||||
Address address(0, bus, device, function);
|
||||
if (read16_field(address, PCI_VENDOR_ID) != PCI_NONE)
|
||||
enumerate_functions(type, bus, device, function, recursive);
|
||||
}
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT void Access::enumerate_bus(int type, u8 bus, bool recursive)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Enumerating bus type={}, bus={}", type, bus);
|
||||
for (u8 device = 0; device < 32; ++device)
|
||||
enumerate_device(type, bus, device, recursive);
|
||||
}
|
||||
|
||||
void Access::fast_enumerate(Function<void(Address, ID)>& callback) const
|
||||
{
|
||||
MutexLocker locker(m_scan_lock);
|
||||
VERIFY(!m_physical_ids.is_empty());
|
||||
for (auto& physical_id : m_physical_ids) {
|
||||
callback(physical_id.address(), physical_id.id());
|
||||
}
|
||||
}
|
||||
|
||||
PhysicalID Access::get_physical_id(Address address) const
|
||||
{
|
||||
for (auto physical_id : m_physical_ids) {
|
||||
if (physical_id.address().seg() == address.seg()
|
||||
if (physical_id.address().domain() == address.domain()
|
||||
&& physical_id.address().bus() == address.bus()
|
||||
&& physical_id.address().device() == address.device()
|
||||
&& physical_id.address().function() == address.function()) {
|
||||
|
|
@ -54,400 +438,4 @@ PhysicalID Access::get_physical_id(Address address) const
|
|||
VERIFY_NOT_REACHED();
|
||||
}
|
||||
|
||||
u8 Access::early_read8_field(Address address, u32 field)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Early reading 8-bit field {:#08x} for {}", field, address);
|
||||
IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
|
||||
return IO::in8(PCI_VALUE_PORT + (field & 3));
|
||||
}
|
||||
|
||||
u16 Access::early_read16_field(Address address, u32 field)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Early reading 16-bit field {:#08x} for {}", field, address);
|
||||
IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
|
||||
return IO::in16(PCI_VALUE_PORT + (field & 2));
|
||||
}
|
||||
|
||||
u32 Access::early_read32_field(Address address, u32 field)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Early reading 32-bit field {:#08x} for {}", field, address);
|
||||
IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
|
||||
return IO::in32(PCI_VALUE_PORT);
|
||||
}
|
||||
|
||||
u16 Access::early_read_type(Address address)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Early reading type for {}", address);
|
||||
return (early_read8_field(address, PCI_CLASS) << 8u) | early_read8_field(address, PCI_SUBCLASS);
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT void Access::enumerate_functions(int type, u8 bus, u8 device, u8 function, Function<void(Address, ID)>& callback, bool recursive)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Enumerating function type={}, bus={}, device={}, function={}", type, bus, device, function);
|
||||
Address address(0, bus, device, function);
|
||||
if (type == -1 || type == early_read_type(address))
|
||||
callback(address, { early_read16_field(address, PCI_VENDOR_ID), early_read16_field(address, PCI_DEVICE_ID) });
|
||||
if (early_read_type(address) == PCI_TYPE_BRIDGE && recursive && (!m_enumerated_buses.get(early_read8_field(address, PCI_SECONDARY_BUS)))) {
|
||||
u8 secondary_bus = early_read8_field(address, PCI_SECONDARY_BUS);
|
||||
dbgln_if(PCI_DEBUG, "PCI: Found secondary bus: {}", secondary_bus);
|
||||
VERIFY(secondary_bus != bus);
|
||||
m_enumerated_buses.set(secondary_bus, true);
|
||||
enumerate_bus(type, secondary_bus, callback, recursive);
|
||||
}
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT void Access::enumerate_device(int type, u8 bus, u8 device, Function<void(Address, ID)>& callback, bool recursive)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Enumerating device type={}, bus={}, device={}", type, bus, device);
|
||||
Address address(0, bus, device, 0);
|
||||
if (early_read16_field(address, PCI_VENDOR_ID) == PCI_NONE)
|
||||
return;
|
||||
enumerate_functions(type, bus, device, 0, callback, recursive);
|
||||
if (!(early_read8_field(address, PCI_HEADER_TYPE) & 0x80))
|
||||
return;
|
||||
for (u8 function = 1; function < 8; ++function) {
|
||||
Address address(0, bus, device, function);
|
||||
if (early_read16_field(address, PCI_VENDOR_ID) != PCI_NONE)
|
||||
enumerate_functions(type, bus, device, function, callback, recursive);
|
||||
}
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT void Access::enumerate_bus(int type, u8 bus, Function<void(Address, ID)>& callback, bool recursive)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Enumerating bus type={}, bus={}", type, bus);
|
||||
for (u8 device = 0; device < 32; ++device)
|
||||
enumerate_device(type, bus, device, callback, recursive);
|
||||
}
|
||||
|
||||
void Access::enumerate(Function<void(Address, ID)>& callback) const
|
||||
{
|
||||
for (auto& physical_id : m_physical_ids) {
|
||||
callback(physical_id.address(), physical_id.id());
|
||||
}
|
||||
}
|
||||
|
||||
void enumerate(Function<void(Address, ID)> callback)
|
||||
{
|
||||
Access::the().enumerate(callback);
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT Optional<u8> get_capabilities_pointer(Address address)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Getting capabilities pointer for {}", address);
|
||||
if (PCI::read16(address, PCI_STATUS) & (1 << 4)) {
|
||||
dbgln_if(PCI_DEBUG, "PCI: Found capabilities pointer for {}", address);
|
||||
return PCI::read8(address, PCI_CAPABILITIES_POINTER);
|
||||
}
|
||||
dbgln_if(PCI_DEBUG, "PCI: No capabilities pointer for {}", address);
|
||||
return {};
|
||||
}
|
||||
|
||||
PhysicalID get_physical_id(Address address)
|
||||
{
|
||||
return Access::the().get_physical_id(address);
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT Vector<Capability> get_capabilities(Address address)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Getting capabilities for {}", address);
|
||||
auto capabilities_pointer = PCI::get_capabilities_pointer(address);
|
||||
if (!capabilities_pointer.has_value()) {
|
||||
dbgln_if(PCI_DEBUG, "PCI: No capabilities for {}", address);
|
||||
return {};
|
||||
}
|
||||
Vector<Capability> capabilities;
|
||||
auto capability_pointer = capabilities_pointer.value();
|
||||
while (capability_pointer != 0) {
|
||||
dbgln_if(PCI_DEBUG, "PCI: Reading in capability at {:#02x} for {}", capability_pointer, address);
|
||||
u16 capability_header = PCI::read16(address, capability_pointer);
|
||||
u8 capability_id = capability_header & 0xff;
|
||||
capabilities.append({ address, capability_id, capability_pointer });
|
||||
capability_pointer = capability_header >> 8;
|
||||
}
|
||||
return capabilities;
|
||||
}
|
||||
|
||||
void raw_access(Address address, u32 field, size_t access_size, u32 value)
|
||||
{
|
||||
VERIFY(access_size != 0);
|
||||
if (access_size == 1) {
|
||||
write8(address, field, value);
|
||||
return;
|
||||
}
|
||||
if (access_size == 2) {
|
||||
write16(address, field, value);
|
||||
return;
|
||||
}
|
||||
if (access_size == 4) {
|
||||
write32(address, field, value);
|
||||
return;
|
||||
}
|
||||
VERIFY_NOT_REACHED();
|
||||
}
|
||||
|
||||
ID get_id(Address address)
|
||||
{
|
||||
return { read16(address, PCI_VENDOR_ID), read16(address, PCI_DEVICE_ID) };
|
||||
}
|
||||
|
||||
void enable_io_space(Address address)
|
||||
{
|
||||
write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) | (1 << 0));
|
||||
}
|
||||
void disable_io_space(Address address)
|
||||
{
|
||||
write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) & ~(1 << 0));
|
||||
}
|
||||
|
||||
void enable_memory_space(Address address)
|
||||
{
|
||||
write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) | (1 << 1));
|
||||
}
|
||||
void disable_memory_space(Address address)
|
||||
{
|
||||
write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) & ~(1 << 1));
|
||||
}
|
||||
bool is_io_space_enabled(Address address)
|
||||
{
|
||||
return (read16(address, PCI_COMMAND) & 1) != 0;
|
||||
}
|
||||
|
||||
void enable_interrupt_line(Address address)
|
||||
{
|
||||
write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) & ~(1 << 10));
|
||||
}
|
||||
|
||||
void disable_interrupt_line(Address address)
|
||||
{
|
||||
write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) | 1 << 10);
|
||||
}
|
||||
|
||||
u8 get_interrupt_line(Address address)
|
||||
{
|
||||
return read8(address, PCI_INTERRUPT_LINE);
|
||||
}
|
||||
|
||||
u32 get_BAR0(Address address)
|
||||
{
|
||||
return read32(address, PCI_BAR0);
|
||||
}
|
||||
|
||||
u32 get_BAR1(Address address)
|
||||
{
|
||||
return read32(address, PCI_BAR1);
|
||||
}
|
||||
|
||||
u32 get_BAR2(Address address)
|
||||
{
|
||||
return read32(address, PCI_BAR2);
|
||||
}
|
||||
|
||||
u32 get_BAR3(Address address)
|
||||
{
|
||||
return read16(address, PCI_BAR3);
|
||||
}
|
||||
|
||||
u32 get_BAR4(Address address)
|
||||
{
|
||||
return read32(address, PCI_BAR4);
|
||||
}
|
||||
|
||||
u32 get_BAR5(Address address)
|
||||
{
|
||||
return read32(address, PCI_BAR5);
|
||||
}
|
||||
|
||||
u32 get_BAR(Address address, u8 bar)
|
||||
{
|
||||
VERIFY(bar <= 5);
|
||||
switch (bar) {
|
||||
case 0:
|
||||
return get_BAR0(address);
|
||||
case 1:
|
||||
return get_BAR1(address);
|
||||
case 2:
|
||||
return get_BAR2(address);
|
||||
case 3:
|
||||
return get_BAR3(address);
|
||||
case 4:
|
||||
return get_BAR4(address);
|
||||
case 5:
|
||||
return get_BAR5(address);
|
||||
default:
|
||||
VERIFY_NOT_REACHED();
|
||||
}
|
||||
}
|
||||
|
||||
u8 get_revision_id(Address address)
|
||||
{
|
||||
return read8(address, PCI_REVISION_ID);
|
||||
}
|
||||
|
||||
u8 get_subclass(Address address)
|
||||
{
|
||||
return read8(address, PCI_SUBCLASS);
|
||||
}
|
||||
|
||||
u8 get_class(Address address)
|
||||
{
|
||||
return read8(address, PCI_CLASS);
|
||||
}
|
||||
|
||||
u8 get_programming_interface(Address address)
|
||||
{
|
||||
return read8(address, PCI_PROG_IF);
|
||||
}
|
||||
|
||||
u16 get_subsystem_id(Address address)
|
||||
{
|
||||
return read16(address, PCI_SUBSYSTEM_ID);
|
||||
}
|
||||
|
||||
u16 get_subsystem_vendor_id(Address address)
|
||||
{
|
||||
return read16(address, PCI_SUBSYSTEM_VENDOR_ID);
|
||||
}
|
||||
|
||||
void enable_bus_mastering(Address address)
|
||||
{
|
||||
auto value = read16(address, PCI_COMMAND);
|
||||
value |= (1 << 2);
|
||||
value |= (1 << 0);
|
||||
write16(address, PCI_COMMAND, value);
|
||||
}
|
||||
|
||||
void disable_bus_mastering(Address address)
|
||||
{
|
||||
auto value = read16(address, PCI_COMMAND);
|
||||
value &= ~(1 << 2);
|
||||
value |= (1 << 0);
|
||||
write16(address, PCI_COMMAND, value);
|
||||
}
|
||||
|
||||
size_t get_BAR_space_size(Address address, u8 bar_number)
|
||||
{
|
||||
// See PCI Spec 2.3, Page 222
|
||||
VERIFY(bar_number < 6);
|
||||
u8 field = (PCI_BAR0 + (bar_number << 2));
|
||||
u32 bar_reserved = read32(address, field);
|
||||
write32(address, field, 0xFFFFFFFF);
|
||||
u32 space_size = read32(address, field);
|
||||
write32(address, field, bar_reserved);
|
||||
space_size &= 0xfffffff0;
|
||||
space_size = (~space_size) + 1;
|
||||
return space_size;
|
||||
}
|
||||
|
||||
u8 Capability::read8(u32 field) const
|
||||
{
|
||||
return PCI::read8(m_address, m_ptr + field);
|
||||
}
|
||||
|
||||
u16 Capability::read16(u32 field) const
|
||||
{
|
||||
return PCI::read16(m_address, m_ptr + field);
|
||||
}
|
||||
|
||||
u32 Capability::read32(u32 field) const
|
||||
{
|
||||
return PCI::read32(m_address, m_ptr + field);
|
||||
}
|
||||
|
||||
void Capability::write8(u32 field, u8 value)
|
||||
{
|
||||
PCI::write8(m_address, m_ptr + field, value);
|
||||
}
|
||||
|
||||
void Capability::write16(u32 field, u16 value)
|
||||
{
|
||||
PCI::write16(m_address, m_ptr + field, value);
|
||||
}
|
||||
|
||||
void Capability::write32(u32 field, u32 value)
|
||||
{
|
||||
PCI::write32(m_address, m_ptr + field, value);
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT NonnullRefPtr<PCIDeviceSysFSDirectory> PCIDeviceSysFSDirectory::create(const SysFSDirectory& parent_directory, Address address)
|
||||
{
|
||||
return adopt_ref(*new (nothrow) PCIDeviceSysFSDirectory(parent_directory, address));
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT PCIDeviceSysFSDirectory::PCIDeviceSysFSDirectory(const SysFSDirectory& parent_directory, Address address)
|
||||
: SysFSDirectory(String::formatted("{:04x}:{:02x}:{:02x}.{}", address.seg(), address.bus(), address.device(), address.function()), parent_directory)
|
||||
, m_address(address)
|
||||
{
|
||||
m_components.append(PCIDeviceAttributeSysFSComponent::create("vendor", *this, PCI_VENDOR_ID, 2));
|
||||
m_components.append(PCIDeviceAttributeSysFSComponent::create("device_id", *this, PCI_DEVICE_ID, 2));
|
||||
m_components.append(PCIDeviceAttributeSysFSComponent::create("class", *this, PCI_CLASS, 1));
|
||||
m_components.append(PCIDeviceAttributeSysFSComponent::create("subclass", *this, PCI_SUBCLASS, 1));
|
||||
m_components.append(PCIDeviceAttributeSysFSComponent::create("revision", *this, PCI_REVISION_ID, 1));
|
||||
m_components.append(PCIDeviceAttributeSysFSComponent::create("progif", *this, PCI_PROG_IF, 1));
|
||||
m_components.append(PCIDeviceAttributeSysFSComponent::create("subsystem_vendor", *this, PCI_SUBSYSTEM_VENDOR_ID, 2));
|
||||
m_components.append(PCIDeviceAttributeSysFSComponent::create("subsystem_id", *this, PCI_SUBSYSTEM_ID, 2));
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT void PCIBusSysFSDirectory::initialize()
|
||||
{
|
||||
auto pci_directory = adopt_ref(*new (nothrow) PCIBusSysFSDirectory());
|
||||
SysFSComponentRegistry::the().register_new_component(pci_directory);
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT PCIBusSysFSDirectory::PCIBusSysFSDirectory()
|
||||
: SysFSDirectory("pci", SysFSComponentRegistry::the().root_directory())
|
||||
{
|
||||
PCI::enumerate([&](const Address& address, ID) {
|
||||
auto pci_device = PCI::PCIDeviceSysFSDirectory::create(*this, address);
|
||||
m_components.append(pci_device);
|
||||
});
|
||||
}
|
||||
|
||||
NonnullRefPtr<PCIDeviceAttributeSysFSComponent> PCIDeviceAttributeSysFSComponent::create(String name, const PCIDeviceSysFSDirectory& device, size_t offset, size_t field_bytes_width)
|
||||
{
|
||||
return adopt_ref(*new (nothrow) PCIDeviceAttributeSysFSComponent(name, device, offset, field_bytes_width));
|
||||
}
|
||||
|
||||
PCIDeviceAttributeSysFSComponent::PCIDeviceAttributeSysFSComponent(String name, const PCIDeviceSysFSDirectory& device, size_t offset, size_t field_bytes_width)
|
||||
: SysFSComponent(name)
|
||||
, m_device(device)
|
||||
, m_offset(offset)
|
||||
, m_field_bytes_width(field_bytes_width)
|
||||
{
|
||||
}
|
||||
|
||||
KResultOr<size_t> PCIDeviceAttributeSysFSComponent::read_bytes(off_t offset, size_t count, UserOrKernelBuffer& buffer, FileDescription*) const
|
||||
{
|
||||
auto blob = try_to_generate_buffer();
|
||||
if (!blob)
|
||||
return KResult(EFAULT);
|
||||
|
||||
if ((size_t)offset >= blob->size())
|
||||
return KSuccess;
|
||||
|
||||
ssize_t nread = min(static_cast<off_t>(blob->size() - offset), static_cast<off_t>(count));
|
||||
if (!buffer.write(blob->data() + offset, nread))
|
||||
return KResult(EFAULT);
|
||||
return nread;
|
||||
}
|
||||
|
||||
OwnPtr<KBuffer> PCIDeviceAttributeSysFSComponent::try_to_generate_buffer() const
|
||||
{
|
||||
String value;
|
||||
switch (m_field_bytes_width) {
|
||||
case 1:
|
||||
value = String::formatted("{:#x}", PCI::read8(m_device->address(), m_offset));
|
||||
break;
|
||||
case 2:
|
||||
value = String::formatted("{:#x}", PCI::read16(m_device->address(), m_offset));
|
||||
break;
|
||||
case 4:
|
||||
value = String::formatted("{:#x}", PCI::read32(m_device->address(), m_offset));
|
||||
break;
|
||||
default:
|
||||
VERIFY_NOT_REACHED();
|
||||
}
|
||||
|
||||
return KBuffer::try_create_with_bytes(value.substring_view(0).bytes());
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue