mirror of
https://github.com/RGBCube/serenity
synced 2025-07-26 07:47:37 +00:00
AK: Rename the common integer typedefs to make it obvious what they are.
These types can be picked up by including <AK/Types.h>: * u8, u16, u32, u64 (unsigned) * i8, i16, i32, i64 (signed)
This commit is contained in:
Andreas Kling
parent
c4c4bbc5ba
commit
27f699ef0c
208 changed files with 1603 additions and 1621 deletions
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@ -13,7 +13,7 @@
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struct [[gnu::packed]] DescriptorTablePointer
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{
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word limit;
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u16 limit;
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void* address;
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};
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@ -24,18 +24,18 @@ static Descriptor s_gdt[256];
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static IRQHandler* s_irq_handler[16];
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static Vector<word>* s_gdt_freelist;
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static Vector<u16>* s_gdt_freelist;
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static word s_gdt_length;
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static u16 s_gdt_length;
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word gdt_alloc_entry()
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u16 gdt_alloc_entry()
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{
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ASSERT(s_gdt_freelist);
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ASSERT(!s_gdt_freelist->is_empty());
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return s_gdt_freelist->take_last();
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}
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void gdt_free_entry(word entry)
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void gdt_free_entry(u16 entry)
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{
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s_gdt_freelist->append(entry);
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}
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@ -123,8 +123,8 @@ asm(
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template<typename DumpType>
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static void dump(const DumpType& regs)
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{
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word ss;
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dword esp;
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u16 ss;
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u32 esp;
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if (!current || current->process().is_ring0()) {
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ss = regs.ds;
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esp = regs.esp;
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@ -144,7 +144,7 @@ static void dump(const DumpType& regs)
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kprintf("ebp=%x esp=%x esi=%x edi=%x\n", regs.ebp, esp, regs.esi, regs.edi);
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if (current && current->process().validate_read((void*)regs.eip, 8)) {
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byte* codeptr = (byte*)regs.eip;
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u8* codeptr = (u8*)regs.eip;
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kprintf("code: %b %b %b %b %b %b %b %b\n",
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codeptr[0],
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codeptr[1],
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@ -236,11 +236,11 @@ void exception_14_handler(RegisterDumpWithExceptionCode& regs)
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{
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ASSERT(current);
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dword fault_address;
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u32 fault_address;
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asm("movl %%cr2, %%eax"
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: "=a"(fault_address));
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dword fault_page_directory;
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u32 fault_page_directory;
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asm("movl %%cr3, %%eax"
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: "=a"(fault_page_directory));
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@ -269,8 +269,8 @@ void exception_14_handler(RegisterDumpWithExceptionCode& regs)
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regs.exception_code & 2 ? "write to" : "read from",
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fault_address);
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dword malloc_scrub_pattern = explode_byte(MALLOC_SCRUB_BYTE);
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dword free_scrub_pattern = explode_byte(FREE_SCRUB_BYTE);
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u32 malloc_scrub_pattern = explode_byte(MALLOC_SCRUB_BYTE);
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u32 free_scrub_pattern = explode_byte(FREE_SCRUB_BYTE);
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if ((fault_address & 0xffff0000) == (malloc_scrub_pattern & 0xffff0000)) {
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kprintf("\033[33;1mNote: Address %p looks like it may be uninitialized malloc() memory\033[0m\n", fault_address);
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} else if ((fault_address & 0xffff0000) == (free_scrub_pattern & 0xffff0000)) {
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@ -293,7 +293,7 @@ void exception_14_handler(RegisterDumpWithExceptionCode& regs)
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static void _exception##i() \
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{ \
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kprintf(msg "\n"); \
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dword cr0, cr2, cr3, cr4; \
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u32 cr0, cr2, cr3, cr4; \
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asm("movl %%cr0, %%eax" \
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: "=a"(cr0)); \
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asm("movl %%cr2, %%eax" \
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@ -319,9 +319,9 @@ EH(12, "Stack exception")
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EH(15, "Unknown error")
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EH(16, "Coprocessor error")
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static void write_raw_gdt_entry(word selector, dword low, dword high)
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static void write_raw_gdt_entry(u16 selector, u32 low, u32 high)
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{
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word i = (selector & 0xfffc) >> 3;
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u16 i = (selector & 0xfffc) >> 3;
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s_gdt[i].low = low;
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s_gdt[i].high = high;
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@ -329,14 +329,14 @@ static void write_raw_gdt_entry(word selector, dword low, dword high)
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s_gdtr.limit = (s_gdt_length + 1) * 8 - 1;
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}
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void write_gdt_entry(word selector, Descriptor& descriptor)
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void write_gdt_entry(u16 selector, Descriptor& descriptor)
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{
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write_raw_gdt_entry(selector, descriptor.low, descriptor.high);
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}
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Descriptor& get_gdt_entry(word selector)
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Descriptor& get_gdt_entry(u16 selector)
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{
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word i = (selector & 0xfffc) >> 3;
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u16 i = (selector & 0xfffc) >> 3;
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return *(Descriptor*)(&s_gdt[i]);
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}
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@ -352,7 +352,7 @@ void gdt_init()
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{
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s_gdt_length = 5;
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s_gdt_freelist = new Vector<word>();
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s_gdt_freelist = new Vector<u16>();
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s_gdt_freelist->ensure_capacity(256);
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for (size_t i = s_gdt_length; i < 256; ++i)
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s_gdt_freelist->append(i * 8);
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@ -389,30 +389,30 @@ static void unimp_trap()
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hang();
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}
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void register_irq_handler(byte irq, IRQHandler& handler)
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void register_irq_handler(u8 irq, IRQHandler& handler)
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{
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ASSERT(!s_irq_handler[irq]);
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s_irq_handler[irq] = &handler;
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register_interrupt_handler(IRQ_VECTOR_BASE + irq, asm_irq_entry);
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}
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void unregister_irq_handler(byte irq, IRQHandler& handler)
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void unregister_irq_handler(u8 irq, IRQHandler& handler)
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{
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ASSERT(s_irq_handler[irq] == &handler);
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s_irq_handler[irq] = nullptr;
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}
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void register_interrupt_handler(byte index, void (*f)())
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void register_interrupt_handler(u8 index, void (*f)())
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{
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s_idt[index].low = 0x00080000 | LSW((f));
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s_idt[index].high = ((dword)(f)&0xffff0000) | 0x8e00;
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s_idt[index].high = ((u32)(f)&0xffff0000) | 0x8e00;
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flush_idt();
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}
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void register_user_callable_interrupt_handler(byte index, void (*f)())
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void register_user_callable_interrupt_handler(u8 index, void (*f)())
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{
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s_idt[index].low = 0x00080000 | LSW((f));
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s_idt[index].high = ((dword)(f)&0xffff0000) | 0xef00;
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s_idt[index].high = ((u32)(f)&0xffff0000) | 0xef00;
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flush_idt();
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}
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@ -437,7 +437,7 @@ void idt_init()
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s_idtr.address = s_idt;
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s_idtr.limit = 0x100 * 8 - 1;
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for (byte i = 0xff; i > 0x10; --i)
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for (u8 i = 0xff; i > 0x10; --i)
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register_interrupt_handler(i, unimp_trap);
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register_interrupt_handler(0x00, exception_0_entry);
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@ -460,28 +460,28 @@ void idt_init()
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register_interrupt_handler(0x57, irq7_handler);
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for (byte i = 0; i < 16; ++i) {
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for (u8 i = 0; i < 16; ++i) {
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s_irq_handler[i] = nullptr;
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}
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flush_idt();
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}
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void load_task_register(word selector)
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void load_task_register(u16 selector)
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{
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asm("ltr %0" ::"r"(selector));
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}
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void handle_irq()
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{
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word isr = PIC::get_isr();
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u16 isr = PIC::get_isr();
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if (!isr) {
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kprintf("Spurious IRQ\n");
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return;
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}
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byte irq = 0;
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for (byte i = 0; i < 16; ++i) {
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u8 irq = 0;
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for (u8 i = 0; i < 16; ++i) {
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if (i == 2)
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continue;
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if (isr & (1 << i)) {
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@ -13,45 +13,45 @@ class PageTableEntry;
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struct [[gnu::packed]] TSS32
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{
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word backlink, __blh;
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dword esp0;
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word ss0, __ss0h;
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dword esp1;
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word ss1, __ss1h;
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dword esp2;
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word ss2, __ss2h;
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dword cr3, eip, eflags;
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dword eax, ecx, edx, ebx, esp, ebp, esi, edi;
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word es, __esh;
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word cs, __csh;
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word ss, __ssh;
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word ds, __dsh;
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word fs, __fsh;
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word gs, __gsh;
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word ldt, __ldth;
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word trace, iomapbase;
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u16 backlink, __blh;
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u32 esp0;
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u16 ss0, __ss0h;
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u32 esp1;
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u16 ss1, __ss1h;
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u32 esp2;
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u16 ss2, __ss2h;
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u32 cr3, eip, eflags;
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u32 eax, ecx, edx, ebx, esp, ebp, esi, edi;
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u16 es, __esh;
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u16 cs, __csh;
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u16 ss, __ssh;
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u16 ds, __dsh;
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u16 fs, __fsh;
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u16 gs, __gsh;
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u16 ldt, __ldth;
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u16 trace, iomapbase;
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};
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union [[gnu::packed]] Descriptor
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{
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struct {
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word limit_lo;
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word base_lo;
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byte base_hi;
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byte type : 4;
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byte descriptor_type : 1;
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byte dpl : 2;
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byte segment_present : 1;
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byte limit_hi : 4;
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byte : 1;
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byte zero : 1;
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byte operation_size : 1;
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byte granularity : 1;
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byte base_hi2;
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u16 limit_lo;
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u16 base_lo;
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u8 base_hi;
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u8 type : 4;
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u8 descriptor_type : 1;
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u8 dpl : 2;
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u8 segment_present : 1;
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u8 limit_hi : 4;
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u8 : 1;
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u8 zero : 1;
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u8 operation_size : 1;
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u8 granularity : 1;
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u8 base_hi2;
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};
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struct {
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dword low;
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dword high;
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u32 low;
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u32 high;
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};
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enum Type {
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@ -72,15 +72,15 @@ union [[gnu::packed]] Descriptor
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void set_base(void* b)
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{
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base_lo = (dword)(b)&0xffff;
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base_hi = ((dword)(b) >> 16) & 0xff;
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base_hi2 = ((dword)(b) >> 24) & 0xff;
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base_lo = (u32)(b)&0xffff;
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base_hi = ((u32)(b) >> 16) & 0xff;
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base_hi2 = ((u32)(b) >> 24) & 0xff;
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}
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void set_limit(dword l)
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void set_limit(u32 l)
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{
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limit_lo = (dword)l & 0xffff;
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limit_hi = ((dword)l >> 16) & 0xff;
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limit_lo = (u32)l & 0xffff;
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limit_hi = ((u32)l >> 16) & 0xff;
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}
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};
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@ -89,13 +89,13 @@ class PageDirectoryEntry {
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public:
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PageTableEntry* page_table_base() { return reinterpret_cast<PageTableEntry*>(m_raw & 0xfffff000u); }
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void set_page_table_base(dword value)
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void set_page_table_base(u32 value)
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{
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m_raw &= 0xfff;
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m_raw |= value & 0xfffff000;
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}
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dword raw() const { return m_raw; }
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u32 raw() const { return m_raw; }
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void copy_from(Badge<MemoryManager>, const PageDirectoryEntry& other) { m_raw = other.m_raw; }
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enum Flags {
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@ -121,7 +121,7 @@ public:
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bool is_cache_disabled() const { return raw() & CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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void set_bit(byte bit, bool value)
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void set_bit(u8 bit, bool value)
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{
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if (value)
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m_raw |= bit;
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@ -130,7 +130,7 @@ public:
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}
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private:
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dword m_raw;
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u32 m_raw;
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};
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class PageTableEntry {
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@ -138,13 +138,13 @@ class PageTableEntry {
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public:
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void* physical_page_base() { return reinterpret_cast<void*>(m_raw & 0xfffff000u); }
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void set_physical_page_base(dword value)
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void set_physical_page_base(u32 value)
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{
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m_raw &= 0xfff;
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m_raw |= value & 0xfffff000;
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}
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dword raw() const { return m_raw; }
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u32 raw() const { return m_raw; }
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enum Flags {
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Present = 1 << 0,
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@ -169,7 +169,7 @@ public:
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bool is_cache_disabled() const { return raw() & CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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void set_bit(byte bit, bool value)
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void set_bit(u8 bit, bool value)
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{
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if (value)
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m_raw |= bit;
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@ -178,7 +178,7 @@ public:
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}
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private:
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dword m_raw;
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u32 m_raw;
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};
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static_assert(sizeof(PageDirectoryEntry) == 4);
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@ -189,17 +189,17 @@ class IRQHandler;
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void gdt_init();
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void idt_init();
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void sse_init();
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void register_interrupt_handler(byte number, void (*f)());
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void register_user_callable_interrupt_handler(byte number, void (*f)());
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void register_irq_handler(byte number, IRQHandler&);
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void unregister_irq_handler(byte number, IRQHandler&);
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void register_interrupt_handler(u8 number, void (*f)());
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void register_user_callable_interrupt_handler(u8 number, void (*f)());
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void register_irq_handler(u8 number, IRQHandler&);
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void unregister_irq_handler(u8 number, IRQHandler&);
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void flush_idt();
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void flush_gdt();
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void load_task_register(word selector);
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word gdt_alloc_entry();
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void gdt_free_entry(word);
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Descriptor& get_gdt_entry(word selector);
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void write_gdt_entry(word selector, Descriptor&);
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void load_task_register(u16 selector);
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u16 gdt_alloc_entry();
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void gdt_free_entry(u16);
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Descriptor& get_gdt_entry(u16 selector);
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void write_gdt_entry(u16 selector, Descriptor&);
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[[noreturn]] static inline void hang()
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{
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@ -208,8 +208,8 @@ void write_gdt_entry(word selector, Descriptor&);
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}
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}
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#define LSW(x) ((dword)(x)&0xFFFF)
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#define MSW(x) (((dword)(x) >> 16) & 0xFFFF)
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#define LSW(x) ((u32)(x)&0xFFFF)
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#define MSW(x) (((u32)(x) >> 16) & 0xFFFF)
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#define LSB(x) ((x)&0xFF)
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#define MSB(x) (((x) >> 8) & 0xFF)
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@ -220,17 +220,17 @@ void write_gdt_entry(word selector, Descriptor&);
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#define memory_barrier() asm volatile("" :: \
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: "memory")
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inline dword cpu_cr3()
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inline u32 cpu_cr3()
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{
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dword cr3;
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u32 cr3;
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asm volatile("movl %%cr3, %%eax"
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: "=a"(cr3));
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return cr3;
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}
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inline dword cpu_flags()
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inline u32 cpu_flags()
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{
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dword flags;
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u32 flags;
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asm volatile(
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"pushf\n"
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"pop %0\n"
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@ -259,7 +259,7 @@ public:
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}
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private:
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dword m_flags;
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u32 m_flags;
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};
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class InterruptDisabler {
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|
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@ -277,7 +277,7 @@ public:
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}
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private:
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dword m_flags;
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u32 m_flags;
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};
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/* Map IRQ0-15 @ ISR 0x50-0x5F */
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|
|
@ -297,14 +297,14 @@ struct PageFaultFlags {
|
|||
|
||||
class PageFault {
|
||||
public:
|
||||
PageFault(word code, VirtualAddress vaddr)
|
||||
PageFault(u16 code, VirtualAddress vaddr)
|
||||
: m_code(code)
|
||||
, m_vaddr(vaddr)
|
||||
{
|
||||
}
|
||||
|
||||
VirtualAddress vaddr() const { return m_vaddr; }
|
||||
word code() const { return m_code; }
|
||||
u16 code() const { return m_code; }
|
||||
|
||||
bool is_not_present() const { return (m_code & 1) == PageFaultFlags::NotPresent; }
|
||||
bool is_protection_violation() const { return (m_code & 1) == PageFaultFlags::ProtectionViolation; }
|
||||
|
|
@ -315,86 +315,86 @@ public:
|
|||
bool is_instruction_fetch() const { return (m_code & 8) == PageFaultFlags::InstructionFetch; }
|
||||
|
||||
private:
|
||||
word m_code;
|
||||
u16 m_code;
|
||||
VirtualAddress m_vaddr;
|
||||
};
|
||||
|
||||
struct [[gnu::packed]] RegisterDump
|
||||
{
|
||||
word ss;
|
||||
word gs;
|
||||
word fs;
|
||||
word es;
|
||||
word ds;
|
||||
dword edi;
|
||||
dword esi;
|
||||
dword ebp;
|
||||
dword esp;
|
||||
dword ebx;
|
||||
dword edx;
|
||||
dword ecx;
|
||||
dword eax;
|
||||
dword eip;
|
||||
word cs;
|
||||
word __csPadding;
|
||||
dword eflags;
|
||||
dword esp_if_crossRing;
|
||||
word ss_if_crossRing;
|
||||
u16 ss;
|
||||
u16 gs;
|
||||
u16 fs;
|
||||
u16 es;
|
||||
u16 ds;
|
||||
u32 edi;
|
||||
u32 esi;
|
||||
u32 ebp;
|
||||
u32 esp;
|
||||
u32 ebx;
|
||||
u32 edx;
|
||||
u32 ecx;
|
||||
u32 eax;
|
||||
u32 eip;
|
||||
u16 cs;
|
||||
u16 __csPadding;
|
||||
u32 eflags;
|
||||
u32 esp_if_crossRing;
|
||||
u16 ss_if_crossRing;
|
||||
};
|
||||
|
||||
struct [[gnu::packed]] RegisterDumpWithExceptionCode
|
||||
{
|
||||
word ss;
|
||||
word gs;
|
||||
word fs;
|
||||
word es;
|
||||
word ds;
|
||||
dword edi;
|
||||
dword esi;
|
||||
dword ebp;
|
||||
dword esp;
|
||||
dword ebx;
|
||||
dword edx;
|
||||
dword ecx;
|
||||
dword eax;
|
||||
word exception_code;
|
||||
word __exception_code_padding;
|
||||
dword eip;
|
||||
word cs;
|
||||
word __csPadding;
|
||||
dword eflags;
|
||||
dword esp_if_crossRing;
|
||||
word ss_if_crossRing;
|
||||
u16 ss;
|
||||
u16 gs;
|
||||
u16 fs;
|
||||
u16 es;
|
||||
u16 ds;
|
||||
u32 edi;
|
||||
u32 esi;
|
||||
u32 ebp;
|
||||
u32 esp;
|
||||
u32 ebx;
|
||||
u32 edx;
|
||||
u32 ecx;
|
||||
u32 eax;
|
||||
u16 exception_code;
|
||||
u16 __exception_code_padding;
|
||||
u32 eip;
|
||||
u16 cs;
|
||||
u16 __csPadding;
|
||||
u32 eflags;
|
||||
u32 esp_if_crossRing;
|
||||
u16 ss_if_crossRing;
|
||||
};
|
||||
|
||||
struct [[gnu::aligned(16)]] FPUState
|
||||
{
|
||||
byte buffer[512];
|
||||
u8 buffer[512];
|
||||
};
|
||||
|
||||
inline constexpr dword page_base_of(dword address)
|
||||
inline constexpr u32 page_base_of(u32 address)
|
||||
{
|
||||
return address & 0xfffff000;
|
||||
}
|
||||
|
||||
class CPUID {
|
||||
public:
|
||||
CPUID(dword function) { asm volatile("cpuid"
|
||||
CPUID(u32 function) { asm volatile("cpuid"
|
||||
: "=a"(m_eax), "=b"(m_ebx), "=c"(m_ecx), "=d"(m_edx)
|
||||
: "a"(function), "c"(0)); }
|
||||
dword eax() const { return m_eax; }
|
||||
dword ebx() const { return m_ebx; }
|
||||
dword ecx() const { return m_ecx; }
|
||||
dword edx() const { return m_edx; }
|
||||
u32 eax() const { return m_eax; }
|
||||
u32 ebx() const { return m_ebx; }
|
||||
u32 ecx() const { return m_ecx; }
|
||||
u32 edx() const { return m_edx; }
|
||||
|
||||
private:
|
||||
dword m_eax { 0xffffffff };
|
||||
dword m_ebx { 0xffffffff };
|
||||
dword m_ecx { 0xffffffff };
|
||||
dword m_edx { 0xffffffff };
|
||||
u32 m_eax { 0xffffffff };
|
||||
u32 m_ebx { 0xffffffff };
|
||||
u32 m_ecx { 0xffffffff };
|
||||
u32 m_edx { 0xffffffff };
|
||||
};
|
||||
|
||||
inline void read_tsc(dword& lsw, dword& msw)
|
||||
inline void read_tsc(u32& lsw, u32& msw)
|
||||
{
|
||||
asm volatile("rdtsc"
|
||||
: "=d"(msw), "=a"(lsw));
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue