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Kernel: Add convenience values to the Memory::Region::Access enum
Instead of `Memory::Region::Access::Read | Memory::Region::AccessWrite` you can now say `Memory::Region::Access::ReadWrite`.
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parent
47bdd7c3a0
commit
2cd8b21974
38 changed files with 68 additions and 65 deletions
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@ -126,7 +126,7 @@ AHCI::HBADefinedCapabilities AHCIController::capabilities() const
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NonnullOwnPtr<Memory::Region> AHCIController::default_hba_region() const
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{
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auto region = MM.allocate_kernel_region(PhysicalAddress(PCI::get_BAR5(pci_address())).page_base(), Memory::page_round_up(sizeof(AHCI::HBA)), "AHCI HBA", Memory::Region::Access::Read | Memory::Region::Access::Write);
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auto region = MM.allocate_kernel_region(PhysicalAddress(PCI::get_BAR5(pci_address())).page_base(), Memory::page_round_up(sizeof(AHCI::HBA)), "AHCI HBA", Memory::Region::Access::ReadWrite);
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return region.release_nonnull();
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}
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@ -50,7 +50,7 @@ AHCIPort::AHCIPort(const AHCIPortHandler& handler, volatile AHCI::PortRegisters&
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for (size_t index = 0; index < 1; index++) {
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m_command_table_pages.append(MM.allocate_supervisor_physical_page().release_nonnull());
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}
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m_command_list_region = MM.allocate_kernel_region(m_command_list_page->paddr(), PAGE_SIZE, "AHCI Port Command List", Memory::Region::Access::Read | Memory::Region::Access::Write, Memory::Region::Cacheable::No);
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m_command_list_region = MM.allocate_kernel_region(m_command_list_page->paddr(), PAGE_SIZE, "AHCI Port Command List", Memory::Region::Access::ReadWrite, Memory::Region::Cacheable::No);
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dbgln_if(AHCI_DEBUG, "AHCI Port {}: Command list region at {}", representative_port_index(), m_command_list_region->vaddr());
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}
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@ -159,7 +159,7 @@ void AHCIPort::eject()
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// handshake error bit in PxSERR register if CFL is incorrect.
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command_list_entries[unused_command_header.value()].attributes = (size_t)FIS::DwordCount::RegisterHostToDevice | AHCI::CommandHeaderAttributes::P | AHCI::CommandHeaderAttributes::C | AHCI::CommandHeaderAttributes::A;
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auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Memory::Region::Access::Read | Memory::Region::Access::Write, Memory::Region::Cacheable::No);
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auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Memory::Region::Access::ReadWrite, Memory::Region::Cacheable::No);
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auto& command_table = *(volatile AHCI::CommandTable*)command_table_region->vaddr().as_ptr();
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memset(const_cast<u8*>(command_table.command_fis), 0, 64);
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auto& fis = *(volatile FIS::HostToDevice::Register*)command_table.command_fis;
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@ -526,7 +526,7 @@ bool AHCIPort::access_device(AsyncBlockDeviceRequest::RequestType direction, u64
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dbgln_if(AHCI_DEBUG, "AHCI Port {}: CLE: ctba={:#08x}, ctbau={:#08x}, prdbc={:#08x}, prdtl={:#04x}, attributes={:#04x}", representative_port_index(), (u32)command_list_entries[unused_command_header.value()].ctba, (u32)command_list_entries[unused_command_header.value()].ctbau, (u32)command_list_entries[unused_command_header.value()].prdbc, (u16)command_list_entries[unused_command_header.value()].prdtl, (u16)command_list_entries[unused_command_header.value()].attributes);
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auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Memory::Region::Access::Read | Memory::Region::Access::Write, Memory::Region::Cacheable::No);
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auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Memory::Region::Access::ReadWrite, Memory::Region::Cacheable::No);
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auto& command_table = *(volatile AHCI::CommandTable*)command_table_region->vaddr().as_ptr();
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dbgln_if(AHCI_DEBUG, "AHCI Port {}: Allocated command table at {}", representative_port_index(), command_table_region->vaddr());
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@ -610,7 +610,7 @@ bool AHCIPort::identify_device(ScopedSpinLock<SpinLock<u8>>& main_lock)
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// QEMU doesn't care if we don't set the correct CFL field in this register, real hardware will set an handshake error bit in PxSERR register.
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command_list_entries[unused_command_header.value()].attributes = (size_t)FIS::DwordCount::RegisterHostToDevice | AHCI::CommandHeaderAttributes::P;
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auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Memory::Region::Access::Read | Memory::Region::Access::Write);
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auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)), "AHCI Command Table", Memory::Region::Access::ReadWrite);
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auto& command_table = *(volatile AHCI::CommandTable*)command_table_region->vaddr().as_ptr();
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memset(const_cast<u8*>(command_table.command_fis), 0, 64);
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command_table.descriptors[0].base_high = 0;
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@ -43,8 +43,8 @@ UNMAP_AFTER_INIT void BMIDEChannel::initialize()
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m_dma_buffer_page = MM.allocate_supervisor_physical_page();
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if (m_dma_buffer_page.is_null() || m_prdt_page.is_null())
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return;
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m_prdt_region = MM.allocate_kernel_region(m_prdt_page->paddr(), PAGE_SIZE, "IDE PRDT", Memory::Region::Access::Read | Memory::Region::Access::Write);
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m_dma_buffer_region = MM.allocate_kernel_region(m_dma_buffer_page->paddr(), PAGE_SIZE, "IDE DMA region", Memory::Region::Access::Read | Memory::Region::Access::Write);
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m_prdt_region = MM.allocate_kernel_region(m_prdt_page->paddr(), PAGE_SIZE, "IDE PRDT", Memory::Region::Access::ReadWrite);
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m_dma_buffer_region = MM.allocate_kernel_region(m_dma_buffer_page->paddr(), PAGE_SIZE, "IDE DMA region", Memory::Region::Access::ReadWrite);
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prdt().end_of_table = 0x8000;
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// clear bus master interrupt status
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@ -49,7 +49,7 @@ RamdiskController::RamdiskController()
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for (auto& used_memory_range : MM.used_memory_ranges()) {
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if (used_memory_range.type == Memory::UsedMemoryVirtualRangeType::BootModule) {
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size_t length = Memory::page_round_up(used_memory_range.end.get()) - used_memory_range.start.get();
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auto region = MM.allocate_kernel_region(used_memory_range.start, length, "Ramdisk", Memory::Region::Access::Read | Memory::Region::Access::Write);
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auto region = MM.allocate_kernel_region(used_memory_range.start, length, "Ramdisk", Memory::Region::Access::ReadWrite);
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if (!region)
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dmesgln("RamdiskController: Failed to allocate kernel region of size {}", length);
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else
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