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UserspaceEmulator: Implement the BSF and BSF instructions

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BSF maps nicely to __builtin_ctz(), but for BSR we have to bust out
some inline assembly to get exactly what we want.
This commit is contained in:
Andreas Kling 2020-07-18 16:02:51 +02:00
parent a4b2d6cf1e
commit 30d512144e
1 changed files with 55 additions and 4 deletions
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59
DevTools/UserspaceEmulator/SoftCPU.cpp
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@ -852,10 +852,61 @@ void SoftCPU::AAM(const X86::Instruction&) { TODO(); }
void SoftCPU::AAS(const X86::Instruction&) { TODO(); } void SoftCPU::AAS(const X86::Instruction&) { TODO(); }
void SoftCPU::ARPL(const X86::Instruction&) { TODO(); } void SoftCPU::ARPL(const X86::Instruction&) { TODO(); }
void SoftCPU::BOUND(const X86::Instruction&) { TODO(); } void SoftCPU::BOUND(const X86::Instruction&) { TODO(); }
void SoftCPU::BSF_reg16_RM16(const X86::Instruction&) { }
void SoftCPU::BSF_reg32_RM32(const X86::Instruction&) { } template<typename T>
void SoftCPU::BSR_reg16_RM16(const X86::Instruction&) { } ALWAYS_INLINE static unsigned op_bsf(SoftCPU&, T value)
void SoftCPU::BSR_reg32_RM32(const X86::Instruction&) { } {
return __builtin_ctz(value);
}
template<typename T>
ALWAYS_INLINE static unsigned op_bsr(SoftCPU&, T value)
{
T bit_index = 0;
if constexpr (sizeof(T) == 4) {
asm volatile("bsrl %%eax, %%edx"
: "=d"(bit_index)
: "a"(value));
}
if constexpr (sizeof(T) == 2) {
asm volatile("bsrw %%ax, %%dx"
: "=d"(bit_index)
: "a"(value));
}
return bit_index;
}
void SoftCPU::BSF_reg16_RM16(const X86::Instruction& insn)
{
auto src = insn.modrm().read16(*this, insn);
set_zf(!src);
if (src)
gpr16(insn.reg16()) = op_bsf(*this, src);
}
void SoftCPU::BSF_reg32_RM32(const X86::Instruction& insn)
{
auto src = insn.modrm().read32(*this, insn);
set_zf(!src);
if (src)
gpr32(insn.reg32()) = op_bsf(*this, insn.modrm().read32(*this, insn));
}
void SoftCPU::BSR_reg16_RM16(const X86::Instruction& insn)
{
auto src = insn.modrm().read16(*this, insn);
set_zf(!src);
if (src)
gpr16(insn.reg16()) = op_bsr(*this, insn.modrm().read16(*this, insn));
}
void SoftCPU::BSR_reg32_RM32(const X86::Instruction& insn)
{
auto src = insn.modrm().read32(*this, insn);
set_zf(!src);
if (src)
gpr32(insn.reg32()) = op_bsr(*this, insn.modrm().read32(*this, insn));
}
void SoftCPU::BSWAP_reg32(const X86::Instruction& insn) void SoftCPU::BSWAP_reg32(const X86::Instruction& insn)
{ {