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UserspaceEmulator: Add proper segment registers
Some things will flow better if we're able to index into a table of our segment registers.
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parent
4f41fada39
commit
30ef30ca09
2 changed files with 13 additions and 4 deletions
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@ -36,6 +36,11 @@ SoftCPU::SoftCPU(Emulator& emulator)
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: m_emulator(emulator)
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: m_emulator(emulator)
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{
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{
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memset(m_gpr, 0, sizeof(m_gpr));
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memset(m_gpr, 0, sizeof(m_gpr));
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m_segment[(int)X86::SegmentRegister::CS] = 0x18;
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m_segment[(int)X86::SegmentRegister::DS] = 0x20;
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m_segment[(int)X86::SegmentRegister::ES] = 0x20;
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m_segment[(int)X86::SegmentRegister::SS] = 0x20;
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}
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}
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void SoftCPU::dump() const
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void SoftCPU::dump() const
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@ -56,6 +56,9 @@ public:
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void push32(u32);
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void push32(u32);
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u32 pop32();
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u32 pop32();
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u16 segment(X86::SegmentRegister seg) const { return m_segment[(int)seg]; }
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u16& segment(X86::SegmentRegister seg) { return m_segment[(int)seg]; }
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u32 gpr32(X86::RegisterIndex32 reg) const { return m_gpr[reg].full_u32; }
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u32 gpr32(X86::RegisterIndex32 reg) const { return m_gpr[reg].full_u32; }
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u32& gpr32(X86::RegisterIndex32 reg) { return m_gpr[reg].full_u32; }
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u32& gpr32(X86::RegisterIndex32 reg) { return m_gpr[reg].full_u32; }
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@ -109,10 +112,10 @@ public:
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void set_pf(bool value) { m_pf = value; }
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void set_pf(bool value) { m_pf = value; }
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void set_cf(bool value) { m_cf = value; }
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void set_cf(bool value) { m_cf = value; }
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u16 cs() const { return 0x18; }
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u16 cs() const { return m_segment[(int)X86::SegmentRegister::CS]; }
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u16 ds() const { return 0x20; }
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u16 ds() const { return m_segment[(int)X86::SegmentRegister::DS]; }
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u16 es() const { return 0x20; }
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u16 es() const { return m_segment[(int)X86::SegmentRegister::ES]; }
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u16 ss() const { return 0x20; }
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u16 ss() const { return m_segment[(int)X86::SegmentRegister::SS]; }
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u32 read_memory32(X86::LogicalAddress);
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u32 read_memory32(X86::LogicalAddress);
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void write_memory32(X86::LogicalAddress, u32);
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void write_memory32(X86::LogicalAddress, u32);
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@ -592,6 +595,7 @@ private:
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Emulator& m_emulator;
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Emulator& m_emulator;
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PartAddressableRegister m_gpr[8];
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PartAddressableRegister m_gpr[8];
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u16 m_segment[8] { 0 };
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bool m_of { false };
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bool m_of { false };
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bool m_sf { false };
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bool m_sf { false };
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