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Kernel/riscv64: Add enum for scause CSR

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Sönke Holz 2023-12-29 14:22:34 +01:00 • committed by Andrew Kaster
parent 26752ee8df
commit 3286a05de1
1 changed files with 27 additions and 0 deletions
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27
Kernel/Arch/riscv64/CSR.h
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@ -215,4 +215,31 @@ struct [[gnu::packed]] alignas(u64) SSTATUS {
}; };
static_assert(AssertSize<SSTATUS, 8>()); static_assert(AssertSize<SSTATUS, 8>());
// 4.1.8 Supervisor Cause Register (scause)
constexpr u64 SCAUSE_INTERRUPT_MASK = 1LU << 63;
enum class SCAUSE : u64 {
// Interrupts
SupervisorSoftwareInterrupt = SCAUSE_INTERRUPT_MASK | 1,
SupervisorTimerInterrupt = SCAUSE_INTERRUPT_MASK | 5,
SupervisorExternalInterrupt = SCAUSE_INTERRUPT_MASK | 9,
// Exceptions
InstructionAddressMisaligned = 0,
InstructionAccessFault = 1,
IllegalInstrction = 2,
Breakpoint = 3,
LoadAddressMisaligned = 4,
LoadAccessFault = 5,
StoreOrAMOAddressMisaligned = 6,
StoreOrAMOAccessFault = 7,
EnvironmentCallFromUMode = 8,
EnvironmentCallFromSMode = 9,
InstructionPageFault = 12,
LoadPageFault = 13,
StoreOrAMOPageFault = 15,
};
} }