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https://github.com/RGBCube/serenity
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LibX86: Add SSE support
This only adds the decodeing support for SSE, not SSE2, etc. may contain traces of SSE2.
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5 changed files with 617 additions and 0 deletions
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@ -107,8 +107,35 @@ enum InstructionFormat {
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OP_rm32_mm2,
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OP_mm1_mm2m64,
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OP_mm1_mm2m32,
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OP_mm1_mm2m64_imm8,
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OP_mm1_imm8,
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OP_mm1m64_mm2,
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OP_reg_mm1,
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OP_reg_mm1_imm8,
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OP_mm1_r32m16_imm8,
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// SSE instructions mutate on some prefixes, so we have to mark them
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// for further parsing
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__SSE,
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OP_xmm1_xmm2m32,
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OP_xmm1_xmm2m64,
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OP_xmm1_xmm2m128,
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OP_xmm1_xmm2m32_imm8,
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OP_xmm1_xmm2m128_imm8,
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OP_xmm1m32_xmm2,
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OP_xmm1m64_xmm2,
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OP_xmm1m128_xmm2,
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OP_reg_xmm1,
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OP_reg_xmm1_imm8,
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OP_xmm1_rm32,
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OP_xmm1_m64,
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OP_m64_xmm2,
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OP_rm8_xmm2m32,
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OP_xmm1_mm2m64,
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OP_mm1m64_xmm2,
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OP_mm1_xmm2m64,
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OP_r32_xmm2m32,
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OP_xmm1_r32m16_imm8,
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__EndFormatsWithRMByte,
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OP_reg32_imm32,
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@ -199,6 +226,9 @@ extern InstructionDescriptor s_table16[256];
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extern InstructionDescriptor s_table32[256];
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extern InstructionDescriptor s_0f_table16[256];
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extern InstructionDescriptor s_0f_table32[256];
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extern InstructionDescriptor s_sse_table_np[256];
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extern InstructionDescriptor s_sse_table_66[256];
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extern InstructionDescriptor s_sse_table_f3[256];
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struct Prefix {
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enum Op {
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@ -277,6 +307,17 @@ enum MMXRegisterIndex {
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RegisterMM7
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};
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enum XMMRegisterIndex {
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RegisterXMM0 = 0,
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RegisterXMM1,
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RegisterXMM2,
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RegisterXMM3,
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RegisterXMM4,
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RegisterXMM5,
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RegisterXMM6,
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RegisterXMM7
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};
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class LogicalAddress {
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public:
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LogicalAddress() = default;
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@ -367,6 +408,7 @@ public:
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String to_string_fpu64(const Instruction&) const;
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String to_string_fpu80(const Instruction&) const;
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String to_string_mm(const Instruction&) const;
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String to_string_xmm(const Instruction&) const;
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bool is_register() const { return m_register_index != 0x7f; }
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@ -850,6 +892,18 @@ ALWAYS_INLINE Instruction::Instruction(InstructionStreamType& stream, bool o32,
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m_descriptor = m_o32 ? &s_table32[m_op] : &s_table16[m_op];
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}
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if (m_descriptor->format == __SSE) {
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if (m_rep_prefix == 0xF3) {
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m_descriptor = &s_sse_table_f3[m_sub_op];
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} else if (m_has_operand_size_override_prefix) {
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// This was unset while parsing the prefix initially
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m_o32 = true;
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m_descriptor = &s_sse_table_66[m_sub_op];
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} else {
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m_descriptor = &s_sse_table_np[m_sub_op];
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}
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}
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if (m_descriptor->has_rm) {
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// Consume ModR/M (may include SIB and displacement.)
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m_modrm.decode(stream, m_a32);
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