Kernel: Add a class to wrap aarch64 MIDR_EL1

We'll need part_num() to determine the MMIO address base. It's
0x3F000000 on rpi3 but 0xFE000000 on rpi4.

Kernel/Prekernel/Arch/aarch64/MainIdRegister.cpp

@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2021, Nico Weber <thakis@chromium.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <Kernel/Prekernel/Arch/aarch64/MainIdRegister.h>
+
+namespace Prekernel {
+
+MainIdRegister::MainIdRegister()
+{
+    unsigned int mrs;
+    asm volatile("mrs %x0, MIDR_EL1"
+                 : "=r"(mrs));
+    m_value = mrs;
+}
+
+}

Kernel/Prekernel/Arch/aarch64/MainIdRegister.h

@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2021, Nico Weber <thakis@chromium.org>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#pragma once
+
+namespace Prekernel {
+
+class MainIdRegister {
+public:
+    MainIdRegister();
+
+    enum Implementer {
+        ArmLimited = 0x41,
+    };
+    unsigned implementer() const { return (m_value >> 24) & 0xFF; }
+    unsigned variant() const { return (m_value >> 20) & 0xF; }
+    unsigned architecture() const { return (m_value >> 16) & 0xF; }
+
+    enum PartNum {
+        RaspberryPi1 = 0xB76,
+        RaspberryPi2 = 0xC07,
+        RaspberryPi3 = 0xD03,
+        RaspberryPi4 = 0xD08,
+    };
+    unsigned part_num() const { return (m_value >> 4) & 0xFFF; }
+
+    unsigned revision() const { return m_value & 0xF; }
+
+private:
+    unsigned int m_value;
+};
+
+}

Kernel/Prekernel/Arch/aarch64/init.cpp

@@ -5,10 +5,13 @@
  */
 
 #include <AK/Types.h>
+#include <Kernel/Prekernel/Arch/aarch64/MainIdRegister.h>
 
 extern "C" [[noreturn]] void init();
 extern "C" [[noreturn]] void init()
 {
+    Prekernel::MainIdRegister id;
+    [[maybe_unused]] unsigned part_num = id.part_num();
     for (;;) { }
 }
 

Kernel/Prekernel/CMakeLists.txt

@@ -12,6 +12,7 @@ if ("${SERENITY_ARCH}" STREQUAL "aarch64")
         Arch/aarch64/boot.S
 
         ${SOURCES}
+        Arch/aarch64/MainIdRegister.cpp
         Arch/aarch64/init.cpp
     )
 else()