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Kernel: Flush data cache before passing a buffer to the VC Mailbox
Otherwise, the message's contents might be in the cache only, so VideoCore will read stale/garbage data from main memory. This fixes framebuffer setup on bare metal with the data cache enabled.
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2 changed files with 24 additions and 0 deletions
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@ -125,6 +125,25 @@ inline u64 read_rndrrs()
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return value;
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}
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inline FlatPtr get_cache_line_size()
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{
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FlatPtr ctr_el0;
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asm volatile("mrs %[value], ctr_el0"
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: [value] "=r"(ctr_el0));
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auto log2_size = (ctr_el0 >> 16) & 0xF;
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return 1 << log2_size;
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}
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inline void flush_data_cache(FlatPtr start, size_t size)
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{
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auto const cache_size = get_cache_line_size();
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for (FlatPtr addr = align_down_to(start, cache_size); addr < start + size; addr += cache_size)
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asm volatile("dc civac, %[addr]" ::[addr] "r"(addr)
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: "memory");
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asm volatile("dsb sy" ::
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: "memory");
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}
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}
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namespace Kernel {
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@ -4,6 +4,7 @@
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Arch/aarch64/ASM_wrapper.h>
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#include <Kernel/Arch/aarch64/RPi/MMIO.h>
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#include <Kernel/Arch/aarch64/RPi/Mailbox.h>
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@ -90,6 +91,10 @@ bool Mailbox::send_queue(void* queue, u32 queue_size) const
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// The mailbox message is 32-bit based, so this assumes that message is in the first 4 GiB.
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u32 request = static_cast<u32>(reinterpret_cast<FlatPtr>(queue) & ~0xF) | (channel & 0xF);
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// The queue buffer might point to normal cached memory, so flush any writes that are in cache and not visible to VideoCore.
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Aarch64::Asm::flush_data_cache((FlatPtr)queue, queue_size);
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mmio.write(MBOX_WRITE_DATA, request);
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for (;;) {
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