mirror of
https://github.com/RGBCube/serenity
synced 2025-07-27 01:37:36 +00:00
Everywhere: Add sv suffix to strings relying on StringView(char const*)
Each of these strings would previously rely on StringView's char const* constructor overload, which would call __builtin_strlen on the string. Since we now have operator ""sv, we can replace these with much simpler versions. This opens the door to being able to remove StringView(char const*). No functional changes.
This commit is contained in:
parent
e5f09ea170
commit
3f3f45580a
762 changed files with 8315 additions and 8316 deletions
|
@ -155,7 +155,7 @@ AHCI::HBADefinedCapabilities AHCIController::capabilities() const
|
|||
|
||||
UNMAP_AFTER_INIT NonnullOwnPtr<Memory::Region> AHCIController::default_hba_region() const
|
||||
{
|
||||
return MM.allocate_kernel_region(PhysicalAddress(PCI::get_BAR5(pci_address())).page_base(), Memory::page_round_up(sizeof(AHCI::HBA)).release_value_but_fixme_should_propagate_errors(), "AHCI HBA", Memory::Region::Access::ReadWrite).release_value();
|
||||
return MM.allocate_kernel_region(PhysicalAddress(PCI::get_BAR5(pci_address())).page_base(), Memory::page_round_up(sizeof(AHCI::HBA)).release_value_but_fixme_should_propagate_errors(), "AHCI HBA"sv, Memory::Region::Access::ReadWrite).release_value();
|
||||
}
|
||||
|
||||
AHCIController::~AHCIController() = default;
|
||||
|
|
|
@ -46,7 +46,7 @@ ErrorOr<void> AHCIPort::allocate_resources_and_initialize_ports()
|
|||
m_command_table_pages.append(move(command_table_page));
|
||||
}
|
||||
|
||||
m_command_list_region = TRY(MM.allocate_dma_buffer_page("AHCI Port Command List", Memory::Region::Access::ReadWrite, m_command_list_page));
|
||||
m_command_list_region = TRY(MM.allocate_dma_buffer_page("AHCI Port Command List"sv, Memory::Region::Access::ReadWrite, m_command_list_page));
|
||||
|
||||
dbgln_if(AHCI_DEBUG, "AHCI Port {}: Command list page at {}", representative_port_index(), m_command_list_page->paddr());
|
||||
dbgln_if(AHCI_DEBUG, "AHCI Port {}: FIS receive page at {}", representative_port_index(), m_fis_receive_page->paddr());
|
||||
|
@ -220,7 +220,7 @@ void AHCIPort::eject()
|
|||
// handshake error bit in PxSERR register if CFL is incorrect.
|
||||
command_list_entries[unused_command_header.value()].attributes = (size_t)FIS::DwordCount::RegisterHostToDevice | AHCI::CommandHeaderAttributes::P | AHCI::CommandHeaderAttributes::C | AHCI::CommandHeaderAttributes::A;
|
||||
|
||||
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)).value(), "AHCI Command Table", Memory::Region::Access::ReadWrite, Memory::Region::Cacheable::No).release_value();
|
||||
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)).value(), "AHCI Command Table"sv, Memory::Region::Access::ReadWrite, Memory::Region::Cacheable::No).release_value();
|
||||
auto& command_table = *(volatile AHCI::CommandTable*)command_table_region->vaddr().as_ptr();
|
||||
memset(const_cast<u8*>(command_table.command_fis), 0, 64);
|
||||
auto& fis = *(volatile FIS::HostToDevice::Register*)command_table.command_fis;
|
||||
|
@ -590,7 +590,7 @@ bool AHCIPort::access_device(AsyncBlockDeviceRequest::RequestType direction, u64
|
|||
|
||||
dbgln_if(AHCI_DEBUG, "AHCI Port {}: CLE: ctba={:#08x}, ctbau={:#08x}, prdbc={:#08x}, prdtl={:#04x}, attributes={:#04x}", representative_port_index(), (u32)command_list_entries[unused_command_header.value()].ctba, (u32)command_list_entries[unused_command_header.value()].ctbau, (u32)command_list_entries[unused_command_header.value()].prdbc, (u16)command_list_entries[unused_command_header.value()].prdtl, (u16)command_list_entries[unused_command_header.value()].attributes);
|
||||
|
||||
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)).value(), "AHCI Command Table", Memory::Region::Access::ReadWrite, Memory::Region::Cacheable::No).release_value();
|
||||
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)).value(), "AHCI Command Table"sv, Memory::Region::Access::ReadWrite, Memory::Region::Cacheable::No).release_value();
|
||||
auto& command_table = *(volatile AHCI::CommandTable*)command_table_region->vaddr().as_ptr();
|
||||
|
||||
dbgln_if(AHCI_DEBUG, "AHCI Port {}: Allocated command table at {}", representative_port_index(), command_table_region->vaddr());
|
||||
|
@ -678,7 +678,7 @@ bool AHCIPort::identify_device()
|
|||
// QEMU doesn't care if we don't set the correct CFL field in this register, real hardware will set an handshake error bit in PxSERR register.
|
||||
command_list_entries[unused_command_header.value()].attributes = (size_t)FIS::DwordCount::RegisterHostToDevice | AHCI::CommandHeaderAttributes::P;
|
||||
|
||||
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)).value(), "AHCI Command Table", Memory::Region::Access::ReadWrite).release_value();
|
||||
auto command_table_region = MM.allocate_kernel_region(m_command_table_pages[unused_command_header.value()].paddr().page_base(), Memory::page_round_up(sizeof(AHCI::CommandTable)).value(), "AHCI Command Table"sv, Memory::Region::Access::ReadWrite).release_value();
|
||||
auto& command_table = *(volatile AHCI::CommandTable*)command_table_region->vaddr().as_ptr();
|
||||
memset(const_cast<u8*>(command_table.command_fis), 0, 64);
|
||||
command_table.descriptors[0].base_high = 0;
|
||||
|
|
|
@ -106,7 +106,7 @@ private:
|
|||
EntropySource m_entropy_source;
|
||||
RefPtr<AsyncBlockDeviceRequest> m_current_request;
|
||||
Spinlock m_hard_lock;
|
||||
Mutex m_lock { "AHCIPort" };
|
||||
Mutex m_lock { "AHCIPort"sv };
|
||||
|
||||
mutable bool m_wait_for_completion { false };
|
||||
|
||||
|
|
|
@ -35,7 +35,7 @@ ATADiskDevice::~ATADiskDevice() = default;
|
|||
|
||||
StringView ATADiskDevice::class_name() const
|
||||
{
|
||||
return "ATADiskDevice";
|
||||
return "ATADiskDevice"sv;
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
@ -35,7 +35,7 @@ ATAPIDiscDevice::~ATAPIDiscDevice() = default;
|
|||
|
||||
StringView ATAPIDiscDevice::class_name() const
|
||||
{
|
||||
return "ATAPIDiscDevice";
|
||||
return "ATAPIDiscDevice"sv;
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
@ -40,13 +40,13 @@ UNMAP_AFTER_INIT void BMIDEChannel::initialize()
|
|||
VERIFY(m_io_group.bus_master_base().has_value());
|
||||
// Let's try to set up DMA transfers.
|
||||
{
|
||||
auto region_or_error = MM.allocate_dma_buffer_page("IDE PRDT", Memory::Region::Access::ReadWrite, m_prdt_page);
|
||||
auto region_or_error = MM.allocate_dma_buffer_page("IDE PRDT"sv, Memory::Region::Access::ReadWrite, m_prdt_page);
|
||||
if (region_or_error.is_error())
|
||||
TODO();
|
||||
m_prdt_region = region_or_error.release_value();
|
||||
}
|
||||
{
|
||||
auto region_or_error = MM.allocate_dma_buffer_page("IDE DMA region", Memory::Region::Access::ReadWrite, m_dma_buffer_page);
|
||||
auto region_or_error = MM.allocate_dma_buffer_page("IDE DMA region"sv, Memory::Region::Access::ReadWrite, m_dma_buffer_page);
|
||||
if (region_or_error.is_error())
|
||||
TODO();
|
||||
m_dma_buffer_region = region_or_error.release_value();
|
||||
|
|
|
@ -158,7 +158,7 @@ protected:
|
|||
u64 m_current_request_block_index { 0 };
|
||||
bool m_current_request_flushing_cache { false };
|
||||
Spinlock m_request_lock;
|
||||
Mutex m_lock { "IDEChannel" };
|
||||
Mutex m_lock { "IDEChannel"sv };
|
||||
|
||||
IOAddressGroup m_io_group;
|
||||
NonnullRefPtr<IDEController> m_parent_controller;
|
||||
|
|
|
@ -158,7 +158,7 @@ UNMAP_AFTER_INIT ErrorOr<void> NVMeController::identify_and_init_namespaces()
|
|||
u32 active_namespace_list[NVMe_IDENTIFY_SIZE / sizeof(u32)];
|
||||
|
||||
{
|
||||
auto buffer = TRY(MM.allocate_dma_buffer_page("Identify PRP", Memory::Region::Access::ReadWrite, prp_dma_buffer));
|
||||
auto buffer = TRY(MM.allocate_dma_buffer_page("Identify PRP"sv, Memory::Region::Access::ReadWrite, prp_dma_buffer));
|
||||
prp_dma_region = move(buffer);
|
||||
}
|
||||
|
||||
|
@ -269,7 +269,7 @@ UNMAP_AFTER_INIT ErrorOr<void> NVMeController::create_admin_queue(Optional<u8> i
|
|||
return EFAULT;
|
||||
}
|
||||
{
|
||||
auto buffer = TRY(MM.allocate_dma_buffer_pages(cq_size, "Admin CQ queue", Memory::Region::Access::ReadWrite, cq_dma_pages));
|
||||
auto buffer = TRY(MM.allocate_dma_buffer_pages(cq_size, "Admin CQ queue"sv, Memory::Region::Access::ReadWrite, cq_dma_pages));
|
||||
cq_dma_region = move(buffer);
|
||||
}
|
||||
|
||||
|
@ -278,7 +278,7 @@ UNMAP_AFTER_INIT ErrorOr<void> NVMeController::create_admin_queue(Optional<u8> i
|
|||
memset(cq_dma_region->vaddr().as_ptr(), 0, cq_size);
|
||||
|
||||
{
|
||||
auto buffer = TRY(MM.allocate_dma_buffer_pages(sq_size, "Admin SQ queue", Memory::Region::Access::ReadWrite, sq_dma_pages));
|
||||
auto buffer = TRY(MM.allocate_dma_buffer_pages(sq_size, "Admin SQ queue"sv, Memory::Region::Access::ReadWrite, sq_dma_pages));
|
||||
sq_dma_region = move(buffer);
|
||||
}
|
||||
auto doorbell_regs = TRY(Memory::map_typed_writable<volatile DoorbellRegister>(PhysicalAddress(m_bar + REG_SQ0TDBL_START)));
|
||||
|
@ -307,7 +307,7 @@ UNMAP_AFTER_INIT ErrorOr<void> NVMeController::create_io_queue(u8 qid, Optional<
|
|||
auto sq_size = round_up_to_power_of_two(SQ_SIZE(IO_QUEUE_SIZE), 4096);
|
||||
|
||||
{
|
||||
auto buffer = TRY(MM.allocate_dma_buffer_pages(cq_size, "IO CQ queue", Memory::Region::Access::ReadWrite, cq_dma_pages));
|
||||
auto buffer = TRY(MM.allocate_dma_buffer_pages(cq_size, "IO CQ queue"sv, Memory::Region::Access::ReadWrite, cq_dma_pages));
|
||||
cq_dma_region = move(buffer);
|
||||
}
|
||||
|
||||
|
@ -316,7 +316,7 @@ UNMAP_AFTER_INIT ErrorOr<void> NVMeController::create_io_queue(u8 qid, Optional<
|
|||
memset(cq_dma_region->vaddr().as_ptr(), 0, cq_size);
|
||||
|
||||
{
|
||||
auto buffer = TRY(MM.allocate_dma_buffer_pages(sq_size, "IO SQ queue", Memory::Region::Access::ReadWrite, sq_dma_pages));
|
||||
auto buffer = TRY(MM.allocate_dma_buffer_pages(sq_size, "IO SQ queue"sv, Memory::Region::Access::ReadWrite, sq_dma_pages));
|
||||
sq_dma_region = move(buffer);
|
||||
}
|
||||
|
||||
|
|
|
@ -44,7 +44,7 @@ RamdiskController::RamdiskController()
|
|||
for (auto& used_memory_range : MM.used_memory_ranges()) {
|
||||
if (used_memory_range.type == Memory::UsedMemoryRangeType::BootModule) {
|
||||
size_t length = Memory::page_round_up(used_memory_range.end.get()).release_value_but_fixme_should_propagate_errors() - used_memory_range.start.get();
|
||||
auto region_or_error = MM.allocate_kernel_region(used_memory_range.start, length, "Ramdisk", Memory::Region::Access::ReadWrite);
|
||||
auto region_or_error = MM.allocate_kernel_region(used_memory_range.start, length, "Ramdisk"sv, Memory::Region::Access::ReadWrite);
|
||||
if (region_or_error.is_error()) {
|
||||
dmesgln("RamdiskController: Failed to allocate kernel region of size {}", length);
|
||||
} else {
|
||||
|
|
|
@ -33,7 +33,7 @@ private:
|
|||
// ^StorageDevice
|
||||
virtual CommandSet command_set() const override { return CommandSet::PlainMemory; }
|
||||
|
||||
Mutex m_lock { "RamdiskDevice" };
|
||||
Mutex m_lock { "RamdiskDevice"sv };
|
||||
|
||||
NonnullOwnPtr<Memory::Region> m_region;
|
||||
};
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue