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https://github.com/RGBCube/serenity
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Kernel: Detect Aarch64 physical address bit width with CPU ID registers
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parent
66c65f6e2c
commit
401fc6afae
4 changed files with 32 additions and 2 deletions
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@ -1478,4 +1478,30 @@ NonnullOwnPtr<KString> build_cpu_feature_names(CPUFeature::Type const& features)
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return KString::must_create(builder.string_view());
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return KString::must_create(builder.string_view());
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}
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}
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u8 detect_physical_address_bit_width()
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{
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auto memory_model_feature_register_0 = Aarch64::ID_AA64MMFR0_EL1::read();
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switch (memory_model_feature_register_0.PARange) {
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case 0b0000:
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return 32; // 4GB
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case 0b0001:
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return 36; // 64GB
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case 0b0010:
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return 40; // 1TB
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case 0b0011:
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return 42; // 4TB
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case 0b0100:
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return 44; // 16TB
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case 0b0101:
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return 48; // 256TB
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case 0b0110:
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return 52; // 4PB (applies for FEAT_LPA or FEAT_LPA2)
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case 0b0111:
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return 56; // 64PB (applies for FEAT_D128)
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default:
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VERIFY_NOT_REACHED();
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}
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}
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}
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}
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@ -277,4 +277,6 @@ StringView cpu_feature_to_name(CPUFeature::Type const&);
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StringView cpu_feature_to_description(CPUFeature::Type const&);
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StringView cpu_feature_to_description(CPUFeature::Type const&);
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NonnullOwnPtr<KString> build_cpu_feature_names(CPUFeature::Type const&);
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NonnullOwnPtr<KString> build_cpu_feature_names(CPUFeature::Type const&);
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u8 detect_physical_address_bit_width();
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}
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}
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@ -33,6 +33,7 @@ void Processor::install(u32 cpu)
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VERIFY(g_current_processor == nullptr);
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VERIFY(g_current_processor == nullptr);
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m_cpu = cpu;
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m_cpu = cpu;
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m_features = detect_cpu_features();
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m_features = detect_cpu_features();
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m_physical_address_bit_width = detect_physical_address_bit_width();
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initialize_exceptions(cpu);
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initialize_exceptions(cpu);
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@ -42,6 +43,7 @@ void Processor::install(u32 cpu)
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void Processor::initialize()
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void Processor::initialize()
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{
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{
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dmesgln("CPU[{}]: Supports {}", m_cpu, build_cpu_feature_names(m_features));
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dmesgln("CPU[{}]: Supports {}", m_cpu, build_cpu_feature_names(m_features));
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dmesgln("CPU[{}]: Physical address bit width: {}", m_cpu, m_physical_address_bit_width);
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}
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}
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[[noreturn]] void Processor::halt()
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[[noreturn]] void Processor::halt()
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@ -84,8 +84,7 @@ public:
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ALWAYS_INLINE u8 physical_address_bit_width() const
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ALWAYS_INLINE u8 physical_address_bit_width() const
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{
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{
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TODO_AARCH64();
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return m_physical_address_bit_width;
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return 0;
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}
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}
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ALWAYS_INLINE u8 virtual_address_bit_width() const
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ALWAYS_INLINE u8 virtual_address_bit_width() const
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@ -286,6 +285,7 @@ private:
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u32 m_cpu;
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u32 m_cpu;
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CPUFeature::Type m_features;
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CPUFeature::Type m_features;
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u8 m_physical_address_bit_width;
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Thread* m_current_thread;
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Thread* m_current_thread;
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Thread* m_idle_thread;
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Thread* m_idle_thread;
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