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Kernel/riscv64: Add a Timer class for RISC-V

This is a basic Timer class based on the aarch64 RPi Timer.
It uses the hart-local timer, as defined by the privileged ISA.
This commit is contained in:
Sönke Holz 2023-12-29 14:34:23 +01:00 committed by Andrew Kaster
parent 3286a05de1
commit 4292b0ead7
4 changed files with 158 additions and 2 deletions

View file

@ -14,12 +14,17 @@
namespace Kernel {
enum class HardwareTimerType {
#if ARCH(X86_64)
i8253 = 0x1, /* PIT */
RTC = 0x2, /* Real Time Clock */
HighPrecisionEventTimer = 0x3, /* also known as IA-PC HPET */
LocalAPICTimer = 0x4, /* Local APIC */
#if ARCH(AARCH64)
RPiTimer = 0x5
#elif ARCH(AARCH64)
RPiTimer = 0x5,
#elif ARCH(RISCV64)
RISCVTimer = 0x6,
#else
# error Unknown architecture
#endif
};