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https://github.com/RGBCube/serenity
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UserspaceEmulator: Add helpers for making loop instructions generic
Use them to implement CMPSB/CMPSW/CMPSD.
This commit is contained in:
parent
28b6ba56aa
commit
485d1faf09
2 changed files with 138 additions and 22 deletions
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@ -195,23 +195,9 @@ void SoftCPU::do_once_or_repeat(const X86::Instruction& insn, Callback callback)
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if (!insn.has_rep_prefix())
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return callback();
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if (insn.has_address_size_override_prefix()) {
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while (cx()) {
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callback();
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set_cx(cx() - 1);
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if constexpr (check_zf) {
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if (insn.rep_prefix() == X86::Prefix::REPZ && !zf())
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break;
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if (insn.rep_prefix() == X86::Prefix::REPNZ && zf())
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break;
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}
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}
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return;
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}
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while (ecx()) {
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while (loop_index(insn.a32())) {
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callback();
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set_ecx(ecx() - 1);
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decrement_loop_index(insn.a32());
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if constexpr (check_zf) {
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if (insn.rep_prefix() == X86::Prefix::REPZ && !zf())
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break;
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@ -1057,9 +1043,33 @@ void SoftCPU::CMOVcc_reg32_RM32(const X86::Instruction& insn)
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gpr32(insn.reg32()) = insn.modrm().read32(*this, insn);
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}
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void SoftCPU::CMPSB(const X86::Instruction&) { TODO(); }
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void SoftCPU::CMPSD(const X86::Instruction&) { TODO(); }
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void SoftCPU::CMPSW(const X86::Instruction&) { TODO(); }
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template<typename T>
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ALWAYS_INLINE static void do_cmps(SoftCPU& cpu, const X86::Instruction& insn)
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{
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auto src_segment = cpu.segment(insn.segment_prefix().value_or(X86::SegmentRegister::DS));
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cpu.do_once_or_repeat<true>(insn, [&] {
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auto src = cpu.read_memory<T>({ src_segment, cpu.source_index(insn.a32()) });
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auto dest = cpu.read_memory<T>({ cpu.es(), cpu.destination_index(insn.a32()) });
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op_sub(cpu, dest, src);
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cpu.step_source_index(insn.a32(), sizeof(T));
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cpu.step_destination_index(insn.a32(), sizeof(T));
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});
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}
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void SoftCPU::CMPSB(const X86::Instruction& insn)
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{
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do_cmps<u8>(*this, insn);
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}
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void SoftCPU::CMPSD(const X86::Instruction& insn)
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{
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do_cmps<u32>(*this, insn);
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}
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void SoftCPU::CMPSW(const X86::Instruction& insn)
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{
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do_cmps<u16>(*this, insn);
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}
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void SoftCPU::CMPXCHG_RM16_reg16(const X86::Instruction& insn)
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{
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@ -140,6 +140,90 @@ public:
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u32 gpr32(X86::RegisterIndex32 reg) const { return m_gpr[reg].full_u32; }
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u32& gpr32(X86::RegisterIndex32 reg) { return m_gpr[reg].full_u32; }
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template<typename T>
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T gpr(unsigned register_index) const
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{
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if constexpr (sizeof(T) == 1)
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return gpr8((X86::RegisterIndex8)register_index);
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if constexpr (sizeof(T) == 2)
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return gpr16((X86::RegisterIndex16)register_index);
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if constexpr (sizeof(T) == 4)
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return gpr32((X86::RegisterIndex32)register_index);
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}
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template<typename T>
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T& gpr(unsigned register_index)
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{
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if constexpr (sizeof(T) == 1)
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return gpr8((X86::RegisterIndex8)register_index);
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if constexpr (sizeof(T) == 2)
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return gpr16((X86::RegisterIndex16)register_index);
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if constexpr (sizeof(T) == 4)
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return gpr32((X86::RegisterIndex32)register_index);
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}
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u32 source_index(bool a32) const
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{
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if (a32)
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return esi();
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return si();
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}
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u32 destination_index(bool a32) const
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{
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if (a32)
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return edi();
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return di();
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}
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u32 loop_index(bool a32) const
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{
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if (a32)
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return ecx();
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return cx();
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}
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bool decrement_loop_index(bool a32)
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{
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if (a32) {
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set_ecx(ecx() - 1);
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return ecx() == 0;
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}
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set_cx(cx() - 1);
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return cx() == 0;
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}
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ALWAYS_INLINE void step_source_index(bool a32, u32 step)
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{
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if (a32) {
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if (df())
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set_esi(esi() - step);
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else
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set_esi(esi() + step);
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} else {
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if (df())
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set_si(si() - step);
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else
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set_si(si() + step);
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}
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}
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ALWAYS_INLINE void step_destination_index(bool a32, u32 step)
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{
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if (a32) {
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if (df())
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set_edi(edi() - step);
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else
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set_edi(edi() + step);
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} else {
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if (df())
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set_di(di() - step);
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else
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set_di(di() + step);
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}
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}
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u32 eax() const { return gpr32(X86::RegisterEAX); }
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u32 ebx() const { return gpr32(X86::RegisterEBX); }
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u32 ecx() const { return gpr32(X86::RegisterECX); }
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@ -253,10 +337,32 @@ public:
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u16 read_memory16(X86::LogicalAddress);
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u32 read_memory32(X86::LogicalAddress);
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template<typename T>
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T read_memory(X86::LogicalAddress address)
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{
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if constexpr (sizeof(T) == 1)
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return read_memory8(address);
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if constexpr (sizeof(T) == 2)
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return read_memory16(address);
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if constexpr (sizeof(T) == 4)
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return read_memory32(address);
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}
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void write_memory8(X86::LogicalAddress, u8);
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void write_memory16(X86::LogicalAddress, u16);
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void write_memory32(X86::LogicalAddress, u32);
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template<typename T>
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void write_memory(X86::LogicalAddress address, T data)
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{
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if constexpr (sizeof(T) == 1)
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return write_memory8(address, data);
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if constexpr (sizeof(T) == 2)
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return write_memory16(address, data);
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if constexpr (sizeof(T) == 4)
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return write_memory32(address, data);
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}
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bool evaluate_condition(u8 condition) const
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{
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switch (condition) {
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@ -298,6 +404,9 @@ public:
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return 0;
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}
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template<bool check_zf, typename Callback>
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void do_once_or_repeat(const X86::Instruction& insn, Callback);
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// ^X86::InstructionStream
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virtual bool can_read() override { return false; }
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virtual u8 read8() override;
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@ -818,9 +927,6 @@ private:
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template<typename Op>
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void generic_RM32_CL(Op, const X86::Instruction&);
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template<bool check_zf, typename Callback>
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void do_once_or_repeat(const X86::Instruction& insn, Callback);
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void update_code_cache();
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void did_receive_secret_data();
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