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UserspaceEmulator: Tidy up SoftCPU's general purpose registers
This patch adds a PartAddressableRegister type, which divides a 32-bit value into separate parts needed for the EAX/AX/AL/AH register splits. Clean up the code around register access to make it a little less cumbersome to use.
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3 changed files with 79 additions and 55 deletions
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@ -33,6 +33,21 @@ namespace UserspaceEmulator {
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class Emulator;
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union PartAddressableRegister {
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struct {
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u32 full_u32 { 0 };
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};
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struct {
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u16 low_u16;
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u16 high_u16;
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};
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struct {
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u8 low_u8;
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u8 high_u8;
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u16 also_high_u16;
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};
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};
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class SoftCPU final : public X86::Interpreter {
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public:
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explicit SoftCPU(Emulator&);
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@ -41,13 +56,45 @@ public:
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void push32(u32);
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u32 pop32();
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u32 get_esp() const { return m_esp; }
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void set_esp(u32 value) { m_esp = value; }
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u32 gpr32(X86::RegisterIndex32 reg) const { return m_gpr[reg].full_u32; }
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u32& gpr32(X86::RegisterIndex32 reg) { return m_gpr[reg].full_u32; }
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u16 get_cs() const { return 0x18; }
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u16 get_ds() const { return 0x20; }
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u16 get_es() const { return 0x20; }
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u16 get_ss() const { return 0x20; }
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u32 eax() const { return gpr32(X86::RegisterEAX); }
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u32 ebx() const { return gpr32(X86::RegisterEBX); }
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u32 ecx() const { return gpr32(X86::RegisterECX); }
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u32 edx() const { return gpr32(X86::RegisterEDX); }
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u32 esp() const { return gpr32(X86::RegisterESP); }
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u32 ebp() const { return gpr32(X86::RegisterEBP); }
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u32 esi() const { return gpr32(X86::RegisterESI); }
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u32 edi() const { return gpr32(X86::RegisterEDI); }
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void set_eax(u32 value) { gpr32(X86::RegisterEAX) = value; }
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void set_ebx(u32 value) { gpr32(X86::RegisterEBX) = value; }
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void set_ecx(u32 value) { gpr32(X86::RegisterECX) = value; }
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void set_edx(u32 value) { gpr32(X86::RegisterEDX) = value; }
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void set_ebp(u32 value) { gpr32(X86::RegisterEBP) = value; }
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void set_esp(u32 value) { gpr32(X86::RegisterESP) = value; }
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void set_esi(u32 value) { gpr32(X86::RegisterESI) = value; }
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void set_edi(u32 value) { gpr32(X86::RegisterEDI) = value; }
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bool of() const { return m_of; }
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bool sf() const { return m_sf; }
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bool zf() const { return m_zf; }
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bool af() const { return m_af; }
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bool pf() const { return m_pf; }
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bool cf() const { return m_cf; }
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void set_of(bool value) { m_of = value; }
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void set_sf(bool value) { m_sf = value; }
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void set_zf(bool value) { m_zf = value; }
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void set_af(bool value) { m_af = value; }
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void set_pf(bool value) { m_pf = value; }
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void set_cf(bool value) { m_cf = value; }
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u16 cs() const { return 0x18; }
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u16 ds() const { return 0x20; }
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u16 es() const { return 0x20; }
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u16 ss() const { return 0x20; }
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u32 read_memory32(X86::LogicalAddress);
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void write_memory32(X86::LogicalAddress, u32);
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@ -526,30 +573,7 @@ private:
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private:
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Emulator& m_emulator;
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bool get_of() const { return m_of; }
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bool get_sf() const { return m_sf; }
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bool get_zf() const { return m_zf; }
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bool get_af() const { return m_af; }
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bool get_pf() const { return m_pf; }
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bool get_cf() const { return m_cf; }
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void set_of(bool value) { m_of = value; }
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void set_sf(bool value) { m_sf = value; }
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void set_zf(bool value) { m_zf = value; }
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void set_af(bool value) { m_af = value; }
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void set_pf(bool value) { m_pf = value; }
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void set_cf(bool value) { m_cf = value; }
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u32* m_reg32_table[8];
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u32 m_eax { 0 };
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u32 m_ebx { 0 };
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u32 m_ecx { 0 };
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u32 m_edx { 0 };
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u32 m_esp { 0 };
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u32 m_ebp { 0 };
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u32 m_esi { 0 };
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u32 m_edi { 0 };
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PartAddressableRegister m_gpr[8];
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bool m_of { false };
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bool m_sf { false };
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