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UserspaceEmulator: Tidy up SoftCPU's general purpose registers
This patch adds a PartAddressableRegister type, which divides a 32-bit value into separate parts needed for the EAX/AX/AL/AH register splits. Clean up the code around register access to make it a little less cumbersome to use.
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parent
b02d33bd63
commit
4d8683b632
3 changed files with 79 additions and 55 deletions
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@ -124,7 +124,7 @@ enum MMXRegisterIndex {
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class LogicalAddress {
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public:
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LogicalAddress() {}
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LogicalAddress() { }
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LogicalAddress(u16 selector, u32 offset)
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: m_selector(selector)
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, m_offset(offset)
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@ -200,6 +200,10 @@ public:
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bool is_register() const { return m_register_index != 0xffffffff; }
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unsigned register_index() const { return m_register_index; }
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RegisterIndex32 reg32() const { return static_cast<RegisterIndex32>(register_index()); }
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RegisterIndex16 reg16() const { return static_cast<RegisterIndex16>(register_index()); }
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RegisterIndex8 reg8() const { return static_cast<RegisterIndex8>(register_index()); }
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SegmentRegister segment() const
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{
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ASSERT(!is_register());
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@ -208,7 +212,7 @@ public:
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u32 offset();
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private:
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MemoryOrRegisterReference() {}
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MemoryOrRegisterReference() { }
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String to_string() const;
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String to_string_a16() const;
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@ -245,7 +249,7 @@ typedef void (Interpreter::*InstructionHandler)(const Instruction&);
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class Instruction {
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public:
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static Instruction from_stream(InstructionStream&, bool o32, bool a32);
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~Instruction() {}
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~Instruction() { }
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MemoryOrRegisterReference& modrm() const
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{
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@ -321,6 +325,10 @@ public:
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bool has_sub_op() const { return m_has_sub_op; }
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unsigned register_index() const { return m_register_index; }
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RegisterIndex32 reg32() const { return static_cast<RegisterIndex32>(register_index()); }
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RegisterIndex16 reg16() const { return static_cast<RegisterIndex16>(register_index()); }
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RegisterIndex8 reg8() const { return static_cast<RegisterIndex8>(register_index()); }
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SegmentRegister segment_register() const { return static_cast<SegmentRegister>(register_index()); }
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u8 cc() const { return m_has_sub_op ? m_sub_op & 0xf : m_op & 0xf; }
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