mirror of
https://github.com/RGBCube/serenity
synced 2025-07-24 14:57:35 +00:00
Everywhere: Replace a bundle of dbg with dbgln.
These changes are arbitrarily divided into multiple commits to make it easier to find potentially introduced bugs with git bisect.
This commit is contained in:
parent
019c9eb749
commit
4e8fd0216b
7 changed files with 51 additions and 13 deletions
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@ -57,7 +57,7 @@ void MultiProcessorParser::parse_floating_pointer_data()
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{
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{
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auto floating_pointer = map_typed<MultiProcessor::FloatingPointer>(m_floating_pointer);
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auto floating_pointer = map_typed<MultiProcessor::FloatingPointer>(m_floating_pointer);
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m_configuration_table = PhysicalAddress(floating_pointer->physical_address_ptr);
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m_configuration_table = PhysicalAddress(floating_pointer->physical_address_ptr);
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dbg() << "Features " << floating_pointer->feature_info[0] << ", IMCR? " << (floating_pointer->feature_info[0] & (1 << 7));
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dbgln("Features {}, IMCR? {}", floating_pointer->feature_info[0], (floating_pointer->feature_info[0] & (1 << 7)));
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}
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}
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void MultiProcessorParser::parse_configuration_table()
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void MultiProcessorParser::parse_configuration_table()
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@ -126,7 +126,7 @@ Vector<u8> MultiProcessorParser::get_pci_bus_ids() const
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Vector<PCIInterruptOverrideMetadata> MultiProcessorParser::get_pci_interrupt_redirections()
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Vector<PCIInterruptOverrideMetadata> MultiProcessorParser::get_pci_interrupt_redirections()
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{
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{
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dbg() << "MultiProcessor: Get PCI IOAPIC redirections";
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dbgln("MultiProcessor: Get PCI IOAPIC redirections");
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Vector<PCIInterruptOverrideMetadata> overrides;
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Vector<PCIInterruptOverrideMetadata> overrides;
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auto pci_bus_ids = get_pci_bus_ids();
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auto pci_bus_ids = get_pci_bus_ids();
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for (auto& entry : m_io_interrupt_assignment_entries) {
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for (auto& entry : m_io_interrupt_assignment_entries) {
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@ -150,15 +150,15 @@ void Parser::access_generic_address(const Structures::GenericAddressStructure& s
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switch ((GenericAddressStructure::AddressSpace)structure.address_space) {
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switch ((GenericAddressStructure::AddressSpace)structure.address_space) {
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case GenericAddressStructure::AddressSpace::SystemIO: {
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case GenericAddressStructure::AddressSpace::SystemIO: {
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IOAddress address(structure.address);
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IOAddress address(structure.address);
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dbg() << "ACPI: Sending value 0x" << String::format("%x", value) << " to " << address;
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dbgln("ACPI: Sending value {:x} to {:p}", value, address);
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switch (structure.access_size) {
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switch (structure.access_size) {
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case (u8)GenericAddressStructure::AccessSize::QWord: {
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case (u8)GenericAddressStructure::AccessSize::QWord: {
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dbg() << "Trying to send QWord to IO port";
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dbgln("Trying to send QWord to IO port");
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ASSERT_NOT_REACHED();
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ASSERT_NOT_REACHED();
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break;
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break;
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}
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}
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case (u8)GenericAddressStructure::AccessSize::Undefined: {
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case (u8)GenericAddressStructure::AccessSize::Undefined: {
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dbg() << "ACPI Warning: Unknown access size " << structure.access_size;
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dbgln("ACPI Warning: Unknown access size {}", structure.access_size);
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ASSERT(structure.bit_width != (u8)GenericAddressStructure::BitWidth::QWord);
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ASSERT(structure.bit_width != (u8)GenericAddressStructure::BitWidth::QWord);
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ASSERT(structure.bit_width != (u8)GenericAddressStructure::BitWidth::Undefined);
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ASSERT(structure.bit_width != (u8)GenericAddressStructure::BitWidth::Undefined);
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dbg() << "ACPI: Bit Width - " << structure.bit_width << " bits";
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dbg() << "ACPI: Bit Width - " << structure.bit_width << " bits";
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@ -172,7 +172,7 @@ void Parser::access_generic_address(const Structures::GenericAddressStructure& s
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return;
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return;
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}
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}
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case GenericAddressStructure::AddressSpace::SystemMemory: {
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case GenericAddressStructure::AddressSpace::SystemMemory: {
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dbg() << "ACPI: Sending value 0x" << String::format("%x", value) << " to " << PhysicalAddress(structure.address);
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dbgln("ACPI: Sending value {:x} to {}", value, PhysicalAddress(structure.address));
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switch ((GenericAddressStructure::AccessSize)structure.access_size) {
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switch ((GenericAddressStructure::AccessSize)structure.access_size) {
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case GenericAddressStructure::AccessSize::Byte:
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case GenericAddressStructure::AccessSize::Byte:
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*map_typed<u8>(PhysicalAddress(structure.address)) = value;
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*map_typed<u8>(PhysicalAddress(structure.address)) = value;
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@ -195,10 +195,10 @@ void Parser::access_generic_address(const Structures::GenericAddressStructure& s
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case GenericAddressStructure::AddressSpace::PCIConfigurationSpace: {
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case GenericAddressStructure::AddressSpace::PCIConfigurationSpace: {
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// According to the ACPI specification 6.2, page 168, PCI addresses must be confined to devices on Segment group 0, bus 0.
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// According to the ACPI specification 6.2, page 168, PCI addresses must be confined to devices on Segment group 0, bus 0.
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auto pci_address = PCI::Address(0, 0, ((structure.address >> 24) & 0xFF), ((structure.address >> 16) & 0xFF));
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auto pci_address = PCI::Address(0, 0, ((structure.address >> 24) & 0xFF), ((structure.address >> 16) & 0xFF));
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dbg() << "ACPI: Sending value 0x" << String::format("%x", value) << " to " << pci_address;
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dbgln("ACPI: Sending value {:x} to {}", value, pci_address);
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u32 offset_in_pci_address = structure.address & 0xFFFF;
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u32 offset_in_pci_address = structure.address & 0xFFFF;
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if (structure.access_size == (u8)GenericAddressStructure::AccessSize::QWord) {
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if (structure.access_size == (u8)GenericAddressStructure::AccessSize::QWord) {
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dbg() << "Trying to send QWord to PCI configuration space";
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dbgln("Trying to send QWord to PCI configuration space");
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ASSERT_NOT_REACHED();
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ASSERT_NOT_REACHED();
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}
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}
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ASSERT(structure.access_size != (u8)GenericAddressStructure::AccessSize::Undefined);
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ASSERT(structure.access_size != (u8)GenericAddressStructure::AccessSize::Undefined);
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@ -176,3 +176,11 @@ inline const LogStream& operator<<(const LogStream& stream, IOAddress value)
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{
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{
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return stream << "IO " << String::format("%x", value.get());
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return stream << "IO " << String::format("%x", value.get());
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}
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}
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template<>
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struct AK::Formatter<IOAddress> : AK::Formatter<FormatString> {
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void format(FormatBuilder& builder, IOAddress value)
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{
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return Formatter<FormatString>::format(builder, "IO {:x}", value.get());
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}
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};
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@ -247,3 +247,13 @@ class Device;
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}
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}
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}
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}
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template<>
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struct AK::Formatter<Kernel::PCI::Address> : Formatter<FormatString> {
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void format(FormatBuilder& builder, Kernel::PCI::Address value)
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{
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return Formatter<FormatString>::format(
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builder,
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"PCI [{:04x}:{:02x}:{:02x}:{:02x}]", value.seg(), value.bus(), value.slot(), value.function());
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}
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};
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@ -65,3 +65,11 @@ inline const LogStream& operator<<(const LogStream& stream, PhysicalAddress valu
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{
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{
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return stream << 'P' << value.as_ptr();
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return stream << 'P' << value.as_ptr();
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}
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}
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template<>
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struct AK::Formatter<PhysicalAddress> : AK::Formatter<FormatString> {
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void format(FormatBuilder& builder, PhysicalAddress value)
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{
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return AK::Formatter<FormatString>::format(builder, "P{}", value.as_ptr());
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}
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};
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@ -238,7 +238,7 @@ void Thread::die_if_needed()
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// actual context switch
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// actual context switch
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u32 prev_flags;
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u32 prev_flags;
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Processor::current().clear_critical(prev_flags, false);
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Processor::current().clear_critical(prev_flags, false);
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dbg() << "die_if_needed returned from clear_critical!!! in irq: " << Processor::current().in_irq();
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dbgln("die_if_needed returned from clear_critical!!! in irq: {}", Processor::current().in_irq());
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// We should never get here, but the scoped scheduler lock
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// We should never get here, but the scoped scheduler lock
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// will be released by Scheduler::context_switch again
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// will be released by Scheduler::context_switch again
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ASSERT_NOT_REACHED();
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ASSERT_NOT_REACHED();
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@ -377,7 +377,7 @@ void Thread::finalize()
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}
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}
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if (m_dump_backtrace_on_finalization)
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if (m_dump_backtrace_on_finalization)
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dbg() << backtrace_impl();
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dbgln("{}", backtrace_impl());
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kfree_aligned(m_fpu_state);
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kfree_aligned(m_fpu_state);
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drop_thread_count(false);
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drop_thread_count(false);
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@ -897,7 +897,7 @@ void Thread::set_state(State new_state, u8 stop_signal)
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if (previous_state == Invalid) {
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if (previous_state == Invalid) {
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// If we were *just* created, we may have already pending signals
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// If we were *just* created, we may have already pending signals
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if (has_unmasked_pending_signals()) {
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if (has_unmasked_pending_signals()) {
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dbg() << "Dispatch pending signals to new thread " << *this;
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dbgln("Dispatch pending signals to new thread {}", *this);
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dispatch_one_pending_signal();
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dispatch_one_pending_signal();
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}
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}
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}
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}
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@ -1115,3 +1115,10 @@ bool Thread::should_be_stopped() const
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}
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}
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}
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}
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void AK::Formatter<Kernel::Thread>::format(FormatBuilder& builder, const Kernel::Thread& value)
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{
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return AK::Formatter<FormatString>::format(
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builder,
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"{}({}:{})", value.process().name(), value.pid().value(), value.tid().value());
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}
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@ -822,13 +822,13 @@ public:
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scheduler_lock.lock();
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scheduler_lock.lock();
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ScopedSpinLock block_lock2(m_block_lock);
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ScopedSpinLock block_lock2(m_block_lock);
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if (should_be_stopped() || state() == Stopped) {
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if (should_be_stopped() || state() == Stopped) {
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dbg() << "Thread should be stopped, current state: " << state_string();
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dbgln("Thread should be stopped, current state: {}", state_string());
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set_state(Thread::Blocked);
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set_state(Thread::Blocked);
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continue;
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continue;
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}
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}
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if (m_blocker && !m_blocker->can_be_interrupted() && !m_should_die) {
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if (m_blocker && !m_blocker->can_be_interrupted() && !m_should_die) {
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block_lock2.unlock();
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block_lock2.unlock();
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dbg() << "Thread should not be unblocking, current state: " << state_string();
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dbgln("Thread should not be unblocking, current state: ", state_string());
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set_state(Thread::Blocked);
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set_state(Thread::Blocked);
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continue;
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continue;
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}
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}
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@ -1311,3 +1311,8 @@ inline IterationDecision Scheduler::for_each_nonrunnable(Callback callback)
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}
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}
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}
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}
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template<>
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struct AK::Formatter<Kernel::Thread> : AK::Formatter<FormatString> {
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void format(FormatBuilder&, const Kernel::Thread&);
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};
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