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Kernel: Move Multi Processor Parser code to a separate directory
This commit is contained in:
Liav A
Brian Gianforcaro
parent
682f89d5bc
commit
52e01b46eb
5 changed files with 3 additions and 4 deletions
157
Kernel/Firmware/MultiProcessor/Parser.cpp
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157
Kernel/Firmware/MultiProcessor/Parser.cpp
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/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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* Copyright (c) 2020, Andreas Kling <kling@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/StringView.h>
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#include <Kernel/Debug.h>
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#include <Kernel/Firmware/BIOS.h>
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#include <Kernel/Firmware/MultiProcessor/Parser.h>
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#include <Kernel/Interrupts/IOAPIC.h>
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#include <Kernel/Memory/TypedMapping.h>
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#include <Kernel/Sections.h>
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#include <Kernel/StdLib.h>
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namespace Kernel {
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UNMAP_AFTER_INIT OwnPtr<MultiProcessorParser> MultiProcessorParser::autodetect()
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{
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auto floating_pointer = find_floating_pointer();
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if (!floating_pointer.has_value())
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return {};
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auto parser = adopt_own_if_nonnull(new (nothrow) MultiProcessorParser(floating_pointer.value()));
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VERIFY(parser != nullptr);
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return parser;
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}
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UNMAP_AFTER_INIT MultiProcessorParser::MultiProcessorParser(PhysicalAddress floating_pointer)
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: m_floating_pointer(floating_pointer)
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{
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dbgln("MultiProcessor: Floating Pointer Structure @ {}", m_floating_pointer);
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parse_floating_pointer_data();
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parse_configuration_table();
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}
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UNMAP_AFTER_INIT void MultiProcessorParser::parse_floating_pointer_data()
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{
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auto floating_pointer = Memory::map_typed<MultiProcessor::FloatingPointer>(m_floating_pointer);
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m_configuration_table = PhysicalAddress(floating_pointer->physical_address_ptr);
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dbgln("Features {}, IMCR? {}", floating_pointer->feature_info[0], (floating_pointer->feature_info[0] & (1 << 7)));
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}
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UNMAP_AFTER_INIT void MultiProcessorParser::parse_configuration_table()
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{
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auto configuration_table_length = Memory::map_typed<MultiProcessor::ConfigurationTableHeader>(m_configuration_table)->length;
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auto config_table = Memory::map_typed<MultiProcessor::ConfigurationTableHeader>(m_configuration_table, configuration_table_length);
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size_t entry_count = config_table->entry_count;
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auto* entry = config_table->entries;
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while (entry_count > 0) {
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dbgln_if(MULTIPROCESSOR_DEBUG, "MultiProcessor: Entry Type {} detected.", entry->entry_type);
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switch (entry->entry_type) {
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case ((u8)MultiProcessor::ConfigurationTableEntryType::Processor):
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entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::ProcessorEntry);
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break;
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case ((u8)MultiProcessor::ConfigurationTableEntryType::Bus):
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m_bus_entries.append(*(const MultiProcessor::BusEntry*)entry);
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entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::BusEntry);
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break;
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case ((u8)MultiProcessor::ConfigurationTableEntryType::IOAPIC):
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entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::IOAPICEntry);
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break;
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case ((u8)MultiProcessor::ConfigurationTableEntryType::IO_Interrupt_Assignment):
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m_io_interrupt_assignment_entries.append(*(const MultiProcessor::IOInterruptAssignmentEntry*)entry);
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entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::IOInterruptAssignmentEntry);
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break;
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case ((u8)MultiProcessor::ConfigurationTableEntryType::Local_Interrupt_Assignment):
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entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::LocalInterruptAssignmentEntry);
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break;
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case ((u8)MultiProcessor::ConfigurationTableEntryType::SystemAddressSpaceMapping):
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entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::SystemAddressSpaceMappingEntry);
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break;
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case ((u8)MultiProcessor::ConfigurationTableEntryType::BusHierarchyDescriptor):
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entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::BusHierarchyDescriptorEntry);
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break;
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case ((u8)MultiProcessor::ConfigurationTableEntryType::CompatibilityBusAddressSpaceModifier):
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entry = (MultiProcessor::EntryHeader*)(FlatPtr)entry + sizeof(MultiProcessor::CompatibilityBusAddressSpaceModifierEntry);
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break;
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default:
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VERIFY_NOT_REACHED();
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}
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--entry_count;
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}
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}
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UNMAP_AFTER_INIT Optional<PhysicalAddress> MultiProcessorParser::find_floating_pointer()
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{
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StringView signature("_MP_");
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auto mp_floating_pointer = map_ebda().find_chunk_starting_with(signature, 16);
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if (mp_floating_pointer.has_value())
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return mp_floating_pointer;
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return map_bios().find_chunk_starting_with(signature, 16);
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}
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UNMAP_AFTER_INIT Vector<u8> MultiProcessorParser::get_pci_bus_ids() const
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{
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Vector<u8> pci_bus_ids;
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for (auto& entry : m_bus_entries) {
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if (!strncmp("PCI ", entry.bus_type, strlen("PCI ")))
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pci_bus_ids.append(entry.bus_id);
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}
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return pci_bus_ids;
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}
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UNMAP_AFTER_INIT Vector<PCIInterruptOverrideMetadata> MultiProcessorParser::get_pci_interrupt_redirections()
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{
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dbgln("MultiProcessor: Get PCI IOAPIC redirections");
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Vector<PCIInterruptOverrideMetadata> overrides;
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auto pci_bus_ids = get_pci_bus_ids();
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for (auto& entry : m_io_interrupt_assignment_entries) {
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for (auto id : pci_bus_ids) {
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if (id == entry.source_bus_id) {
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dbgln("Interrupts: Bus {}, polarity {}, trigger mode {}, INT {}, IOAPIC {}, IOAPIC INTIN {}",
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entry.source_bus_id,
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entry.polarity,
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entry.trigger_mode,
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entry.source_bus_irq,
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entry.destination_ioapic_id,
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entry.destination_ioapic_intin_pin);
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overrides.empend(
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entry.source_bus_id,
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entry.polarity,
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entry.trigger_mode,
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entry.source_bus_irq,
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entry.destination_ioapic_id,
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entry.destination_ioapic_intin_pin);
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}
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}
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}
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for (auto& override_metadata : overrides) {
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dbgln("Interrupts: Bus {}, polarity {}, PCI device {}, trigger mode {}, INT {}, IOAPIC {}, IOAPIC INTIN {}",
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override_metadata.bus(),
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override_metadata.polarity(),
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override_metadata.pci_device_number(),
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override_metadata.trigger_mode(),
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override_metadata.pci_interrupt_pin(),
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override_metadata.ioapic_id(),
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override_metadata.ioapic_interrupt_pin());
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}
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return overrides;
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}
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UNMAP_AFTER_INIT PCIInterruptOverrideMetadata::PCIInterruptOverrideMetadata(u8 bus_id, u8 polarity, u8 trigger_mode, u8 source_irq, u32 ioapic_id, u16 ioapic_int_pin)
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: m_bus_id(bus_id)
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, m_polarity(polarity)
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, m_trigger_mode(trigger_mode)
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, m_pci_interrupt_pin(source_irq & 0b11)
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, m_pci_device_number((source_irq >> 2) & 0b11111)
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, m_ioapic_id(ioapic_id)
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, m_ioapic_interrupt_pin(ioapic_int_pin)
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{
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}
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}
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171
Kernel/Firmware/MultiProcessor/Parser.h
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171
Kernel/Firmware/MultiProcessor/Parser.h
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@ -0,0 +1,171 @@
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/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Types.h>
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#include <AK/Vector.h>
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#include <Kernel/Memory/Region.h>
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#include <Kernel/PhysicalAddress.h>
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#include <Kernel/VirtualAddress.h>
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namespace Kernel {
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namespace MultiProcessor {
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struct [[gnu::packed]] FloatingPointer {
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char sig[4];
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u32 physical_address_ptr;
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u8 length;
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u8 specification_revision;
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u8 checksum;
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u8 feature_info[5];
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};
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struct [[gnu::packed]] EntryHeader {
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u8 entry_type;
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};
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struct [[gnu::packed]] ConfigurationTableHeader {
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char sig[4];
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u16 length;
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u8 specification_revision;
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u8 checksum;
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char oem_id[8];
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char product_id[12];
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u32 oem_table_ptr;
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u16 oem_table_size;
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u16 entry_count;
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u32 local_apic_address;
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u16 ext_table_length;
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u8 ext_table_checksum;
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u8 reserved;
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EntryHeader entries[];
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};
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enum class ConfigurationTableEntryType {
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Processor = 0,
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Bus = 1,
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IOAPIC = 2,
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IO_Interrupt_Assignment = 3,
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Local_Interrupt_Assignment = 4,
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SystemAddressSpaceMapping = 128,
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BusHierarchyDescriptor = 129,
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CompatibilityBusAddressSpaceModifier = 130
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};
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struct [[gnu::packed]] ExtEntryHeader {
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u8 entry_type;
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u8 entry_length;
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};
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struct [[gnu::packed]] ProcessorEntry {
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EntryHeader h;
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u8 local_apic_id;
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u8 local_apic_version;
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u8 cpu_flags;
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u32 cpu_signature;
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u32 feature_flags;
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u8 reserved[8];
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};
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struct [[gnu::packed]] BusEntry {
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EntryHeader h;
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u8 bus_id;
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char bus_type[6];
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};
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struct [[gnu::packed]] IOAPICEntry {
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EntryHeader h;
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u8 ioapic_id;
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u8 ioapic_version;
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u8 ioapic_flags;
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u32 ioapic_address;
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};
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enum class InterruptType {
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INT = 0,
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NMI = 1,
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SMI = 2,
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ExtINT = 3,
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};
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struct [[gnu::packed]] IOInterruptAssignmentEntry {
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EntryHeader h;
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u8 interrupt_type;
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u8 polarity;
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u8 trigger_mode;
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u8 source_bus_id;
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u8 source_bus_irq;
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u8 destination_ioapic_id;
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u8 destination_ioapic_intin_pin;
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};
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struct [[gnu::packed]] LocalInterruptAssignmentEntry {
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EntryHeader h;
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u8 interrupt_type;
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u8 polarity;
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u8 trigger_mode;
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u8 source_bus_id;
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u8 source_bus_irq;
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u8 destination_lapic_id;
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u8 destination_lapic_lintin_pin;
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};
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enum class SystemAddressType {
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IO = 0,
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Memory = 1,
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Prefetch = 2,
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};
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struct [[gnu::packed]] SystemAddressSpaceMappingEntry {
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ExtEntryHeader h;
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u8 bus_id;
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u8 address_type;
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u64 address_base;
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u64 length;
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};
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struct [[gnu::packed]] BusHierarchyDescriptorEntry {
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ExtEntryHeader h;
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u8 bus_id;
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u8 bus_info;
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u8 parent_bus;
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u8 reserved[3];
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};
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struct [[gnu::packed]] CompatibilityBusAddressSpaceModifierEntry {
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ExtEntryHeader h;
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u8 bus_id;
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u8 address_modifier;
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u32 predefined_range_list;
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};
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}
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class PCIInterruptOverrideMetadata;
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class MultiProcessorParser final {
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public:
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static OwnPtr<MultiProcessorParser> autodetect();
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Vector<PCIInterruptOverrideMetadata> get_pci_interrupt_redirections();
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private:
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explicit MultiProcessorParser(PhysicalAddress floating_pointer);
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void parse_configuration_table();
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void parse_floating_pointer_data();
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Vector<u8> get_pci_bus_ids() const;
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static Optional<PhysicalAddress> find_floating_pointer();
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PhysicalAddress m_floating_pointer;
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PhysicalAddress m_configuration_table;
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Vector<MultiProcessor::IOInterruptAssignmentEntry> m_io_interrupt_assignment_entries;
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Vector<MultiProcessor::BusEntry> m_bus_entries;
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};
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}
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