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https://github.com/RGBCube/serenity
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LibJIT+LibJS: Consolidate sized immediate assembler operands
This replaces the existing sized immediate operands with a unified immediate operand that leaves the size handling to the assembler, instead of the user. This has 2 benefits: 1. The user doesn't need to know which specific operand size the instruction expects when using it 2. The assembler automatically chooses the minimal operand size that fits the given value, resulting in smaller code size without any additional effort from the user. While the change is small, it still has a noticeable effect on performance (since it increases the I$ hit rate), resulting in 5% speedup on kraken a-star.
This commit is contained in:
Idan Horowitz
Andreas Kling
parent
e4715aa82a
commit
538a570852
2 changed files with 142 additions and 112 deletions
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@ -43,9 +43,7 @@ struct Assembler {
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struct Operand {
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enum class Type {
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Reg,
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Imm8,
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Imm32,
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Imm64,
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Imm,
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Mem64BaseAndOffset,
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};
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@ -62,27 +60,11 @@ struct Assembler {
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return operand;
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}
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static Operand Imm8(u8 imm8)
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static Operand Imm(u64 imm)
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{
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Operand operand;
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operand.type = Type::Imm8;
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operand.offset_or_immediate = imm8;
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return operand;
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}
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static Operand Imm32(u32 imm32)
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{
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Operand operand;
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operand.type = Type::Imm32;
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operand.offset_or_immediate = imm32;
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return operand;
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}
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static Operand Imm64(u64 imm64)
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{
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Operand operand;
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operand.type = Type::Imm64;
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operand.offset_or_immediate = imm64;
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operand.type = Type::Imm;
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operand.offset_or_immediate = imm;
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return operand;
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}
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@ -94,6 +76,27 @@ struct Assembler {
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operand.offset_or_immediate = offset;
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return operand;
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}
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bool fits_in_u8() const
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{
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VERIFY(type == Type::Imm);
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return offset_or_immediate <= NumericLimits<u8>::max();
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}
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bool fits_in_u32() const
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{
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VERIFY(type == Type::Imm);
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return offset_or_immediate <= NumericLimits<u32>::max();
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}
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bool fits_in_i8() const
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{
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VERIFY(type == Type::Imm);
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return (offset_or_immediate <= NumericLimits<i8>::max()) || (((~offset_or_immediate) & NumericLimits<i8>::min()) == 0);
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}
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bool fits_in_i32() const
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{
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VERIFY(type == Type::Imm);
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return (offset_or_immediate <= NumericLimits<i32>::max()) || (((~offset_or_immediate) & NumericLimits<i32>::min()) == 0);
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}
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};
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static constexpr u8 encode_reg(Reg reg)
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@ -104,7 +107,8 @@ struct Assembler {
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void shift_right(Operand dst, Operand count)
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{
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VERIFY(dst.type == Operand::Type::Reg);
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VERIFY(count.type == Operand::Type::Imm8);
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VERIFY(count.type == Operand::Type::Imm);
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VERIFY(count.fits_in_u8());
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0xc1);
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emit8(0xe8 | encode_reg(dst.reg));
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@ -129,13 +133,22 @@ struct Assembler {
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return;
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}
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if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm64) {
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if (patchable == Patchable::No && src.offset_or_immediate == 0) {
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// xor dst, dst
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? (1 << 0 | 1 << 2) : 0));
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emit8(0x31);
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emit8(0xc0 | (encode_reg(dst.reg) << 3) | encode_reg(dst.reg));
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return;
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if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm) {
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if (patchable == Patchable::No) {
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if (src.offset_or_immediate == 0) {
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// xor dst, dst
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? (1 << 0 | 1 << 2) : 0));
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emit8(0x31);
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emit8(0xc0 | (encode_reg(dst.reg) << 3) | encode_reg(dst.reg));
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return;
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}
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if (src.fits_in_u32()) {
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if (dst.reg > Reg::RDI)
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emit8(0x41);
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emit8(0xb8 | encode_reg(dst.reg));
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emit32(src.offset_or_immediate);
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return;
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}
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}
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0xb8 | encode_reg(dst.reg));
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@ -282,7 +295,12 @@ struct Assembler {
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| ((to_underlying(lhs.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x39);
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emit8(0xc0 | (encode_reg(rhs.reg) << 3) | encode_reg(lhs.reg));
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} else if (lhs.type == Operand::Type::Reg && rhs.type == Operand::Type::Imm32) {
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} else if (lhs.type == Operand::Type::Reg && rhs.type == Operand::Type::Imm && rhs.fits_in_i8()) {
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emit8(0x48 | ((to_underlying(lhs.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x83);
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emit8(0xf8 | encode_reg(lhs.reg));
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emit8(rhs.offset_or_immediate);
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} else if (lhs.type == Operand::Type::Reg && rhs.type == Operand::Type::Imm && rhs.fits_in_i32()) {
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emit8(0x48 | ((to_underlying(lhs.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x81);
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emit8(0xf8 | encode_reg(lhs.reg));
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@ -300,7 +318,8 @@ struct Assembler {
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| ((to_underlying(lhs.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x85);
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emit8(0xc0 | (encode_reg(rhs.reg) << 3) | encode_reg(lhs.reg));
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} else if (lhs.type == Operand::Type::Reg && rhs.type == Operand::Type::Imm32) {
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} else if (lhs.type == Operand::Type::Reg && rhs.type == Operand::Type::Imm) {
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VERIFY(rhs.fits_in_i32());
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emit8(0x48 | ((to_underlying(lhs.reg) >= 8) ? 1 << 0 : 0));
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emit8(0xf7);
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emit8(0xc0 | encode_reg(lhs.reg));
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@ -334,7 +353,7 @@ struct Assembler {
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void jump_if_equal(Operand lhs, Operand rhs, Label& label)
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{
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if (rhs.type == Operand::Type::Imm32 && rhs.offset_or_immediate == 0) {
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if (rhs.type == Operand::Type::Imm && rhs.offset_or_immediate == 0) {
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jump_if_zero(lhs, label);
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return;
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}
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@ -350,7 +369,7 @@ struct Assembler {
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void jump_if_not_equal(Operand lhs, Operand rhs, Label& label)
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{
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if (rhs.type == Operand::Type::Imm32 && rhs.offset_or_immediate == 0) {
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if (rhs.type == Operand::Type::Imm && rhs.offset_or_immediate == 0) {
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jump_if_not_zero(lhs, label);
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return;
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}
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@ -392,7 +411,12 @@ struct Assembler {
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| ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x21);
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emit8(0xc0 | (encode_reg(src.reg) << 3) | encode_reg(dst.reg));
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm32) {
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i8()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x83);
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emit8(0xe0 | encode_reg(dst.reg));
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emit8(src.offset_or_immediate);
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i32()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x81);
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emit8(0xe0 | encode_reg(dst.reg));
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@ -411,7 +435,12 @@ struct Assembler {
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| ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x09);
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emit8(0xc0 | (encode_reg(src.reg) << 3) | encode_reg(dst.reg));
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm32) {
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i8()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x83);
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emit8(0xc8 | encode_reg(dst.reg));
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emit8(src.offset_or_immediate);
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i32()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x81);
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emit8(0xc8 | encode_reg(dst.reg));
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@ -427,7 +456,7 @@ struct Assembler {
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push(Operand::Register(Reg::RBP));
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mov(Operand::Register(Reg::RBP), Operand::Register(Reg::RSP));
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sub(Operand::Register(Reg::RSP), Operand::Imm8(8));
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sub(Operand::Register(Reg::RSP), Operand::Imm(8));
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}
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void exit()
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@ -470,7 +499,8 @@ struct Assembler {
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if (to_underlying(op.reg) >= 8)
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emit8(0x49);
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emit8(0x50 | encode_reg(op.reg));
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} else if (op.type == Operand::Type::Imm32) {
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} else if (op.type == Operand::Type::Imm) {
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VERIFY(op.fits_in_i32());
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emit8(0x68);
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emit32(op.offset_or_immediate);
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} else {
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@ -497,16 +527,16 @@ struct Assembler {
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| ((to_underlying(src.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x01);
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emit8(0xc0 | (encode_reg(dst.reg) << 3) | encode_reg(src.reg));
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm32) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x81);
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emit8(0xc0 | encode_reg(dst.reg));
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emit32(src.offset_or_immediate);
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm8) {
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i8()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x83);
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emit8(0xc0 | encode_reg(dst.reg));
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emit8(src.offset_or_immediate);
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i32()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x81);
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emit8(0xc0 | encode_reg(dst.reg));
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emit32(src.offset_or_immediate);
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} else {
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VERIFY_NOT_REACHED();
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}
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@ -520,16 +550,16 @@ struct Assembler {
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| ((to_underlying(src.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x29);
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emit8(0xc0 | (encode_reg(dst.reg) << 3) | encode_reg(src.reg));
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm32) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x81);
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emit8(0xe8 | encode_reg(dst.reg));
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emit32(src.offset_or_immediate);
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm8) {
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i8()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x83);
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emit8(0xe8 | encode_reg(dst.reg));
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emit8(src.offset_or_immediate);
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} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i32()) {
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emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
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emit8(0x81);
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emit8(0xe8 | encode_reg(dst.reg));
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emit32(src.offset_or_immediate);
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} else {
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VERIFY_NOT_REACHED();
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}
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@ -549,17 +579,17 @@ struct Assembler {
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push(Operand::Register(Reg::R11));
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// align the stack to 16-byte boundary
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sub(Operand::Register(Reg::RSP), Operand::Imm8(8));
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sub(Operand::Register(Reg::RSP), Operand::Imm(8));
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// load callee into RAX
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mov(Operand::Register(Reg::RAX), Operand::Imm64(bit_cast<u64>(callee)));
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mov(Operand::Register(Reg::RAX), Operand::Imm(bit_cast<u64>(callee)));
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// call RAX
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emit8(0xff);
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emit8(0xd0);
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// adjust stack pointer
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add(Operand::Register(Reg::RSP), Operand::Imm8(8));
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add(Operand::Register(Reg::RSP), Operand::Imm(8));
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// restore caller-saved registers from the stack
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pop(Operand::Register(Reg::R11));
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