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Kernel: Tighten some typing in Arch/i386/CPU.h

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Use more appropriate types for some things.
This commit is contained in:
Andreas Kling 2021-02-25 10:29:41 +01:00
parent 8706ccfadd
commit 53c6c29158
3 changed files with 49 additions and 47 deletions
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27
Kernel/Arch/i386/CPU.cpp
View file

@ -37,8 +37,6 @@
#include <Kernel/IO.h>
#include <Kernel/Interrupts/APIC.h>
#include <Kernel/Interrupts/GenericInterruptHandler.h>
#include <Kernel/Interrupts/IRQHandler.h>
#include <Kernel/Interrupts/InterruptManagement.h>
#include <Kernel/Interrupts/SharedIRQHandler.h>
#include <Kernel/Interrupts/SpuriousInterruptHandler.h>
#include <Kernel/Interrupts/UnhandledInterruptHandler.h>
@ -46,7 +44,6 @@
#include <Kernel/Panic.h>
#include <Kernel/Process.h>
#include <Kernel/Random.h>
#include <Kernel/SpinLock.h>
#include <Kernel/Thread.h>
#include <Kernel/VM/MemoryManager.h>
#include <Kernel/VM/PageDirectory.h>
@ -454,16 +451,16 @@ void unregister_generic_interrupt_handler(u8 interrupt_number, GenericInterruptH
VERIFY_NOT_REACHED();
}
UNMAP_AFTER_INIT void register_interrupt_handler(u8 index, void (*f)())
UNMAP_AFTER_INIT void register_interrupt_handler(u8 index, void (*handler)())
{
s_idt[index].low = 0x00080000 | LSW((f));
s_idt[index].high = ((u32)(f)&0xffff0000) | 0x8e00;
s_idt[index].low = 0x00080000 | LSW((FlatPtr)(handler));
s_idt[index].high = ((FlatPtr)(handler)&0xffff0000) | 0x8e00;
}
UNMAP_AFTER_INIT void register_user_callable_interrupt_handler(u8 index, void (*f)())
UNMAP_AFTER_INIT void register_user_callable_interrupt_handler(u8 index, void (*handler)())
{
s_idt[index].low = 0x00080000 | LSW((f));
s_idt[index].high = ((u32)(f)&0xffff0000) | 0xef00;
s_idt[index].low = 0x00080000 | LSW(((FlatPtr)handler));
s_idt[index].high = ((FlatPtr)(handler)&0xffff0000) | 0xef00;
}
UNMAP_AFTER_INIT void flush_idt()
@ -1268,7 +1265,7 @@ extern "C" void enter_thread_context(Thread* from_thread, Thread* to_thread)
auto& processor = Processor::current();
auto& tls_descriptor = processor.get_gdt_entry(GDT_SELECTOR_TLS);
tls_descriptor.set_base(to_thread->thread_specific_data().as_ptr());
tls_descriptor.set_base(to_thread->thread_specific_data());
tls_descriptor.set_limit(to_thread->thread_specific_region_size());
if (from_tss.cr3 != to_tss.cr3)
@ -2184,7 +2181,7 @@ UNMAP_AFTER_INIT void Processor::gdt_init()
write_raw_gdt_entry(GDT_SELECTOR_CODE3, 0x0000ffff, 0x00cffa00); // code3
write_raw_gdt_entry(GDT_SELECTOR_DATA3, 0x0000ffff, 0x00cff200); // data3
Descriptor tls_descriptor;
Descriptor tls_descriptor {};
tls_descriptor.low = tls_descriptor.high = 0;
tls_descriptor.dpl = 3;
tls_descriptor.segment_present = 1;
@ -2195,8 +2192,8 @@ UNMAP_AFTER_INIT void Processor::gdt_init()
tls_descriptor.type = 2;
write_gdt_entry(GDT_SELECTOR_TLS, tls_descriptor); // tls3
Descriptor fs_descriptor;
fs_descriptor.set_base(this);
Descriptor fs_descriptor {};
fs_descriptor.set_base(VirtualAddress { this });
fs_descriptor.set_limit(sizeof(Processor));
fs_descriptor.dpl = 0;
fs_descriptor.segment_present = 1;
@ -2207,8 +2204,8 @@ UNMAP_AFTER_INIT void Processor::gdt_init()
fs_descriptor.type = 2;
write_gdt_entry(GDT_SELECTOR_PROC, fs_descriptor); // fs0
Descriptor tss_descriptor;
tss_descriptor.set_base(&m_tss);
Descriptor tss_descriptor {};
tss_descriptor.set_base(VirtualAddress { &m_tss });
tss_descriptor.set_limit(sizeof(TSS32));
tss_descriptor.dpl = 0;
tss_descriptor.segment_present = 1;

63
Kernel/Arch/i386/CPU.h
View file

@ -117,25 +117,25 @@ union [[gnu::packed]] Descriptor {
TrapGate_32bit = 0xf,
};
void* get_base() const
VirtualAddress base() const
{
u32 b = base_lo;
b |= base_hi << 16;
b |= base_hi2 << 24;
return reinterpret_cast<void*>(b);
FlatPtr base = base_lo;
base |= base_hi << 16u;
base |= base_hi2 << 24u;
return VirtualAddress { base };
}
void set_base(void* b)
void set_base(VirtualAddress base)
{
base_lo = (u32)(b)&0xffff;
base_hi = ((u32)(b) >> 16) & 0xff;
base_hi2 = ((u32)(b) >> 24) & 0xff;
base_lo = base.get() & 0xffffu;
base_hi = (base.get() >> 16u) & 0xffu;
base_hi2 = (base.get() >> 24u) & 0xffu;
}
void set_limit(u32 l)
void set_limit(u32 length)
{
limit_lo = (u32)l & 0xffff;
limit_hi = ((u32)l >> 16) & 0xf;
limit_lo = length & 0xffff;
limit_hi = (length >> 16) & 0xf;
}
};
@ -277,8 +277,8 @@ struct RegisterState;
const DescriptorTablePointer& get_gdtr();
const DescriptorTablePointer& get_idtr();
void register_interrupt_handler(u8 number, void (*f)());
void register_user_callable_interrupt_handler(u8 number, void (*f)());
void register_interrupt_handler(u8 number, void (*handler)());
void register_user_callable_interrupt_handler(u8 number, void (*handler)());
GenericInterruptHandler& get_interrupt_handler(u8 interrupt_number);
void register_generic_interrupt_handler(u8 number, GenericInterruptHandler&);
void unregister_generic_interrupt_handler(u8 number, GenericInterruptHandler&);
@ -306,31 +306,31 @@ inline u32 cpu_flags()
return flags;
}
inline void set_fs(u32 segment)
inline void set_fs(u16 segment)
{
asm volatile(
"movl %%eax, %%fs" ::"a"(segment)
"mov %%ax, %%fs" ::"a"(segment)
: "memory");
}
inline void set_gs(u32 segment)
inline void set_gs(u16 segment)
{
asm volatile(
"movl %%eax, %%gs" ::"a"(segment)
"mov %%ax, %%gs" ::"a"(segment)
: "memory");
}
inline u32 get_fs()
inline u16 get_fs()
{
u32 fs;
u16 fs;
asm("mov %%fs, %%eax"
: "=a"(fs));
return fs;
}
inline u32 get_gs()
inline u16 get_gs()
{
u32 gs;
u16 gs;
asm("mov %%gs, %%eax"
: "=a"(gs));
return gs;
@ -346,6 +346,11 @@ inline u32 read_fs_u32(u32 offset)
return val;
}
inline FlatPtr read_fs_ptr(u32 offset)
{
return read_fs_u32(offset);
}
inline void write_fs_u32(u32 offset, u32 val)
{
asm volatile(
@ -502,16 +507,16 @@ u32 read_dr6();
static inline bool is_kernel_mode()
{
u32 cs;
u16 cs;
asm volatile(
"movl %%cs, %[cs] \n"
"mov %%cs, %[cs] \n"
: [cs] "=g"(cs));
return (cs & 3) == 0;
}
class CPUID {
public:
CPUID(u32 function) { asm volatile("cpuid"
explicit CPUID(u32 function) { asm volatile("cpuid"
: "=a"(m_eax), "=b"(m_ebx), "=c"(m_ecx), "=d"(m_edx)
: "a"(function), "c"(0)); }
u32 eax() const { return m_eax; }
@ -768,7 +773,7 @@ public:
ALWAYS_INLINE static Processor& current()
{
return *(Processor*)read_fs_u32(__builtin_offsetof(Processor, m_self));
return *(Processor*)read_fs_ptr(__builtin_offsetof(Processor, m_self));
}
ALWAYS_INLINE static bool is_initialized()
@ -814,7 +819,7 @@ public:
// to another processor, which would lead us to get the wrong thread.
// To avoid having to disable interrupts, we can just read the field
// directly in an atomic fashion, similar to Processor::current.
return (Thread*)read_fs_u32(__builtin_offsetof(Processor, m_current_thread));
return (Thread*)read_fs_ptr(__builtin_offsetof(Processor, m_current_thread));
}
ALWAYS_INLINE static void set_current_thread(Thread& current_thread)
@ -836,7 +841,7 @@ public:
ALWAYS_INLINE static u32 id()
{
// See comment in Processor::current_thread
return read_fs_u32(__builtin_offsetof(Processor, m_cpu));
return read_fs_ptr(__builtin_offsetof(Processor, m_cpu));
}
ALWAYS_INLINE u32 raise_irq()
@ -1066,7 +1071,7 @@ struct TrapFrame {
TrapFrame& operator=(TrapFrame&&) = delete;
};
#define TRAP_FRAME_SIZE (3 * 4)
#define TRAP_FRAME_SIZE (3 * sizeof(FlatPtr))
static_assert(TRAP_FRAME_SIZE == sizeof(TrapFrame));
extern "C" void enter_trap_no_irq(TrapFrame*);

2
Kernel/Syscalls/mmap.cpp
View file

@ -576,7 +576,7 @@ void* Process::sys$allocate_tls(size_t size)
return (void*)-EFAULT;
auto& tls_descriptor = Processor::current().get_gdt_entry(GDT_SELECTOR_TLS);
tls_descriptor.set_base(main_thread->thread_specific_data().as_ptr());
tls_descriptor.set_base(main_thread->thread_specific_data());
tls_descriptor.set_limit(main_thread->thread_specific_region_size());
return m_master_tls_region.unsafe_ptr()->vaddr().as_ptr();