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https://github.com/RGBCube/serenity
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Kernel: Remove debug printing of code segment
This allows us to use the same code for aarch64.
This commit is contained in:
parent
ac788a2c8e
commit
5b06925b8a
2 changed files with 7 additions and 22 deletions
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@ -222,10 +222,10 @@ void Scheduler::pick_next()
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auto& thread_to_schedule = pull_next_runnable_thread();
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auto& thread_to_schedule = pull_next_runnable_thread();
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if constexpr (SCHEDULER_DEBUG) {
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if constexpr (SCHEDULER_DEBUG) {
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dbgln("Scheduler[{}]: Switch to {} @ {:#04x}:{:p}",
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dbgln("Scheduler[{}]: Switch to {} @ {:p}",
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Processor::current_id(),
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Processor::current_id(),
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thread_to_schedule,
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thread_to_schedule,
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thread_to_schedule.regs().cs, thread_to_schedule.regs().ip());
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thread_to_schedule.regs().ip());
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}
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}
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// We need to leave our first critical section before switching context,
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// We need to leave our first critical section before switching context,
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@ -270,11 +270,11 @@ void Scheduler::context_switch(Thread* thread)
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from_thread->set_state(Thread::State::Runnable);
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from_thread->set_state(Thread::State::Runnable);
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#ifdef LOG_EVERY_CONTEXT_SWITCH
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#ifdef LOG_EVERY_CONTEXT_SWITCH
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auto const msg = "Scheduler[{}]: {} -> {} [prio={}] {:#04x}:{:p}";
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auto const msg = "Scheduler[{}]: {} -> {} [prio={}] {:p}";
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dbgln(msg,
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dbgln(msg,
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Processor::current_id(), from_thread->tid().value(),
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Processor::current_id(), from_thread->tid().value(),
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thread->tid().value(), thread->priority(), thread->regs().cs, thread->regs().ip());
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thread->tid().value(), thread->priority(), thread->regs().ip());
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#endif
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#endif
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auto& proc = Processor::current();
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auto& proc = Processor::current();
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@ -507,19 +507,6 @@ void dump_thread_list(bool with_stack_traces)
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{
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{
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dbgln("Scheduler thread list for processor {}:", Processor::current_id());
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dbgln("Scheduler thread list for processor {}:", Processor::current_id());
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auto get_cs = [](Thread& thread) -> u16 {
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#if ARCH(X86_64)
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if (!thread.current_trap())
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return thread.regs().cs;
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return thread.get_register_dump_from_stack().cs;
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#elif ARCH(AARCH64)
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(void)thread;
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return 0;
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#else
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# error Unknown architecture
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#endif
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};
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auto get_eip = [](Thread& thread) -> u32 {
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auto get_eip = [](Thread& thread) -> u32 {
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if (!thread.current_trap())
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if (!thread.current_trap())
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return thread.regs().ip();
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return thread.regs().ip();
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@ -530,20 +517,18 @@ void dump_thread_list(bool with_stack_traces)
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auto color = thread.process().is_kernel_process() ? "\x1b[34;1m"sv : "\x1b[33;1m"sv;
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auto color = thread.process().is_kernel_process() ? "\x1b[34;1m"sv : "\x1b[33;1m"sv;
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switch (thread.state()) {
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switch (thread.state()) {
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case Thread::State::Dying:
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case Thread::State::Dying:
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dmesgln(" {}{:30}\x1b[0m @ {:04x}:{:08x} is {:14} (Finalizable: {}, nsched: {})",
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dmesgln(" {}{:30}\x1b[0m @ {:08x} is {:14} (Finalizable: {}, nsched: {})",
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color,
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color,
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thread,
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thread,
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get_cs(thread),
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get_eip(thread),
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get_eip(thread),
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thread.state_string(),
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thread.state_string(),
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thread.is_finalizable(),
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thread.is_finalizable(),
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thread.times_scheduled());
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thread.times_scheduled());
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break;
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break;
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default:
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default:
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dmesgln(" {}{:30}\x1b[0m @ {:04x}:{:08x} is {:14} (Pr:{:2}, nsched: {})",
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dmesgln(" {}{:30}\x1b[0m @ {:08x} is {:14} (Pr:{:2}, nsched: {})",
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color,
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color,
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thread,
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thread,
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get_cs(thread),
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get_eip(thread),
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get_eip(thread),
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thread.state_string(),
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thread.state_string(),
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thread.priority(),
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thread.priority(),
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@ -1212,7 +1212,7 @@ DispatchSignalResult Thread::dispatch_signal(u8 signal)
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regs.set_flags(2 | (regs.rflags & ~safe_eflags_mask));
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regs.set_flags(2 | (regs.rflags & ~safe_eflags_mask));
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#endif
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#endif
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dbgln_if(SIGNAL_DEBUG, "Thread in state '{}' has been primed with signal handler {:#04x}:{:p} to deliver {}", state_string(), m_regs.cs, m_regs.ip(), signal);
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dbgln_if(SIGNAL_DEBUG, "Thread in state '{}' has been primed with signal handler {:p} to deliver {}", state_string(), m_regs.ip(), signal);
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return DispatchSignalResult::Continue;
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return DispatchSignalResult::Continue;
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}
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}
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