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Kernel: Set the G (global) bit for kernel page tables
Since the kernel page tables are shared between all processes, there's no need to (implicitly) flush the TLB for them on every context switch. Setting the G bit on kernel page tables allows the CPU to keep the translation caches around.
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2 changed files with 19 additions and 2 deletions
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@ -158,6 +158,12 @@ void MemoryManager::initialize_paging()
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dbgprintf("MM: Installing page directory\n");
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#endif
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// Turn on CR4.PGE so the CPU will respect the G bit in page tables.
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asm volatile(
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"mov %cr4, %eax\n"
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"orl $0x10, %eax\n"
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"mov %eax, %cr4\n");
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asm volatile("movl %%eax, %%cr3" ::"a"(kernel_page_directory().cr3()));
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asm volatile(
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"movl %%cr0, %%eax\n"
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@ -187,12 +193,14 @@ PageTableEntry& MemoryManager::ensure_pte(PageDirectory& page_directory, Virtual
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pde.set_user_allowed(false);
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pde.set_present(true);
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pde.set_writable(true);
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pde.set_global(true);
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} else if (page_directory_index == 1) {
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ASSERT(&page_directory == m_kernel_page_directory);
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pde.set_page_table_base((u32)m_page_table_one);
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pde.set_user_allowed(false);
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pde.set_present(true);
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pde.set_writable(true);
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pde.set_global(true);
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} else {
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//ASSERT(&page_directory != m_kernel_page_directory.ptr());
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auto page_table = allocate_supervisor_physical_page();
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@ -210,6 +218,7 @@ PageTableEntry& MemoryManager::ensure_pte(PageDirectory& page_directory, Virtual
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pde.set_user_allowed(true);
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pde.set_present(true);
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pde.set_writable(true);
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pde.set_global(&page_directory == m_kernel_page_directory.ptr());
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page_directory.m_physical_pages.set(page_directory_index, move(page_table));
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}
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}
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