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https://github.com/RGBCube/serenity
synced 2025-07-25 15:07:45 +00:00
Kernel+AudioServer: Use interrupts for Intel HDA audio buffer completion
We used to not care about stopping an audio output stream for Intel HDA since AudioServer would continuously send new buffers to play. Since 707f5ac150ef858760eb9faa52b9ba80c50c4262 however, that has changed. Intel HDA now uses interrupts to detect when each buffer was completed by the device, and uses a simple heuristic to detect whether a buffer underrun has occurred so it can stop the output stream. This was tested on Qemu's Intel HDA (Linux x86_64) and a bare metal MSI Starship/Matisse HD Audio Controller.
This commit is contained in:
parent
2e474e8c18
commit
5c64686666
5 changed files with 120 additions and 25 deletions
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@ -30,14 +30,16 @@ UNMAP_AFTER_INIT ErrorOr<NonnullRefPtr<AudioController>> Controller::create(PCI:
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UNMAP_AFTER_INIT Controller::Controller(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<IOWindow> controller_io_window)
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UNMAP_AFTER_INIT Controller::Controller(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<IOWindow> controller_io_window)
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: PCI::Device(const_cast<PCI::DeviceIdentifier&>(pci_device_identifier))
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: PCI::Device(const_cast<PCI::DeviceIdentifier&>(pci_device_identifier))
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, PCIIRQHandler(*this, device_identifier().interrupt_line().value())
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, m_controller_io_window(move(controller_io_window))
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, m_controller_io_window(move(controller_io_window))
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{
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{
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}
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}
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UNMAP_AFTER_INIT ErrorOr<void> Controller::initialize(Badge<AudioManagement>)
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UNMAP_AFTER_INIT ErrorOr<void> Controller::initialize(Badge<AudioManagement>)
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{
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{
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// Enable DMA
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// Enable DMA and interrupts
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PCI::enable_bus_mastering(device_identifier());
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PCI::enable_bus_mastering(device_identifier());
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enable_irq();
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// 3.3.3, 3.3.4: Controller version
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// 3.3.3, 3.3.4: Controller version
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auto version_minor = m_controller_io_window->read8(ControllerRegister::VersionMinor);
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auto version_minor = m_controller_io_window->read8(ControllerRegister::VersionMinor);
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@ -163,6 +165,13 @@ UNMAP_AFTER_INIT ErrorOr<void> Controller::configure_output_route()
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// Create output path
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// Create output path
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auto output_path = TRY(OutputPath::create(move(path), move(output_stream)));
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auto output_path = TRY(OutputPath::create(move(path), move(output_stream)));
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TRY(output_path->activate());
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TRY(output_path->activate());
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// Enable controller and stream interrupts for this output stream
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auto interrupt_control = m_controller_io_window->read32(ControllerRegister::InterruptControl);
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interrupt_control |= InterruptControlFlag::GlobalInterruptEnable;
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interrupt_control |= 1u << (m_number_of_input_streams + output_stream_index);
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m_controller_io_window->write32(ControllerRegister::InterruptControl, interrupt_control);
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return output_path;
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return output_path;
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};
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};
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@ -290,6 +299,24 @@ ErrorOr<void> Controller::reset()
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return {};
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return {};
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}
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}
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bool Controller::handle_irq(Kernel::RegisterState const&)
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{
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// Check if any interrupt status bit is set
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auto interrupt_status = m_controller_io_window->read32(ControllerRegister::InterruptStatus);
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if ((interrupt_status & InterruptStatusFlag::GlobalInterruptStatus) == 0)
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return false;
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// FIXME: Actually look at interrupt_status and iterate over streams as soon as
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// we support multiple streams.
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if (m_output_path) {
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auto maybe_error = m_output_path->output_stream().handle_interrupt({});
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if (maybe_error.is_error())
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dbgln("IntelHDA: Error during interrupt handling: {}", maybe_error.error());
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}
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return true;
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}
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RefPtr<AudioChannel> Controller::audio_channel(u32 index) const
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RefPtr<AudioChannel> Controller::audio_channel(u32 index) const
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{
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{
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if (index != fixed_audio_channel_index)
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if (index != fixed_audio_channel_index)
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@ -16,6 +16,7 @@
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#include <Kernel/Devices/Audio/Controller.h>
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#include <Kernel/Devices/Audio/Controller.h>
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#include <Kernel/Devices/Audio/IntelHDA/OutputPath.h>
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#include <Kernel/Devices/Audio/IntelHDA/OutputPath.h>
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#include <Kernel/Devices/Audio/IntelHDA/RingBuffer.h>
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#include <Kernel/Devices/Audio/IntelHDA/RingBuffer.h>
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#include <Kernel/Interrupts/PCIIRQHandler.h>
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#include <Kernel/Library/IOWindow.h>
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#include <Kernel/Library/IOWindow.h>
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namespace Kernel::Audio::IntelHDA {
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namespace Kernel::Audio::IntelHDA {
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@ -26,7 +27,8 @@ class Codec;
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class Controller final
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class Controller final
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: public AudioController
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: public AudioController
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, public PCI::Device {
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, public PCI::Device
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, public PCIIRQHandler {
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public:
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public:
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static ErrorOr<bool> probe(PCI::DeviceIdentifier const&);
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static ErrorOr<bool> probe(PCI::DeviceIdentifier const&);
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static ErrorOr<NonnullRefPtr<AudioController>> create(PCI::DeviceIdentifier const&);
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static ErrorOr<NonnullRefPtr<AudioController>> create(PCI::DeviceIdentifier const&);
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@ -35,6 +37,9 @@ public:
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// ^PCI::Device
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// ^PCI::Device
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virtual StringView device_name() const override { return "IntelHDA"sv; }
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virtual StringView device_name() const override { return "IntelHDA"sv; }
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// ^PCIIRQHandler
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virtual StringView purpose() const override { return "IntelHDA IRQ Handler"sv; }
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ErrorOr<u32> send_command(u8 codec_address, u8 node_id, CodecControlVerb verb, u16 payload);
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ErrorOr<u32> send_command(u8 codec_address, u8 node_id, CodecControlVerb verb, u16 payload);
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private:
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private:
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@ -47,6 +52,8 @@ private:
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VersionMajor = 0x03,
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VersionMajor = 0x03,
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GlobalControl = 0x08,
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GlobalControl = 0x08,
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StateChangeStatus = 0x0e,
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StateChangeStatus = 0x0e,
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InterruptControl = 0x20,
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InterruptStatus = 0x24,
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CommandOutboundRingBufferOffset = 0x40,
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CommandOutboundRingBufferOffset = 0x40,
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ResponseInboundRingBufferOffset = 0x50,
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ResponseInboundRingBufferOffset = 0x50,
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StreamsOffset = 0x80,
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StreamsOffset = 0x80,
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@ -58,12 +65,25 @@ private:
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AcceptUnsolicitedResponseEnable = 1u << 8,
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AcceptUnsolicitedResponseEnable = 1u << 8,
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};
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};
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// 3.3.14: INTCTL – Interrupt Control
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enum InterruptControlFlag : u32 {
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GlobalInterruptEnable = 1u << 31,
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};
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// 3.3.15: INTSTS – Interrupt Status
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enum InterruptStatusFlag : u32 {
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GlobalInterruptStatus = 1u << 31,
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};
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Controller(PCI::DeviceIdentifier const&, NonnullOwnPtr<IOWindow>);
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Controller(PCI::DeviceIdentifier const&, NonnullOwnPtr<IOWindow>);
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ErrorOr<void> initialize_codec(u8 codec_address);
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ErrorOr<void> initialize_codec(u8 codec_address);
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ErrorOr<void> configure_output_route();
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ErrorOr<void> configure_output_route();
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ErrorOr<void> reset();
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ErrorOr<void> reset();
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// ^PCIIRQHandler
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virtual bool handle_irq(RegisterState const&) override;
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// ^AudioController
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// ^AudioController
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virtual RefPtr<AudioChannel> audio_channel(u32 index) const override;
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virtual RefPtr<AudioChannel> audio_channel(u32 index) const override;
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virtual ErrorOr<size_t> write(size_t channel_index, UserOrKernelBuffer const& data, size_t length) override;
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virtual ErrorOr<size_t> write(size_t channel_index, UserOrKernelBuffer const& data, size_t length) override;
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@ -73,7 +73,6 @@ ErrorOr<void> Stream::initialize_buffer()
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m_stream_io_window->write32(StreamRegisterOffset::CyclicBufferLength, buffers->size());
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m_stream_io_window->write32(StreamRegisterOffset::CyclicBufferLength, buffers->size());
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// 3.3.39: Input/Output/Bidirectional Stream Descriptor Last Valid Index
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// 3.3.39: Input/Output/Bidirectional Stream Descriptor Last Valid Index
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VERIFY(number_of_buffers_required_for_cyclic_buffer_size <= 256);
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m_stream_io_window->write16(StreamRegisterOffset::LastValidIndex, number_of_buffers_required_for_cyclic_buffer_size - 1);
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m_stream_io_window->write16(StreamRegisterOffset::LastValidIndex, number_of_buffers_required_for_cyclic_buffer_size - 1);
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// 3.6.2: Buffer Descriptor List
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// 3.6.2: Buffer Descriptor List
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@ -83,12 +82,12 @@ ErrorOr<void> Stream::initialize_buffer()
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m_stream_io_window->write32(StreamRegisterOffset::BDLUpperBaseAddress, bdl_physical_address >> 32);
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m_stream_io_window->write32(StreamRegisterOffset::BDLUpperBaseAddress, bdl_physical_address >> 32);
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// 3.6.3: Buffer Descriptor List Entry
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// 3.6.3: Buffer Descriptor List Entry
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auto* buffer_descriptor_entry = m_buffer_descriptor_list->vaddr().as_ptr();
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auto* buffer_descriptors = bit_cast<BufferDescriptorEntry*>(m_buffer_descriptor_list->vaddr().as_ptr());
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for (u8 buffer_index = 0; buffer_index < buffers->page_count(); ++buffer_index) {
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for (size_t buffer_index = 0; buffer_index < buffers->page_count(); ++buffer_index) {
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auto* entry = buffer_descriptor_entry + buffer_index * 0x10;
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auto* entry = &buffer_descriptors[buffer_index];
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*bit_cast<u64*>(entry) = buffers->physical_page(buffer_index)->paddr().get();
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entry->address = buffers->physical_page(buffer_index)->paddr().get();
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*bit_cast<u32*>(entry + 8) = PAGE_SIZE;
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entry->size = PAGE_SIZE;
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*bit_cast<u32*>(entry + 12) = 0;
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entry->flags = BufferDescriptorEntryFlag::InterruptOnCompletion;
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}
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}
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return {};
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return {};
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}));
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}));
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@ -135,6 +134,7 @@ void Stream::start()
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auto control = read_control();
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auto control = read_control();
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control |= StreamControlFlag::StreamRun;
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control |= StreamControlFlag::StreamRun;
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control |= StreamControlFlag::InterruptOnCompletionEnable;
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write_control(control);
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write_control(control);
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m_running = true;
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m_running = true;
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}
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}
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@ -176,23 +176,45 @@ ErrorOr<void> Stream::set_format(FormatParameters format)
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return {};
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return {};
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}
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}
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ErrorOr<void> OutputStream::handle_interrupt(Badge<Controller>)
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{
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auto interrupt_status = m_stream_io_window->read8(StreamRegisterOffset::Status);
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if ((interrupt_status & StreamStatusFlag::BufferCompletionInterruptStatus) > 0) {
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// 3.3.36: BCIS remains active until software clears it by writing a 1 to this bit position.
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m_stream_io_window->write8(StreamRegisterOffset::Status, interrupt_status);
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// Wake up thread waiting for new buffers to write to
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m_irq_queue.wake_all();
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// If the read head is past our last written buffer, stop the stream. There are three possible
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// condition combinations of last & new link, and current buffer position for our circular buffer.
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auto new_link_position = m_stream_io_window->read32(StreamRegisterOffset::LinkPosition);
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if ((m_last_link_position < m_buffer_position && m_buffer_position < new_link_position)
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|| (new_link_position < m_last_link_position && m_last_link_position < m_buffer_position)
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|| (m_buffer_position < new_link_position && new_link_position < m_last_link_position)) {
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dbgln_if(INTEL_HDA_DEBUG, "OutputStream::{}: Stopping because of stream underrun (link position: {} → {}, buffer position: {})",
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__FUNCTION__, m_last_link_position, new_link_position, m_buffer_position);
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TRY(stop());
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}
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m_last_link_position = new_link_position;
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}
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return {};
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}
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ErrorOr<size_t> OutputStream::write(UserOrKernelBuffer const& data, size_t length)
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ErrorOr<size_t> OutputStream::write(UserOrKernelBuffer const& data, size_t length)
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{
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{
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auto wait_until_buffer_index_can_be_written = [&](u8 buffer_index) {
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auto wait_until_buffer_index_can_be_written = [&](u8 buffer_index) {
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while (m_running) {
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while (m_running) {
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auto link_position = m_stream_io_window->read32(StreamRegisterOffset::LinkPosition);
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m_last_link_position = m_stream_io_window->read32(StreamRegisterOffset::LinkPosition);
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auto read_buffer_index = link_position / PAGE_SIZE;
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auto read_buffer_index = m_last_link_position / PAGE_SIZE;
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if (read_buffer_index != buffer_index)
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if (read_buffer_index != buffer_index)
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return;
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return;
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auto microseconds_to_wait = ((read_buffer_index + 1) * PAGE_SIZE - link_position)
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dbgln_if(INTEL_HDA_DEBUG, "IntelHDA: Waiting until buffer {} becomes writeable", buffer_index);
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/ m_format_parameters.number_of_channels
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* 8 / m_format_parameters.pcm_bits
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* 1'000'000 / m_format_parameters.sample_rate;
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dbgln_if(INTEL_HDA_DEBUG, "IntelHDA: Waiting {} µs until buffer {} becomes writeable", microseconds_to_wait, buffer_index);
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// NOTE: we don't care about the reason for interruption - we simply calculate the next delay
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m_irq_queue.wait_forever("IntelHDA"sv);
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[[maybe_unused]] auto block_result = Thread::current()->sleep(Duration::from_microseconds(microseconds_to_wait));
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}
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}
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};
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};
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wait_until_buffer_index_can_be_written(buffer_index);
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wait_until_buffer_index_can_be_written(buffer_index);
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TRY(m_buffers.with([&](auto& buffers) -> ErrorOr<void> {
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TRY(m_buffers.with([&](auto& buffers) -> ErrorOr<void> {
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// NOTE: if the buffers were reinitialized, we might point to an out of bounds page
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// NOTE: if the buffers were reinitialized, we might point to an out-of-bounds page
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if (buffer_index >= buffers->page_count())
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if (buffer_index >= buffers->page_count())
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return EAGAIN;
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return EAGAIN;
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#pragma once
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#pragma once
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#include <AK/Badge.h>
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#include <AK/Error.h>
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#include <AK/Error.h>
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#include <AK/NonnullOwnPtr.h>
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#include <AK/NonnullOwnPtr.h>
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#include <AK/OwnPtr.h>
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#include <AK/OwnPtr.h>
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#include <Kernel/Devices/Audio/IntelHDA/Format.h>
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#include <Kernel/Devices/Audio/IntelHDA/Format.h>
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#include <Kernel/Library/IOWindow.h>
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#include <Kernel/Library/IOWindow.h>
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#include <Kernel/Locking/SpinlockProtected.h>
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#include <Kernel/Locking/SpinlockProtected.h>
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#include <Kernel/Tasks/WaitQueue.h>
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namespace Kernel::Audio::IntelHDA {
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namespace Kernel::Audio::IntelHDA {
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public:
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public:
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static constexpr u32 cyclic_buffer_size_in_ms = 40;
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static constexpr u32 cyclic_buffer_size_in_ms = 40;
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virtual ~Stream();
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u8 stream_number() const { return m_stream_number; }
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u8 stream_number() const { return m_stream_number; }
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bool running() const { return m_running; }
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bool running() const { return m_running; }
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u32 sample_rate() const { return m_format_parameters.sample_rate; }
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u32 sample_rate() const { return m_format_parameters.sample_rate; }
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void start();
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void start();
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ErrorOr<void> stop();
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ErrorOr<void> stop();
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virtual ErrorOr<void> handle_interrupt(Badge<Controller>) = 0;
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ErrorOr<void> set_format(FormatParameters);
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ErrorOr<void> set_format(FormatParameters);
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enum StreamControlFlag : u32 {
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enum StreamControlFlag : u32 {
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StreamReset = 1u << 0,
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StreamReset = 1u << 0,
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StreamRun = 1u << 1,
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StreamRun = 1u << 1,
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InterruptOnCompletionEnable = 1u << 2,
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};
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// 3.3.36 : Input/Output/Bidirectional Stream Descriptor Status
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enum StreamStatusFlag : u8 {
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BufferCompletionInterruptStatus = 1u << 2,
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};
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// 3.6.3: Buffer Descriptor List Entry
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enum BufferDescriptorEntryFlag : u32 {
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InterruptOnCompletion = 1u << 0,
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};
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// 3.6.3: Buffer Descriptor List Entry
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struct BufferDescriptorEntry {
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u64 address;
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u32 size;
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BufferDescriptorEntryFlag flags;
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};
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};
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Stream(NonnullOwnPtr<IOWindow> stream_io_window, u8 stream_number)
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Stream(NonnullOwnPtr<IOWindow> stream_io_window, u8 stream_number)
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{
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{
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}
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}
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~Stream();
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u32 read_control();
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u32 read_control();
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void write_control(u32);
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void write_control(u32);
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OwnPtr<Memory::Region> m_buffer_descriptor_list;
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OwnPtr<Memory::Region> m_buffer_descriptor_list;
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SpinlockProtected<OwnPtr<Memory::Region>, LockRank::None> m_buffers;
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SpinlockProtected<OwnPtr<Memory::Region>, LockRank::None> m_buffers;
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size_t m_buffer_position { 0 };
|
size_t m_buffer_position { 0 };
|
||||||
|
WaitQueue m_irq_queue;
|
||||||
bool m_running { false };
|
bool m_running { false };
|
||||||
FormatParameters m_format_parameters;
|
FormatParameters m_format_parameters;
|
||||||
};
|
};
|
||||||
|
@ -83,6 +105,11 @@ public:
|
||||||
return adopt_nonnull_own_or_enomem(new (nothrow) OutputStream(move(stream_io_window), stream_number));
|
return adopt_nonnull_own_or_enomem(new (nothrow) OutputStream(move(stream_io_window), stream_number));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
~OutputStream() = default;
|
||||||
|
|
||||||
|
// ^Stream
|
||||||
|
ErrorOr<void> handle_interrupt(Badge<Controller>) override;
|
||||||
|
|
||||||
ErrorOr<size_t> write(UserOrKernelBuffer const&, size_t);
|
ErrorOr<size_t> write(UserOrKernelBuffer const&, size_t);
|
||||||
|
|
||||||
private:
|
private:
|
||||||
|
@ -96,6 +123,8 @@ private:
|
||||||
// not intended for them."
|
// not intended for them."
|
||||||
VERIFY(stream_number >= 1);
|
VERIFY(stream_number >= 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
u32 m_last_link_position { 0 };
|
||||||
};
|
};
|
||||||
|
|
||||||
// FIXME: implement InputStream and BidirectionalStream
|
// FIXME: implement InputStream and BidirectionalStream
|
||||||
|
|
|
@ -58,10 +58,7 @@ void Mixer::mix()
|
||||||
{
|
{
|
||||||
Threading::MutexLocker const locker(m_pending_mutex);
|
Threading::MutexLocker const locker(m_pending_mutex);
|
||||||
// While we have nothing to mix, wait on the condition.
|
// While we have nothing to mix, wait on the condition.
|
||||||
// HACK: HDA is currently broken when we don't constantly feed it a buffer stream.
|
m_mixing_necessary.wait_while([this, &active_mix_queues]() { return m_pending_mixing.is_empty() && active_mix_queues.is_empty(); });
|
||||||
// Commenting out this line makes it "just work" for the time being. Please add this line back once the issue is fixed.
|
|
||||||
// See:
|
|
||||||
// m_mixing_necessary.wait_while([this, &active_mix_queues]() { return m_pending_mixing.is_empty() && active_mix_queues.is_empty(); });
|
|
||||||
if (!m_pending_mixing.is_empty()) {
|
if (!m_pending_mixing.is_empty()) {
|
||||||
active_mix_queues.extend(move(m_pending_mixing));
|
active_mix_queues.extend(move(m_pending_mixing));
|
||||||
m_pending_mixing.clear();
|
m_pending_mixing.clear();
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue