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Everywhere: Rename ASSERT => VERIFY

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(...and ASSERT_NOT_REACHED => VERIFY_NOT_REACHED)

Since all of these checks are done in release builds as well,
let's rename them to VERIFY to prevent confusion, as everyone is
used to assertions being compiled out in release.

We can introduce a new ASSERT macro that is specifically for debug
checks, but I'm doing this wholesale conversion first since we've
accumulated thousands of these already, and it's not immediately
obvious which ones are suitable for ASSERT.
This commit is contained in:
Andreas Kling 2021-02-23 20:42:32 +01:00
parent b33a6a443e
commit 5d180d1f99
725 changed files with 3448 additions and 3448 deletions
Download patch file Download diff file Expand all files Collapse all files

18
Userland/Libraries/LibX86/Instruction.cpp
View file

@ -195,7 +195,7 @@ static void build(InstructionDescriptor* table, u8 op, const char* mnemonic, Ins
static void build_slash(InstructionDescriptor* table, u8 op, u8 slash, const char* mnemonic, InstructionFormat format, InstructionHandler handler, IsLockPrefixAllowed lock_prefix_allowed = LockPrefixNotAllowed)
{
InstructionDescriptor& d = table[op];
ASSERT(d.handler == nullptr);
VERIFY(d.handler == nullptr);
d.format = MultibyteWithSlash;
d.has_rm = true;
if (!d.slashes)
@ -206,11 +206,11 @@ static void build_slash(InstructionDescriptor* table, u8 op, u8 slash, const cha
static void build_slash_rm(InstructionDescriptor* table, u8 op, u8 slash, u8 rm, const char* mnemonic, InstructionFormat format, InstructionHandler handler)
{
ASSERT((rm & 0xc0) == 0xc0);
ASSERT(((rm >> 3) & 7) == slash);
VERIFY((rm & 0xc0) == 0xc0);
VERIFY(((rm >> 3) & 7) == slash);
InstructionDescriptor& d0 = table[op];
ASSERT(d0.format == MultibyteWithSlash);
VERIFY(d0.format == MultibyteWithSlash);
InstructionDescriptor& d = d0.slashes[slash];
if (!d.slashes) {
@ -937,19 +937,19 @@ String MemoryOrRegisterReference::to_string_o32(const Instruction& insn) const
String MemoryOrRegisterReference::to_string_fpu_reg() const
{
ASSERT(is_register());
VERIFY(is_register());
return register_name(reg_fpu());
}
String MemoryOrRegisterReference::to_string_fpu_mem(const Instruction& insn) const
{
ASSERT(!is_register());
VERIFY(!is_register());
return String::format("[%s]", to_string(insn).characters());
}
String MemoryOrRegisterReference::to_string_fpu_ax16() const
{
ASSERT(is_register());
VERIFY(is_register());
return register_name(reg16());
}
@ -976,7 +976,7 @@ String MemoryOrRegisterReference::to_string_fpu64(const Instruction& insn) const
String MemoryOrRegisterReference::to_string_fpu80(const Instruction& insn) const
{
ASSERT(!is_register());
VERIFY(!is_register());
return String::format("tbyte ptr [%s]", to_string(insn).characters());
}
String MemoryOrRegisterReference::to_string_mm(const Instruction& insn) const
@ -1824,7 +1824,7 @@ void Instruction::to_string_internal(StringBuilder& builder, u32 origin, const S
String Instruction::mnemonic() const
{
if (!m_descriptor) {
ASSERT_NOT_REACHED();
VERIFY_NOT_REACHED();
}
return m_descriptor->mnemonic;
}

18
Userland/Libraries/LibX86/Instruction.h
View file

@ -641,7 +641,7 @@ ALWAYS_INLINE u32 MemoryOrRegisterReference::evaluate_sib(const CPU& cpu, Segmen
base += cpu.ebp().value();
break;
default:
ASSERT_NOT_REACHED();
VERIFY_NOT_REACHED();
break;
}
break;
@ -689,7 +689,7 @@ ALWAYS_INLINE void MemoryOrRegisterReference::write32(CPU& cpu, const Instructio
template<typename CPU, typename T>
ALWAYS_INLINE void MemoryOrRegisterReference::write64(CPU& cpu, const Instruction& insn, T value)
{
ASSERT(!is_register());
VERIFY(!is_register());
auto address = resolve(cpu, insn);
cpu.write_memory64(address, value);
}
@ -727,7 +727,7 @@ ALWAYS_INLINE typename CPU::ValueWithShadowType32 MemoryOrRegisterReference::rea
template<typename CPU>
ALWAYS_INLINE typename CPU::ValueWithShadowType64 MemoryOrRegisterReference::read64(CPU& cpu, const Instruction& insn)
{
ASSERT(!is_register());
VERIFY(!is_register());
auto address = resolve(cpu, insn);
return cpu.read_memory64(address);
}
@ -864,7 +864,7 @@ ALWAYS_INLINE Instruction::Instruction(InstructionStreamType& stream, bool o32,
m_imm2 = stream.read32();
break;
default:
ASSERT(imm2_bytes == 0);
VERIFY(imm2_bytes == 0);
break;
}
@ -879,7 +879,7 @@ ALWAYS_INLINE Instruction::Instruction(InstructionStreamType& stream, bool o32,
m_imm1 = stream.read32();
break;
default:
ASSERT(imm1_bytes == 0);
VERIFY(imm1_bytes == 0);
break;
}
@ -910,7 +910,7 @@ ALWAYS_INLINE void MemoryOrRegisterReference::decode(InstructionStreamType& stre
m_displacement32 = stream.read32();
break;
default:
ASSERT_NOT_REACHED();
VERIFY_NOT_REACHED();
break;
}
} else {
@ -925,7 +925,7 @@ ALWAYS_INLINE void MemoryOrRegisterReference::decode(InstructionStreamType& stre
m_displacement16 = stream.read16();
break;
default:
ASSERT_NOT_REACHED();
VERIFY_NOT_REACHED();
break;
}
}
@ -939,7 +939,7 @@ ALWAYS_INLINE void MemoryOrRegisterReference::decode16(InstructionStreamType&)
if ((m_rm & 0x07) == 6)
m_displacement_bytes = 2;
else
ASSERT(m_displacement_bytes == 0);
VERIFY(m_displacement_bytes == 0);
break;
case 0x40:
m_displacement_bytes = 1;
@ -987,7 +987,7 @@ ALWAYS_INLINE void MemoryOrRegisterReference::decode32(InstructionStreamType& st
m_displacement_bytes = 4;
break;
default:
ASSERT_NOT_REACHED();
VERIFY_NOT_REACHED();
break;
}
}