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LibJS/JIT: Expand Add fast path to double & i32 combinations

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Co-authored-by: Stephan Vedder <vedder@mbits.info>
This commit is contained in:
Simon Wanner 2023-11-10 09:05:56 +01:00 • committed by Andreas Kling
parent d91b376393
commit 5edab2679c
2 changed files with 26 additions and 28 deletions
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5
Userland/Libraries/LibJIT/X86_64/Assembler.h
View file

@ -878,6 +878,11 @@ struct X86_64Assembler {
emit8(0x81); emit8(0x81);
emit_modrm_slash(0, dst); emit_modrm_slash(0, dst);
emit32(src.offset_or_immediate); emit32(src.offset_or_immediate);
} else if (dst.type == Operand::Type::FReg && src.type == Operand::Type::FReg) {
emit8(0xf2);
emit8(0x0f);
emit8(0x58);
emit_modrm_rm(dst, src);
} else { } else {
VERIFY_NOT_REACHED(); VERIFY_NOT_REACHED();
} }

45
Userland/Libraries/LibJS/JIT/Compiler.cpp
View file

@ -625,36 +625,29 @@ void Compiler::compile_add(Bytecode::Op::Add const& op)
load_vm_register(ARG1, op.lhs()); load_vm_register(ARG1, op.lhs());
load_accumulator(ARG2); load_accumulator(ARG2);
Assembler::Label end {}; branch_if_both_numbers(
Assembler::Label slow_case {}; ARG1, ARG2,
[&](auto lhs, auto rhs, auto& slow_case) {
branch_if_both_int32(ARG1, ARG2, [&] {
// GPR0 = ARG1 + ARG2 (32-bit)
// if (overflow) goto slow_case;
m_assembler.mov(
Assembler::Operand::Register(GPR0),
Assembler::Operand::Register(ARG1));
m_assembler.add32( m_assembler.add32(
Assembler::Operand::Register(GPR0), Assembler::Operand::Register(lhs),
Assembler::Operand::Register(ARG2), Assembler::Operand::Register(rhs),
slow_case); slow_case);
return lhs; },
// accumulator = GPR0 | SHIFTED_INT32_TAG; [&](auto lhs, auto rhs) {
m_assembler.add(
Assembler::Operand::FloatRegister(lhs),
Assembler::Operand::FloatRegister(rhs));
return lhs; },
[&](auto lhs, auto rhs) {
m_assembler.mov( m_assembler.mov(
Assembler::Operand::Register(GPR1), Assembler::Operand::Register(ARG1),
Assembler::Operand::Imm(SHIFTED_INT32_TAG)); Assembler::Operand::Register(lhs));
m_assembler.bitwise_or( m_assembler.mov(
Assembler::Operand::Register(GPR0), Assembler::Operand::Register(ARG2),
Assembler::Operand::Register(GPR1)); Assembler::Operand::Register(rhs));
store_accumulator(GPR0);
m_assembler.jump(end);
});
slow_case.link(m_assembler);
native_call((void*)cxx_add); native_call((void*)cxx_add);
store_accumulator(RET); return RET;
check_exception(); });
end.link(m_assembler);
} }
static Value cxx_sub(VM& vm, Value lhs, Value rhs) static Value cxx_sub(VM& vm, Value lhs, Value rhs)