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Kernel: Remove i686 support

This commit is contained in:
Liav A 2022-10-04 03:05:54 +03:00 committed by Andreas Kling
parent 32270dcd20
commit 5ff318cf3a
75 changed files with 142 additions and 895 deletions

View file

@ -78,7 +78,6 @@ the page tables each contain 512 PTEs that map individual 4KB pages
*/
#if ARCH(X86_64)
gdt64:
.quad 0
gdt64code:
@ -93,7 +92,6 @@ gdt64ptr:
.global code64_sel
code64_sel:
.short code64_sel_value
#endif
start:
jmp real_start
@ -370,8 +368,6 @@ kernel_not_too_large:
/* We should not return, but just in case, halt */
hlt
#if ARCH(X86_64)
pae_supported:
movl $0x80000001, %eax
cpuid
@ -393,15 +389,6 @@ long_mode_supported:
popl %ebx
popl %edx
popl %eax
#else
/* If PAE is supported, continue with booting the system */
pae_supported:
/* restore the pushed registers and continue with booting */
popl %ebx
popl %edx
popl %eax
#endif
/* We don't know where the bootloader might have put the command line.
* It might be at an inconvenient location that we're not about to map,
@ -416,7 +403,6 @@ pae_supported:
movl $kernel_cmdline, %edi
rep movsl
#if ARCH(X86_64)
/* clear pml4t */
movl $boot_pml4t, %edi
movl $1024, %ecx
@ -428,7 +414,6 @@ pae_supported:
movl $boot_pdpt, 0(%edi)
/* R/W + Present */
orl $0x3, 0(%edi)
#endif
/* clear pdpt */
movl $boot_pdpt, %edi
@ -438,11 +423,7 @@ pae_supported:
/* set up pdpt[0] and pdpt[3] */
movl $boot_pdpt, %edi
#if ARCH(X86_64)
movl $(boot_pd0 + 3), 0(%edi)
#else
movl $(boot_pd0 + 1), 0(%edi)
#endif
/* clear pd0 */
movl $boot_pd0, %edi
@ -482,13 +463,8 @@ pae_supported:
addl $4096, %eax
loop 1b
#if ARCH(X86_64)
/* point CR3 to PML4T */
movl $boot_pml4t, %eax
#else
/* point CR3 to PDPT */
movl $boot_pdpt, %eax
#endif
movl %eax, %cr3
@ -497,14 +473,12 @@ pae_supported:
orl $0x60, %eax
movl %eax, %cr4
#if ARCH(X86_64)
1:
/* Enter Long-mode! ref(https://wiki.osdev.org/Setting_Up_Long_Mode)*/
mov $0xC0000080, %ecx /* Set the C-register to 0xC0000080, which is the EFER MSR.*/
rdmsr /* Read from the model-specific register.*/
or $(1 << 8), %eax /* Set the LM-bit which is the 9th bit (bit 8).*/
wrmsr /* Write to the model-specific register.*/
#endif
/* enable PG */
movl %cr0, %eax
@ -515,7 +489,6 @@ pae_supported:
mov $stack_top, %esp
and $-16, %esp
#if ARCH(X86_64)
/* Now we are in 32-bit compatibility mode, We still need to load a 64-bit GDT */
mov $gdt64ptr, %eax
lgdt (%eax)
@ -532,9 +505,6 @@ pae_supported:
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
#else
movl %ebx, multiboot_info_ptr
#endif
call reload_cr3
call init
@ -545,17 +515,10 @@ loop:
jmp loop
reload_cr3:
#if ARCH(X86_64)
pushq %rax
mov %cr3, %rax
mov %rax, %cr3
popq %rax
#else
pushl %eax
movl %cr3, %eax
movl %eax, %cr3
popl %eax
#endif
ret