Kernel: Replace IRQHandler with the new InterruptHandler class

System components that need an IRQ handling are now inheriting the
InterruptHandler class.

In addition to that, the initialization process of PATAChannel was
changed to fit the changes.
PATAChannel, E1000NetworkAdapter and RTL8139NetworkAdapter are now
inheriting from PCI::Device instead of InterruptHandler directly.

Kernel/Arch/i386/CPU.cpp

@@ -26,12 +26,12 @@
 
 #include "APIC.h"
 #include "Assertions.h"
-#include "IRQHandler.h"
 #include "PIC.h"
 #include "Process.h"
 #include <AK/Types.h>
 #include <Kernel/Arch/i386/CPU.h>
 #include <Kernel/KSyms.h>
+#include <Kernel/SharedInterruptHandler.h>
 #include <Kernel/VM/MemoryManager.h>
 #include <LibC/mallocdefs.h>
 
@@ -48,7 +48,7 @@ static DescriptorTablePointer s_gdtr;
 static Descriptor s_idt[256];
 static Descriptor s_gdt[256];
 
-static IRQHandler* s_irq_handler[16];
+static SharedInterruptHandler* s_irq_handler[256];
 
 static Vector<u16>* s_gdt_freelist;
 
@@ -435,18 +435,25 @@ static void unimp_trap()
     hang();
 }
 
-void register_irq_handler(u8 irq, IRQHandler& handler)
+void register_shared_interrupt_handler(u8 irq, SharedInterruptHandler& handler)
 {
     ASSERT(!s_irq_handler[irq]);
     s_irq_handler[irq] = &handler;
 }
 
-void unregister_irq_handler(u8 irq, IRQHandler& handler)
+void unregister_shared_interrupt_handler(u8 irq, SharedInterruptHandler& handler)
 {
     ASSERT(s_irq_handler[irq] == &handler);
     s_irq_handler[irq] = nullptr;
 }
 
+SharedInterruptHandler& get_interrupt_handler(u8 number)
+{
+    ASSERT(number < 256);
+    ASSERT(s_irq_handler[number] != nullptr);
+    return *s_irq_handler[number];
+}
+
 void register_interrupt_handler(u8 index, void (*f)())
 {
     s_idt[index].low = 0x00080000 | LSW((f));
@@ -524,8 +531,8 @@ void idt_init()
     register_interrupt_handler(0x5e, irq_14_asm_entry);
     register_interrupt_handler(0x5f, irq_15_asm_entry);
 
-    for (u8 i = 0; i < 16; ++i) {
-        s_irq_handler[i] = nullptr;
+    for (u8 i = 0; i < 255; ++i) {
+        SharedInterruptHandler::initialize(i);
     }
 
     flush_idt();
@@ -541,8 +548,9 @@ void handle_irq(RegisterDump regs)
     clac();
     ASSERT(regs.isr_number >= 0x50 && regs.isr_number <= 0x5f);
     u8 irq = (u8)(regs.isr_number - 0x50);
-    if (s_irq_handler[irq])
-        s_irq_handler[irq]->handle_irq();
+    ASSERT(s_irq_handler[irq] != nullptr);
+    s_irq_handler[irq]->handle_interrupt();
+    // FIXME: Determine if we use IRQs or MSIs (in the future) to send EOI...
     PIC::eoi(irq);
 }
 

Kernel/Arch/i386/CPU.h

@@ -240,7 +240,7 @@ public:
     u64 raw[4];
 };
 
-class IRQHandler;
+class SharedInterruptHandler;
 struct RegisterDump;
 
 void gdt_init();
@@ -248,8 +248,9 @@ void idt_init();
 void sse_init();
 void register_interrupt_handler(u8 number, void (*f)());
 void register_user_callable_interrupt_handler(u8 number, void (*f)());
-void register_irq_handler(u8 number, IRQHandler&);
-void unregister_irq_handler(u8 number, IRQHandler&);
+void register_shared_interrupt_handler(u8 number, SharedInterruptHandler&);
+SharedInterruptHandler& get_interrupt_handler(u8 number);
+void unregister_shared_interrupt_handler(u8 number, SharedInterruptHandler&);
 void flush_idt();
 void flush_gdt();
 void load_task_register(u16 selector);

Kernel/Arch/i386/PIC.cpp

@@ -75,6 +75,20 @@ void enable(u8 irq)
     }
 }
 
+bool is_enabled(u8 irq)
+{
+    InterruptDisabler disabler;
+    u8 imr;
+    if (irq & 8) {
+        imr = IO::in8(PIC1_CMD);
+        imr &= (1 << (irq - 8));
+    } else {
+        imr = IO::in8(PIC0_CMD);
+        imr &= (1 << irq);
+    }
+    return (!!imr);
+}
+
 void eoi(u8 irq)
 {
     if (irq & 8)

Kernel/Arch/i386/PIC.h

@@ -34,6 +34,7 @@ void enable(u8 number);
 void disable(u8 number);
 void eoi(u8 number);
 void initialize();
+bool is_enabled(u8 number);
 u16 get_isr();
 u16 get_irr();