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Kernel: Implement Page Attribute Table (PAT) support and Write-Combine
This allows us to enable Write-Combine on e.g. framebuffers, significantly improving performance on bare metal. To keep things simple we right now only use one of up to three bits (bit 7 in the PTE), which maps to the PA4 entry in the PAT MSR, which we set to the Write-Combine mode on each CPU at boot time.
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@ -39,6 +39,7 @@ struct ProcessorMessageEntry;
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# define MSR_GS_BASE 0xc0000101
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#endif
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#define MSR_IA32_EFER 0xc0000080
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#define MSR_IA32_PAT 0x277
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// FIXME: Find a better place for these
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extern "C" void thread_context_first_enter(void);
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