Kernel: Implement Page Attribute Table (PAT) support and Write-Combine

This allows us to enable Write-Combine on e.g. framebuffers,
significantly improving performance on bare metal.

To keep things simple we right now only use one of up to three bits
(bit 7 in the PTE), which maps to the PA4 entry in the PAT MSR, which
we set to the Write-Combine mode on each CPU at boot time.

Kernel/Arch/x86/Processor.h

@@ -39,6 +39,7 @@ struct ProcessorMessageEntry;
 #    define MSR_GS_BASE 0xc0000101
 #endif
 #define MSR_IA32_EFER 0xc0000080
+#define MSR_IA32_PAT 0x277
 
 // FIXME: Find a better place for these
 extern "C" void thread_context_first_enter(void);