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Kernel: Implement Page Attribute Table (PAT) support and Write-Combine
This allows us to enable Write-Combine on e.g. framebuffers, significantly improving performance on bare metal. To keep things simple we right now only use one of up to three bits (bit 7 in the PTE), which maps to the PA4 entry in the PAT MSR, which we set to the Write-Combine mode on each CPU at boot time.
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6 changed files with 40 additions and 0 deletions
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@ -114,6 +114,8 @@ UNMAP_AFTER_INIT void Processor::cpu_detect()
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if ((family == 6 && model >= 3) || (family == 0xf && model >= 0xe))
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set_feature(CPUFeature::CONSTANT_TSC);
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}
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if (processor_info.edx() & (1 << 16))
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set_feature(CPUFeature::PAT);
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u32 max_extended_leaf = CPUID(0x80000000).eax();
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@ -190,6 +192,18 @@ UNMAP_AFTER_INIT void Processor::cpu_setup()
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ia32_efer.set(ia32_efer.get() | 0x800);
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}
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if (has_feature(CPUFeature::PAT)) {
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MSR ia32_pat(MSR_IA32_PAT);
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// Set PA4 to Write Comine. This allows us to
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// use this mode by only setting the bit in the PTE
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// and leaving all other bits in the upper levels unset,
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// which maps to setting bit 3 of the index, resulting
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// in the index value 0 or 4.
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u64 pat = ia32_pat.get() & ~(0x7ull << 32);
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pat |= 0x1ull << 32; // set WC mode for PA4
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ia32_pat.set(pat);
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}
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if (has_feature(CPUFeature::SMEP)) {
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// Turn on CR4.SMEP
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write_cr4(read_cr4() | 0x100000);
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@ -309,6 +323,8 @@ NonnullOwnPtr<KString> Processor::features_string() const
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return "hypervisor"sv;
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// no default statement here intentionally so that we get
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// a warning if a new feature is forgotten to be added here
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case CPUFeature::PAT:
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return "pat"sv;
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}
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// Shouldn't ever happen
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return "???"sv;
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