mirror of
https://github.com/RGBCube/serenity
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Kernel: Pull apart CPU.h
This does not add any functional changes
This commit is contained in:
parent
37253ebcae
commit
7ca3d413f7
86 changed files with 3866 additions and 3493 deletions
83
Kernel/Arch/x86/x86_64/ASM_wrapper.cpp
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83
Kernel/Arch/x86/x86_64/ASM_wrapper.cpp
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/*
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* Copyright (c) 2018-2021, Andreas Kling <kling@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/Types.h>
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#include <Kernel/Arch/x86/ASM_wrapper.h>
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#include <Kernel/Arch/x86/CPU.h>
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#include <Kernel/Arch/x86/Processor.h>
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namespace Kernel {
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UNMAP_AFTER_INIT void write_cr0(FlatPtr value)
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{
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asm volatile("mov %%rax, %%cr0" ::"a"(value));
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}
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UNMAP_AFTER_INIT void write_cr4(FlatPtr value)
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{
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asm volatile("mov %%rax, %%cr4" ::"a"(value));
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}
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FlatPtr read_cr0()
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{
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FlatPtr cr0;
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asm("mov %%cr0, %%rax"
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: "=a"(cr0));
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return cr0;
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}
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FlatPtr read_cr2()
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{
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FlatPtr cr2;
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asm("mov %%cr2, %%rax"
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: "=a"(cr2));
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return cr2;
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}
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FlatPtr read_cr3()
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{
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FlatPtr cr3;
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asm("mov %%cr3, %%rax"
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: "=a"(cr3));
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return cr3;
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}
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void write_cr3(FlatPtr cr3)
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{
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// NOTE: If you're here from a GPF crash, it's very likely that a PDPT entry is incorrect, not this!
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asm volatile("mov %%rax, %%cr3" ::"a"(cr3)
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: "memory");
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}
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FlatPtr read_cr4()
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{
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FlatPtr cr4;
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asm("mov %%cr4, %%rax"
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: "=a"(cr4));
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return cr4;
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}
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#define DEFINE_DEBUG_REGISTER(index) \
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FlatPtr read_dr##index() \
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{ \
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FlatPtr value; \
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asm("mov %%dr" #index ", %%rax" \
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: "=a"(value)); \
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return value; \
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} \
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void write_dr##index(FlatPtr value) \
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{ \
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asm volatile("mov %%rax, %%dr" #index ::"a"(value)); \
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}
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DEFINE_DEBUG_REGISTER(0);
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DEFINE_DEBUG_REGISTER(1);
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DEFINE_DEBUG_REGISTER(2);
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DEFINE_DEBUG_REGISTER(3);
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DEFINE_DEBUG_REGISTER(6);
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DEFINE_DEBUG_REGISTER(7);
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}
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431
Kernel/Arch/x86/x86_64/Boot/boot.S
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431
Kernel/Arch/x86/x86_64/Boot/boot.S
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.code32
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.set MULTIBOOT_MAGIC, 0x1badb002
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.set MULTIBOOT_PAGE_ALIGN, 0x1
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.set MULTIBOOT_MEMORY_INFO, 0x2
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.set MULTIBOOT_VIDEO_MODE, 0x4
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.set multiboot_flags, MULTIBOOT_PAGE_ALIGN | MULTIBOOT_MEMORY_INFO | MULTIBOOT_VIDEO_MODE
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.set multiboot_checksum, -(MULTIBOOT_MAGIC + multiboot_flags)
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.section .multiboot
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.align 4
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.long MULTIBOOT_MAGIC
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.long multiboot_flags
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.long multiboot_checksum
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/* for MULTIBOOT_MEMORY_INFO */
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.long 0x00000000 /* header_addr */
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.long 0x00000000 /* load_addr */
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.long 0x00000000 /* load_end_addr */
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.long 0x00000000 /* bss_end_addr */
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.long 0x00000000 /* entry_addr */
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/* for MULTIBOOT_VIDEO_MODE */
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.long 0x00000000 /* mode_type */
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.long 1280 /* width */
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.long 1024 /* height */
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.long 32 /* depth */
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.section .stack, "aw", @nobits
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stack_bottom:
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.skip 32768
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stack_top:
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.global kernel_cmdline
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kernel_cmdline:
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.skip 4096
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.section .page_tables, "aw", @nobits
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.align 4096
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.global boot_pdpt
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boot_pdpt:
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.skip 4096
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.global boot_pd0
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boot_pd0:
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.skip 4096
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.global boot_pd3
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boot_pd3:
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.skip 4096
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.global boot_pd0_pt0
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boot_pd0_pt0:
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.skip 4096 * 4
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.global boot_pd3_pts
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boot_pd3_pts:
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.skip 4096 * 8
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.global boot_pd3_pt1023
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boot_pd3_pt1023:
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.skip 4096
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.section .text
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.global start
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.type start, @function
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.extern init
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.type init, @function
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.extern multiboot_info_ptr
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.type multiboot_info_ptr, @object
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/*
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construct the following (32-bit PAE) page table layout:
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pdpt
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0: boot_pd0 (0-1GB)
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1: n/a (1-2GB)
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2: n/a (2-3GB)
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3: boot_pd3 (3-4GB)
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boot_pd0 : 512 pde's
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0: boot_pd0_pt0 (0-2MB) (id 512 4KB pages)
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boot_pd3 : 512 pde's
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0: boot_pd3_pts[0] (3072-3074MB) (pseudo 512 4KB pages)
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1: boot_pd3_pts[1] (3074-3076MB) (pseudo 512 4KB pages)
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2: boot_pd3_pts[2] (3076-3078MB) (pseudo 512 4KB pages)
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3: boot_pd3_pts[3] (3078-3080MB) (pseudo 512 4KB pages)
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4: boot_pd3_pts[4] (3080-3082MB) (pseudo 512 4KB pages)
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5: boot_pd3_pts[5] (3082-3084MB) (pseudo 512 4KB pages)
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6: boot_pd3_pts[6] (3084-3086MB) (pseudo 512 4KB pages)
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7: boot_pd3_pts[7] (3086-3088MB) (pseudo 512 4KB pages)
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8: boot_pd3_pt1023 (4094-4096MB) (for page table mappings)
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the 9 page tables each contain 512 pte's that map individual 4KB pages
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*/
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start:
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cli
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cld
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/* We don't know where the bootloader might have put the command line.
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* It might be at an inconvenient location that we're not about to map,
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* so let's just copy it to a convenient location while we have the whole
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* memory space identity-mapped anyway. :^)
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*/
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movl %ebx, %esi
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addl $16, %esi
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movl (%esi), %esi
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movl $1024, %ecx
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movl $(kernel_cmdline - 0xc0000000), %edi
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rep movsl
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/* clear pdpt */
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movl $(boot_pdpt - 0xc0000000), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* set up pdpt[0] and pdpt[3] */
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movl $(boot_pdpt - 0xc0000000), %edi
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movl $((boot_pd0 - 0xc0000000) + 1), 0(%edi)
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movl $((boot_pd3 - 0xc0000000) + 1), 24(%edi)
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/* clear pd0 */
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movl $(boot_pd0 - 0xc0000000), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* clear pd3 */
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movl $(boot_pd3 - 0xc0000000), %edi
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movl $1024, %ecx
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xorl %eax, %eax
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rep stosl
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/* clear pd0's pt's */
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movl $(boot_pd0_pt0 - 0xc0000000), %edi
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movl $(1024 * 4), %ecx
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xorl %eax, %eax
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rep stosl
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/* clear pd3's pt's */
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movl $(boot_pd3_pts - 0xc0000000), %edi
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movl $(1024 * 9), %ecx
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xorl %eax, %eax
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rep stosl
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/* add boot_pd0_pt0 to boot_pd0 */
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movl $(boot_pd0 - 0xc0000000), %edi
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movl $(boot_pd0_pt0 - 0xc0000000), %eax
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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/* add boot_pd3_pts to boot_pd3 */
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movl $8, %ecx
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movl $(boot_pd3 - 0xc0000000), %edi
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movl $(boot_pd3_pts - 0xc0000000), %eax
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1:
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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addl $8, %edi
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addl $4096, %eax
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loop 1b
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/* identity map the 0 to 2MB range */
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movl $512, %ecx
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movl $(boot_pd0_pt0 - 0xc0000000), %edi
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xorl %eax, %eax
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1:
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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addl $8, %edi
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addl $4096, %eax
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loop 1b
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/* pseudo identity map the 3072-3090MB range */
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movl $(512 * 8), %ecx
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movl $(boot_pd3_pts - 0xc0000000), %edi
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xorl %eax, %eax
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1:
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movl %eax, 0(%edi)
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/* R/W + Present */
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orl $0x3, 0(%edi)
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addl $8, %edi
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addl $4096, %eax
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loop 1b
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/* create an empty page table for the top 2MB at the 4GB mark */
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movl $(boot_pd3 - 0xc0000000), %edi
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movl $(boot_pd3_pt1023 - 0xc0000000), 4088(%edi)
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orl $0x3, 4088(%edi)
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movl $0, 4092(%edi)
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/* point CR3 to PDPT */
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movl $(boot_pdpt - 0xc0000000), %eax
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movl %eax, %cr3
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/* enable PAE + PSE */
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movl %cr4, %eax
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orl $0x60, %eax
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movl %eax, %cr4
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1:
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/* Enter Long-mode! ref(https://wiki.osdev.org/Setting_Up_Long_Mode)*/
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mov $0xC0000080, %ecx /* Set the C-register to 0xC0000080, which is the EFER MSR.*/
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rdmsr /* Read from the model-specific register.*/
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or $(1 << 8), %eax /* Set the LM-bit which is the 9th bit (bit 8).*/
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wrmsr /* Write to the model-specific register.*/
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/* enable PG */
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movl %cr0, %eax
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orl $0x80000000, %eax
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movl %eax, %cr0
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/* Now we are in 32-bit compatibility mode, We still need to load a 64-bit GDT */
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/* set up stack */
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mov $stack_top, %esp
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and $-16, %esp
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/* jmp to an address above the 3GB mark */
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movl $1f,%eax
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jmp *%eax
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1:
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movl %cr3, %eax
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movl %eax, %cr3
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/* unmap the 0-1MB range, which isn't used after jmp-ing up here */
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movl $256, %ecx
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movl $(boot_pd0_pt0 - 0xc0000000), %edi
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xorl %eax, %eax
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1:
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movl %eax, 0(%edi)
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addl $8, %edi
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loop 1b
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/* jump into C++ land */
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addl $0xc0000000, %ebx
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movl %ebx, multiboot_info_ptr
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call init
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add $4, %esp
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cli
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loop:
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hlt
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jmp loop
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.extern init_ap
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.type init_ap, @function
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/*
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The apic_ap_start function will be loaded to P0x00008000 where the APIC
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will boot the AP from in real mode. This code also contains space for
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special variables that *must* remain here. When initializing the APIC,
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the code here gets copied to P0x00008000, the variables in here get
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populated and then the the boot of the APs will be triggered. Having
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the variables here allows us to access them from real mode. Also, the
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code here avoids the need for relocation entries.
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Basically, the variables between apic_ap_start and end_apic_ap_start
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*MUST* remain here and cannot be moved into a .bss or any other location.
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*/
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.global apic_ap_start
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.type apic_ap_start, @function
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apic_ap_start:
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.code16
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cli
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jmp $0x800, $(1f - apic_ap_start) /* avoid relocation entries */
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1:
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mov %cs, %ax
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mov %ax, %ds
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xor %ax, %ax
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mov %ax, %sp
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/* load the first temporary gdt */
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lgdt (ap_cpu_gdtr_initial - apic_ap_start)
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/* enable PM */
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movl %cr0, %eax
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orl $1, %eax
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movl %eax, %cr0
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ljmpl $8, $(apic_ap_start32 - apic_ap_start + 0x8000)
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apic_ap_start32:
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.code32
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mov $0x10, %ax
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mov %ax, %ss
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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movl $0x8000, %ebp
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/* generate a unique ap cpu id (0 means 1st ap, not bsp!) */
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xorl %eax, %eax
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incl %eax
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lock; xaddl %eax, (ap_cpu_id - apic_ap_start)(%ebp) /* avoid relocation entries */
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movl %eax, %esi
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/* find our allocated stack based on the generated id */
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movl (ap_cpu_init_stacks - apic_ap_start)(%ebp, %eax, 4), %esp
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/* check if we support NX and enable it if we do */
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movl $0x80000001, %eax
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cpuid
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testl $0x100000, %edx
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je (1f - apic_ap_start + 0x8000)
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/* turn on IA32_EFER.NXE */
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movl $0xc0000080, %ecx
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rdmsr
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orl $0x800, %eax
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wrmsr
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1:
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/* load the bsp's cr3 value */
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movl (ap_cpu_init_cr3 - apic_ap_start)(%ebp), %eax
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movl %eax, %cr3
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/* enable PAE + PSE */
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movl %cr4, %eax
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orl $0x60, %eax
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movl %eax, %cr4
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/* enable PG */
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movl %cr0, %eax
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orl $0x80000000, %eax
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movl %eax, %cr0
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/* load a second temporary gdt that points above 3GB */
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lgdt (ap_cpu_gdtr_initial2 - apic_ap_start + 0xc0008000)
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/* jump above 3GB into our identity mapped area now */
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ljmp $8, $(apic_ap_start32_2 - apic_ap_start + 0xc0008000)
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apic_ap_start32_2:
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/* flush the TLB */
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movl %cr3, %eax
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movl %eax, %cr3
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movl $0xc0008000, %ebp
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/* now load the final gdt and idt from the identity mapped area */
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movl (ap_cpu_gdtr - apic_ap_start)(%ebp), %eax
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lgdt (%eax)
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movl (ap_cpu_idtr - apic_ap_start)(%ebp), %eax
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lidt (%eax)
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/* set same cr0 and cr4 values as the BSP */
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movl (ap_cpu_init_cr0 - apic_ap_start)(%ebp), %eax
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movl %eax, %cr0
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movl (ap_cpu_init_cr4 - apic_ap_start)(%ebp), %eax
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movl %eax, %cr4
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/* push the Processor pointer this CPU is going to use */
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movl (ap_cpu_init_processor_info_array - apic_ap_start)(%ebp), %eax
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addl $0xc0000000, %eax
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movl 0(%eax, %esi, 4), %eax
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push %eax
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/* push the cpu id, 0 representing the bsp and call into c++ */
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incl %esi
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push %esi
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xor %ebp, %ebp
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cld
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/* We are in identity mapped P0x8000 and the BSP will unload this code
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once all APs are initialized, so call init_ap but return to our
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infinite loop */
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push $loop
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ljmp $8, $init_ap
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.align 4
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.global apic_ap_start_size
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apic_ap_start_size:
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.2byte end_apic_ap_start - apic_ap_start
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.align 4
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ap_cpu_id:
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.4byte 0x0
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ap_cpu_gdt:
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/* null */
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.8byte 0x0
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/* code */
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.4byte 0x0000FFFF
|
||||
.4byte 0x00cf9a00
|
||||
/* data */
|
||||
.4byte 0x0000FFFF
|
||||
.4byte 0x00cf9200
|
||||
ap_cpu_gdt_end:
|
||||
ap_cpu_gdtr_initial:
|
||||
.2byte ap_cpu_gdt_end - ap_cpu_gdt - 1
|
||||
.4byte (ap_cpu_gdt - apic_ap_start) + 0x8000
|
||||
ap_cpu_gdtr_initial2:
|
||||
.2byte ap_cpu_gdt_end - ap_cpu_gdt - 1
|
||||
.4byte (ap_cpu_gdt - apic_ap_start) + 0xc0008000
|
||||
.global ap_cpu_gdtr
|
||||
ap_cpu_gdtr:
|
||||
.4byte 0x0 /* will be set at runtime */
|
||||
.global ap_cpu_idtr
|
||||
ap_cpu_idtr:
|
||||
.4byte 0x0 /* will be set at runtime */
|
||||
.global ap_cpu_init_cr0
|
||||
ap_cpu_init_cr0:
|
||||
.4byte 0x0 /* will be set at runtime */
|
||||
.global ap_cpu_init_cr3
|
||||
ap_cpu_init_cr3:
|
||||
.4byte 0x0 /* will be set at runtime */
|
||||
.global ap_cpu_init_cr4
|
||||
ap_cpu_init_cr4:
|
||||
.4byte 0x0 /* will be set at runtime */
|
||||
.global ap_cpu_init_processor_info_array
|
||||
ap_cpu_init_processor_info_array:
|
||||
.4byte 0x0 /* will be set at runtime */
|
||||
.global ap_cpu_init_stacks
|
||||
ap_cpu_init_stacks:
|
||||
/* array of allocated stack pointers */
|
||||
/* NOTE: ap_cpu_init_stacks must be the last variable before
|
||||
end_apic_ap_start! */
|
||||
.set end_apic_ap_start, .
|
218
Kernel/Arch/x86/x86_64/Processor.cpp
Normal file
218
Kernel/Arch/x86/x86_64/Processor.cpp
Normal file
|
@ -0,0 +1,218 @@
|
|||
/*
|
||||
* Copyright (c) 2018-2021, Andreas Kling <kling@serenityos.org>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <AK/StdLibExtras.h>
|
||||
#include <Kernel/Arch/x86/CPU.h>
|
||||
#include <Kernel/Arch/x86/Processor.h>
|
||||
#include <Kernel/Arch/x86/TrapFrame.h>
|
||||
#include <Kernel/Panic.h>
|
||||
#include <Kernel/Process.h>
|
||||
#include <Kernel/Random.h>
|
||||
#include <Kernel/Thread.h>
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
#define ENTER_THREAD_CONTEXT_ARGS_SIZE (2 * 4) // to_thread, from_thread
|
||||
extern "C" void thread_context_first_enter(void);
|
||||
extern "C" void do_assume_context(Thread* thread, u32 flags);
|
||||
extern "C" void exit_kernel_thread(void);
|
||||
|
||||
// clang-format off
|
||||
asm(
|
||||
// enter_thread_context returns to here first time a thread is executing
|
||||
".globl thread_context_first_enter \n"
|
||||
"thread_context_first_enter: \n"
|
||||
// switch_context will have pushed from_thread and to_thread to our new
|
||||
// stack prior to thread_context_first_enter() being called, and the
|
||||
// pointer to TrapFrame was the top of the stack before that
|
||||
" movl 8(%esp), %ebx \n" // save pointer to TrapFrame
|
||||
" cld \n"
|
||||
" call context_first_init \n"
|
||||
" addl $" __STRINGIFY(ENTER_THREAD_CONTEXT_ARGS_SIZE) ", %esp \n"
|
||||
" movl %ebx, 0(%esp) \n" // push pointer to TrapFrame
|
||||
" jmp common_trap_exit \n"
|
||||
);
|
||||
// clang-format on
|
||||
|
||||
#if ARCH(I386)
|
||||
// clang-format off
|
||||
asm(
|
||||
".global do_assume_context \n"
|
||||
"do_assume_context: \n"
|
||||
" movl 4(%esp), %ebx \n"
|
||||
" movl 8(%esp), %esi \n"
|
||||
// We're going to call Processor::init_context, so just make sure
|
||||
// we have enough stack space so we don't stomp over it
|
||||
" subl $(" __STRINGIFY(4 + REGISTER_STATE_SIZE + TRAP_FRAME_SIZE + 4) "), %esp \n"
|
||||
" pushl %esi \n"
|
||||
" pushl %ebx \n"
|
||||
" cld \n"
|
||||
" call do_init_context \n"
|
||||
" addl $8, %esp \n"
|
||||
" movl %eax, %esp \n" // move stack pointer to what Processor::init_context set up for us
|
||||
" pushl %ebx \n" // push to_thread
|
||||
" pushl %ebx \n" // push from_thread
|
||||
" pushl $thread_context_first_enter \n" // should be same as tss.eip
|
||||
" jmp enter_thread_context \n"
|
||||
);
|
||||
// clang-format on
|
||||
#endif
|
||||
|
||||
String Processor::platform_string() const
|
||||
{
|
||||
// FIXME: other platforms
|
||||
return "x86_64";
|
||||
}
|
||||
|
||||
u32 Processor::init_context(Thread& thread, bool leave_crit)
|
||||
{
|
||||
VERIFY(is_kernel_mode());
|
||||
VERIFY(g_scheduler_lock.is_locked());
|
||||
if (leave_crit) {
|
||||
// Leave the critical section we set up in in Process::exec,
|
||||
// but because we still have the scheduler lock we should end up with 1
|
||||
m_in_critical--; // leave it without triggering anything or restoring flags
|
||||
VERIFY(in_critical() == 1);
|
||||
}
|
||||
|
||||
u32 kernel_stack_top = thread.kernel_stack_top();
|
||||
|
||||
// Add a random offset between 0-256 (16-byte aligned)
|
||||
kernel_stack_top -= round_up_to_power_of_two(get_fast_random<u8>(), 16);
|
||||
|
||||
u32 stack_top = kernel_stack_top;
|
||||
|
||||
// TODO: handle NT?
|
||||
VERIFY((cpu_flags() & 0x24000) == 0); // Assume !(NT | VM)
|
||||
|
||||
auto& tss = thread.tss();
|
||||
bool return_to_user = (tss.cs & 3) != 0;
|
||||
|
||||
// make room for an interrupt frame
|
||||
if (!return_to_user) {
|
||||
// userspace_esp and userspace_ss are not popped off by iret
|
||||
// unless we're switching back to user mode
|
||||
stack_top -= sizeof(RegisterState) - 2 * sizeof(u32);
|
||||
|
||||
// For kernel threads we'll push the thread function argument
|
||||
// which should be in tss.esp and exit_kernel_thread as return
|
||||
// address.
|
||||
stack_top -= 2 * sizeof(u32);
|
||||
*reinterpret_cast<u32*>(kernel_stack_top - 2 * sizeof(u32)) = tss.esp;
|
||||
*reinterpret_cast<u32*>(kernel_stack_top - 3 * sizeof(u32)) = FlatPtr(&exit_kernel_thread);
|
||||
} else {
|
||||
stack_top -= sizeof(RegisterState);
|
||||
}
|
||||
|
||||
// we want to end up 16-byte aligned, %esp + 4 should be aligned
|
||||
stack_top -= sizeof(u32);
|
||||
*reinterpret_cast<u32*>(kernel_stack_top - sizeof(u32)) = 0;
|
||||
|
||||
// set up the stack so that after returning from thread_context_first_enter()
|
||||
// we will end up either in kernel mode or user mode, depending on how the thread is set up
|
||||
// However, the first step is to always start in kernel mode with thread_context_first_enter
|
||||
RegisterState& iretframe = *reinterpret_cast<RegisterState*>(stack_top);
|
||||
// FIXME: copy state to be recovered through TSS
|
||||
TODO();
|
||||
|
||||
// make space for a trap frame
|
||||
stack_top -= sizeof(TrapFrame);
|
||||
TrapFrame& trap = *reinterpret_cast<TrapFrame*>(stack_top);
|
||||
trap.regs = &iretframe;
|
||||
trap.prev_irq_level = 0;
|
||||
trap.next_trap = nullptr;
|
||||
|
||||
stack_top -= sizeof(u32); // pointer to TrapFrame
|
||||
*reinterpret_cast<u32*>(stack_top) = stack_top + 4;
|
||||
|
||||
if constexpr (CONTEXT_SWITCH_DEBUG) {
|
||||
if (return_to_user) {
|
||||
dbgln("init_context {} ({}) set up to execute at eip={}:{}, esp={}, stack_top={}, user_top={}:{}",
|
||||
thread,
|
||||
VirtualAddress(&thread),
|
||||
iretframe.cs, tss.eip,
|
||||
VirtualAddress(tss.esp),
|
||||
VirtualAddress(stack_top),
|
||||
iretframe.userspace_ss,
|
||||
iretframe.userspace_esp);
|
||||
} else {
|
||||
dbgln("init_context {} ({}) set up to execute at eip={}:{}, esp={}, stack_top={}",
|
||||
thread,
|
||||
VirtualAddress(&thread),
|
||||
iretframe.cs, tss.eip,
|
||||
VirtualAddress(tss.esp),
|
||||
VirtualAddress(stack_top));
|
||||
}
|
||||
}
|
||||
|
||||
// make switch_context() always first return to thread_context_first_enter()
|
||||
// in kernel mode, so set up these values so that we end up popping iretframe
|
||||
// off the stack right after the context switch completed, at which point
|
||||
// control is transferred to what iretframe is pointing to.
|
||||
tss.eip = FlatPtr(&thread_context_first_enter);
|
||||
tss.esp0 = kernel_stack_top;
|
||||
tss.esp = stack_top;
|
||||
tss.cs = GDT_SELECTOR_CODE0;
|
||||
tss.ds = GDT_SELECTOR_DATA0;
|
||||
tss.es = GDT_SELECTOR_DATA0;
|
||||
tss.gs = GDT_SELECTOR_DATA0;
|
||||
tss.ss = GDT_SELECTOR_DATA0;
|
||||
tss.fs = GDT_SELECTOR_PROC;
|
||||
return stack_top;
|
||||
}
|
||||
|
||||
void Processor::switch_context(Thread*& from_thread, Thread*& to_thread)
|
||||
{
|
||||
VERIFY(!in_irq());
|
||||
VERIFY(m_in_critical == 1);
|
||||
VERIFY(is_kernel_mode());
|
||||
|
||||
dbgln_if(CONTEXT_SWITCH_DEBUG, "switch_context --> switching out of: {} {}", VirtualAddress(from_thread), *from_thread);
|
||||
from_thread->save_critical(m_in_critical);
|
||||
|
||||
PANIC("Context switching not implemented.");
|
||||
|
||||
dbgln_if(CONTEXT_SWITCH_DEBUG, "switch_context <-- from {} {} to {} {}", VirtualAddress(from_thread), *from_thread, VirtualAddress(to_thread), *to_thread);
|
||||
|
||||
Processor::current().restore_in_critical(to_thread->saved_critical());
|
||||
}
|
||||
|
||||
void Processor::assume_context(Thread& thread, FlatPtr flags)
|
||||
{
|
||||
dbgln_if(CONTEXT_SWITCH_DEBUG, "Assume context for thread {} {}", VirtualAddress(&thread), thread);
|
||||
|
||||
VERIFY_INTERRUPTS_DISABLED();
|
||||
Scheduler::prepare_after_exec();
|
||||
// in_critical() should be 2 here. The critical section in Process::exec
|
||||
// and then the scheduler lock
|
||||
VERIFY(Processor::current().in_critical() == 2);
|
||||
|
||||
(void)flags;
|
||||
TODO();
|
||||
|
||||
VERIFY_NOT_REACHED();
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT void Processor::initialize_context_switching(Thread& initial_thread)
|
||||
{
|
||||
VERIFY(initial_thread.process().is_kernel_process());
|
||||
|
||||
auto& tss = initial_thread.tss();
|
||||
m_tss = tss;
|
||||
m_tss.esp0 = tss.esp0;
|
||||
m_tss.ss0 = GDT_SELECTOR_DATA0;
|
||||
// user mode needs to be able to switch to kernel mode:
|
||||
m_tss.cs = m_tss.ds = m_tss.es = m_tss.gs = m_tss.ss = GDT_SELECTOR_CODE0 | 3;
|
||||
m_tss.fs = GDT_SELECTOR_PROC | 3;
|
||||
|
||||
m_scheduler_initialized = true;
|
||||
|
||||
// FIXME: Context switching (see i386 impl)
|
||||
|
||||
VERIFY_NOT_REACHED();
|
||||
}
|
||||
|
||||
}
|
Loading…
Add table
Add a link
Reference in a new issue